1#include "macros.inc" 2 3#define LSBIT(v) ((v) ^ ((v) & ((v) - 1))) 4 5test_suite interrupt 6 7.macro clear_interrupts 8 movi a2, 0 9 wsr a2, intenable 10 wsr a2, ccompare0 11 wsr a2, ccompare1 12 wsr a2, ccompare2 13 esync 14 rsr a2, interrupt 15 wsr a2, intclear 16 17 esync 18 rsr a2, interrupt 19 assert eqi, a2, 0 20.endm 21 22.macro check_l1 23 rsr a2, ps 24 movi a3, 0x1f /* EXCM | INTMASK */ 25 and a2, a2, a3 26 assert eqi, a2, 0x10 /* only EXCM is set for level-1 interrupt */ 27 rsr a2, exccause 28 assert eqi, a2, 4 29.endm 30 31test rsil 32 clear_interrupts 33 34 rsr a2, ps 35 rsil a3, 7 36 rsr a4, ps 37 assert eq, a2, a3 38 movi a2, 0xf 39 and a2, a4, a2 40 assert eqi, a2, 7 41 xor a3, a3, a4 42 movi a2, 0xfffffff0 43 and a2, a3, a2 44 assert eqi, a2, 0 45test_end 46 47test soft_disabled 48 set_vector kernel, 1f 49 clear_interrupts 50 51 movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE) 52 wsr a2, intset 53 esync 54 rsr a3, interrupt 55 movi a4, ~XCHAL_INTTYPE_MASK_TIMER 56 and a3, a3, a4 57 assert eq, a2, a3 58 wsr a2, intclear 59 esync 60 rsr a3, interrupt 61 and a3, a3, a4 62 assert eqi, a3, 0 63 j 2f 641: 65 test_fail 662: 67test_end 68 69test soft_intenable 70 set_vector kernel, 1f 71 clear_interrupts 72 73 movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE) 74 wsr a2, intset 75 esync 76 rsr a3, interrupt 77 movi a4, ~XCHAL_INTTYPE_MASK_TIMER 78 and a3, a3, a4 79 assert eq, a2, a3 80 rsil a3, 0 81 wsr a2, intenable 82 esync 83 test_fail 841: 85 check_l1 86test_end 87 88test soft_rsil 89 set_vector kernel, 1f 90 clear_interrupts 91 92 movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE) 93 wsr a2, intset 94 esync 95 rsr a3, interrupt 96 movi a4, ~XCHAL_INTTYPE_MASK_TIMER 97 and a3, a3, a4 98 assert eq, a2, a3 99 wsr a2, intenable 100 rsil a3, 0 101 esync 102 test_fail 1031: 104 check_l1 105test_end 106 107test soft_waiti 108 set_vector kernel, 1f 109 clear_interrupts 110 111 movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE) 112 wsr a2, intset 113 esync 114 rsr a3, interrupt 115 movi a4, ~XCHAL_INTTYPE_MASK_TIMER 116 and a3, a3, a4 117 assert eq, a2, a3 118 wsr a2, intenable 119 waiti 0 120 test_fail 1211: 122 check_l1 123test_end 124 125test soft_user 126 set_vector kernel, 1f 127 set_vector user, 2f 128 clear_interrupts 129 130 movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE) 131 wsr a2, intset 132 esync 133 rsr a3, interrupt 134 movi a4, ~XCHAL_INTTYPE_MASK_TIMER 135 and a3, a3, a4 136 assert eq, a2, a3 137 wsr a2, intenable 138 139 rsr a2, ps 140 movi a3, 0x20 141 or a2, a2, a3 142 wsr a2, ps 143 waiti 0 1441: 145 test_fail 1462: 147 check_l1 148test_end 149 150test soft_priority 151 set_vector kernel, 1f 152 set_vector level3, 2f 153 clear_interrupts 154 155 movi a2, XCHAL_INTTYPE_MASK_SOFTWARE 156 wsr a2, intenable 157 rsil a3, 0 158 esync 159 wsr a2, intset 160 esync 1611: 162 test_fail 1632: 164 rsr a2, ps 165 movi a3, 0x1f /* EXCM | INTMASK */ 166 and a2, a2, a3 167 movi a3, 0x13 168 assert eq, a2, a3 /* EXCM and INTMASK are set 169 for high-priority interrupt */ 170test_end 171 172test eps_epc_rfi 173 set_vector level3, 3f 174 clear_interrupts 175 reset_ps 176 177 movi a2, XCHAL_INTTYPE_MASK_SOFTWARE 178 wsr a2, intenable 179 rsil a3, 0 180 rsr a3, ps 181 esync 182 wsr a2, intset 1831: 184 esync 1852: 186 test_fail 1873: 188 rsr a2, eps3 189 assert eq, a2, a3 190 rsr a2, epc3 191 movi a3, 1b 192 assert ge, a2, a3 193 movi a3, 2b 194 assert ge, a3, a2 195 movi a2, 4f 196 wsr a2, epc3 197 movi a2, 0x40003 198 wsr a2, eps3 199 rfi 3 200 test_fail 2014: 202 rsr a2, ps 203 movi a3, 0x40003 204 assert eq, a2, a3 205test_end 206 207test_suite_end 208