xref: /openbmc/qemu/tests/tcg/xtensa/test_fp0_conv.S (revision b4b9a0e3) 
1#include "macros.inc"
2#include "fpu.h"
3
4test_suite fp0_conv
5
6#if XCHAL_HAVE_FP
7
8.macro movfp fr, v
9    movi    a2, \v
10    wfr     \fr, a2
11.endm
12
13.macro test_ftoi_ex op, r0, fr0, v, c, r, sr
14    movi    a2, 0
15    wur     a2, fsr
16    movfp   \fr0, \v
17    \op     \r0, \fr0, \c
18    dump    \r0
19    movi    a3, \r
20    assert  eq, \r0, a3
21    rur     a2, fsr
22#if DFPU
23    movi    a3, \sr
24    assert  eq, a2, a3
25#else
26    assert  eqi, a2, 0
27#endif
28.endm
29
30.macro test_ftoi op, r0, fr0, v, c, r, sr
31    movi    a2, 0
32    wur     a2, fcr
33    test_ftoi_ex \op, \r0, \fr0, \v, \c, \r, \sr
34    movi    a2, 0x7c
35    wur     a2, fcr
36    test_ftoi_ex \op, \r0, \fr0, \v, \c, \r, \sr
37.endm
38
39
40.macro test_itof_ex op, fr0, ar0, v, c, r, sr
41    movi    a2, 0
42    wur     a2, fsr
43    movi    \ar0, \v
44    \op     \fr0, \ar0, \c
45
46    rfr     a2, \fr0
47    dump    a2
48    movi    a3, \r
49    assert  eq, a2, a3
50    rur     a2, fsr
51#if DFPU
52    movi    a3, \sr
53    assert  eq, a2, a3
54#else
55    assert  eqi, a2, 0
56#endif
57.endm
58
59.macro test_itof_rm op, fr0, ar0, v, c, rm, r, sr
60    movi    a2, \rm
61    wur     a2, fcr
62    test_itof_ex \op, \fr0, \ar0, \v, \c, \r, \sr
63    movi    a2, (\rm) | 0x7c
64    wur     a2, fcr
65    test_itof_ex \op, \fr0, \ar0, \v, \c, \r, \sr
66.endm
67
68.macro test_itof op, fr0, ar0, v, c, r0, r1, r2, r3, sr
69    test_itof_rm \op, \fr0, \ar0, \v, \c, 0, \r0, \sr
70    test_itof_rm \op, \fr0, \ar0, \v, \c, 1, \r1, \sr
71    test_itof_rm \op, \fr0, \ar0, \v, \c, 2, \r2, \sr
72    test_itof_rm \op, \fr0, \ar0, \v, \c, 3, \r3, \sr
73.endm
74
75test round_s
76    movi    a2, 1
77    wsr     a2, cpenable
78
79    /* NaN */
80    test_ftoi round.s, a2, f0, 0xffc00001, 0, 0x7fffffff, FSR_V
81    test_ftoi round.s, a2, f0, 0xff800001, 0, 0x7fffffff, FSR_V
82
83    /* -inf */
84    test_ftoi round.s, a2, f0, 0xff800000, 0, 0x80000000, FSR_V
85
86    /* negative overflow */
87    test_ftoi round.s, a2, f0, 0xceffffff, 1, 0x80000000, FSR_V
88    test_ftoi round.s, a2, f0, 0xcf000000, 0, 0x80000000, FSR__
89    test_ftoi round.s, a2, f0, 0xceffffff, 0, 0x80000080, FSR__
90
91    /* negative */
92    test_ftoi round.s, a2, f0, 0xbfa00000, 1, -2, FSR_I  /* -1.25 * 2 */
93    test_ftoi round.s, a2, f0, 0xbfc00000, 0, -2, FSR_I  /* -1.5 */
94    test_ftoi round.s, a2, f0, 0xbf800000, 1, -2, FSR__  /* -1 * 2 */
95    test_ftoi round.s, a2, f0, 0xbf800000, 0, -1, FSR__  /* -1 */
96    test_ftoi round.s, a2, f0, 0xbf400000, 0, -1, FSR_I  /* -0.75 */
97    test_ftoi round.s, a2, f0, 0xbf000000, 0,  0, FSR_I  /* -0.5 */
98
99    /* positive */
100    test_ftoi round.s, a2, f0, 0x3f000000, 0, 0, FSR_I /* 0.5 */
101    test_ftoi round.s, a2, f0, 0x3f400000, 0, 1, FSR_I /* 0.75 */
102    test_ftoi round.s, a2, f0, 0x3f800000, 0, 1, FSR__ /* 1 */
103    test_ftoi round.s, a2, f0, 0x3f800000, 1, 2, FSR__ /* 1 * 2 */
104    test_ftoi round.s, a2, f0, 0x3fc00000, 0, 2, FSR_I /* 1.5 */
105    test_ftoi round.s, a2, f0, 0x3fa00000, 1, 2, FSR_I /* 1.25 * 2 */
106
107    /* positive overflow */
108    test_ftoi round.s, a2, f0, 0x4effffff, 0, 0x7fffff80, FSR__
109    test_ftoi round.s, a2, f0, 0x4f000000, 0, 0x7fffffff, FSR_V
110    test_ftoi round.s, a2, f0, 0x4effffff, 1, 0x7fffffff, FSR_V
111
112    /* +inf */
113    test_ftoi round.s, a2, f0, 0x7f800000, 0, 0x7fffffff, FSR_V
114
115    /* NaN */
116    test_ftoi round.s, a2, f0, 0x7f800001, 0, 0x7fffffff, FSR_V
117    test_ftoi round.s, a2, f0, 0x7fc00000, 0, 0x7fffffff, FSR_V
118test_end
119
120test trunc_s
121    /* NaN */
122    test_ftoi trunc.s, a2, f0, 0xffc00001, 0, 0x7fffffff, FSR_V
123    test_ftoi trunc.s, a2, f0, 0xff800001, 0, 0x7fffffff, FSR_V
124
125    /* -inf */
126    test_ftoi trunc.s, a2, f0, 0xff800000, 0, 0x80000000, FSR_V
127
128    /* negative overflow */
129    test_ftoi trunc.s, a2, f0, 0xceffffff, 1, 0x80000000, FSR_V
130    test_ftoi trunc.s, a2, f0, 0xcf000000, 0, 0x80000000, FSR__
131    test_ftoi trunc.s, a2, f0, 0xceffffff, 0, 0x80000080, FSR__
132
133    /* negative */
134    test_ftoi trunc.s, a2, f0, 0xbfa00000, 1, -2, FSR_I /* -1.25 * 2 */
135    test_ftoi trunc.s, a2, f0, 0xbfc00000, 0, -1, FSR_I /* -1.5 */
136    test_ftoi trunc.s, a2, f0, 0xbf800000, 1, -2, FSR__ /* -1 * 2 */
137    test_ftoi trunc.s, a2, f0, 0xbf800000, 0, -1, FSR__ /* -1 */
138    test_ftoi trunc.s, a2, f0, 0xbf400000, 0,  0, FSR_I /* -0.75 */
139    test_ftoi trunc.s, a2, f0, 0xbf000000, 0,  0, FSR_I /* -0.5 */
140
141    /* positive */
142    test_ftoi trunc.s, a2, f0, 0x3f000000, 0, 0, FSR_I /* 0.5 */
143    test_ftoi trunc.s, a2, f0, 0x3f400000, 0, 0, FSR_I /* 0.75 */
144    test_ftoi trunc.s, a2, f0, 0x3f800000, 0, 1, FSR__ /* 1 */
145    test_ftoi trunc.s, a2, f0, 0x3f800000, 1, 2, FSR__ /* 1 * 2 */
146    test_ftoi trunc.s, a2, f0, 0x3fc00000, 0, 1, FSR_I /* 1.5 */
147    test_ftoi trunc.s, a2, f0, 0x3fa00000, 1, 2, FSR_I /* 1.25 * 2 */
148
149    /* positive overflow */
150    test_ftoi trunc.s, a2, f0, 0x4effffff, 0, 0x7fffff80, FSR__
151    test_ftoi trunc.s, a2, f0, 0x4f000000, 0, 0x7fffffff, FSR_V
152    test_ftoi trunc.s, a2, f0, 0x4effffff, 1, 0x7fffffff, FSR_V
153
154    /* +inf */
155    test_ftoi trunc.s, a2, f0, 0x7f800000, 0, 0x7fffffff, FSR_V
156
157    /* NaN */
158    test_ftoi trunc.s, a2, f0, 0x7f800001, 0, 0x7fffffff, FSR_V
159    test_ftoi trunc.s, a2, f0, 0x7fc00000, 0, 0x7fffffff, FSR_V
160test_end
161
162test floor_s
163    /* NaN */
164    test_ftoi floor.s, a2, f0, 0xffc00001, 0, 0x7fffffff, FSR_V
165    test_ftoi floor.s, a2, f0, 0xff800001, 0, 0x7fffffff, FSR_V
166
167    /* -inf */
168    test_ftoi floor.s, a2, f0, 0xff800000, 0, 0x80000000, FSR_V
169
170    /* negative overflow */
171    test_ftoi floor.s, a2, f0, 0xceffffff, 1, 0x80000000, FSR_V
172    test_ftoi floor.s, a2, f0, 0xcf000000, 0, 0x80000000, FSR__
173    test_ftoi floor.s, a2, f0, 0xceffffff, 0, 0x80000080, FSR__
174
175    /* negative */
176    test_ftoi floor.s, a2, f0, 0xbfa00000, 1, -3, FSR_I /* -1.25 * 2 */
177    test_ftoi floor.s, a2, f0, 0xbfc00000, 0, -2, FSR_I /* -1.5 */
178    test_ftoi floor.s, a2, f0, 0xbf800000, 1, -2, FSR__ /* -1 * 2 */
179    test_ftoi floor.s, a2, f0, 0xbf800000, 0, -1, FSR__ /* -1 */
180    test_ftoi floor.s, a2, f0, 0xbf400000, 0, -1, FSR_I /* -0.75 */
181    test_ftoi floor.s, a2, f0, 0xbf000000, 0, -1, FSR_I /* -0.5 */
182
183    /* positive */
184    test_ftoi floor.s, a2, f0, 0x3f000000, 0, 0, FSR_I /* 0.5 */
185    test_ftoi floor.s, a2, f0, 0x3f400000, 0, 0, FSR_I /* 0.75 */
186    test_ftoi floor.s, a2, f0, 0x3f800000, 0, 1, FSR__ /* 1 */
187    test_ftoi floor.s, a2, f0, 0x3f800000, 1, 2, FSR__ /* 1 * 2 */
188    test_ftoi floor.s, a2, f0, 0x3fc00000, 0, 1, FSR_I /* 1.5 */
189    test_ftoi floor.s, a2, f0, 0x3fa00000, 1, 2, FSR_I /* 1.25 * 2 */
190
191    /* positive overflow */
192    test_ftoi floor.s, a2, f0, 0x4effffff, 0, 0x7fffff80, FSR__
193    test_ftoi floor.s, a2, f0, 0x4f000000, 0, 0x7fffffff, FSR_V
194    test_ftoi floor.s, a2, f0, 0x4effffff, 1, 0x7fffffff, FSR_V
195
196    /* +inf */
197    test_ftoi floor.s, a2, f0, 0x7f800000, 0, 0x7fffffff, FSR_V
198
199    /* NaN */
200    test_ftoi floor.s, a2, f0, 0x7f800001, 0, 0x7fffffff, FSR_V
201    test_ftoi floor.s, a2, f0, 0x7fc00000, 0, 0x7fffffff, FSR_V
202test_end
203
204test ceil_s
205    /* NaN */
206    test_ftoi ceil.s, a2, f0, 0xffc00001, 0, 0x7fffffff, FSR_V
207    test_ftoi ceil.s, a2, f0, 0xff800001, 0, 0x7fffffff, FSR_V
208
209    /* -inf */
210    test_ftoi ceil.s, a2, f0, 0xff800000, 0, 0x80000000, FSR_V
211
212    /* negative overflow */
213    test_ftoi ceil.s, a2, f0, 0xceffffff, 1, 0x80000000, FSR_V
214    test_ftoi ceil.s, a2, f0, 0xcf000000, 0, 0x80000000, FSR__
215    test_ftoi ceil.s, a2, f0, 0xceffffff, 0, 0x80000080, FSR__
216
217    /* negative */
218    test_ftoi ceil.s, a2, f0, 0xbfa00000, 1, -2, FSR_I /* -1.25 * 2 */
219    test_ftoi ceil.s, a2, f0, 0xbfc00000, 0, -1, FSR_I /* -1.5 */
220    test_ftoi ceil.s, a2, f0, 0xbf800000, 1, -2, FSR__ /* -1 * 2 */
221    test_ftoi ceil.s, a2, f0, 0xbf800000, 0, -1, FSR__ /* -1 */
222    test_ftoi ceil.s, a2, f0, 0xbf400000, 0,  0, FSR_I /* -0.75 */
223    test_ftoi ceil.s, a2, f0, 0xbf000000, 0,  0, FSR_I /* -0.5 */
224
225    /* positive */
226    test_ftoi ceil.s, a2, f0, 0x3f000000, 0, 1, FSR_I /* 0.5 */
227    test_ftoi ceil.s, a2, f0, 0x3f400000, 0, 1, FSR_I /* 0.75 */
228    test_ftoi ceil.s, a2, f0, 0x3f800000, 0, 1, FSR__ /* 1 */
229    test_ftoi ceil.s, a2, f0, 0x3f800000, 1, 2, FSR__ /* 1 * 2 */
230    test_ftoi ceil.s, a2, f0, 0x3fc00000, 0, 2, FSR_I /* 1.5 */
231    test_ftoi ceil.s, a2, f0, 0x3fa00000, 1, 3, FSR_I /* 1.25 * 2 */
232
233    /* positive overflow */
234    test_ftoi ceil.s, a2, f0, 0x4effffff, 0, 0x7fffff80, FSR__
235    test_ftoi ceil.s, a2, f0, 0x4f000000, 0, 0x7fffffff, FSR_V
236    test_ftoi ceil.s, a2, f0, 0x4effffff, 1, 0x7fffffff, FSR_V
237
238    /* +inf */
239    test_ftoi ceil.s, a2, f0, 0x7f800000, 0, 0x7fffffff, FSR_V
240
241    /* NaN */
242    test_ftoi ceil.s, a2, f0, 0x7f800001, 0, 0x7fffffff, FSR_V
243    test_ftoi ceil.s, a2, f0, 0x7fc00000, 0, 0x7fffffff, FSR_V
244test_end
245
246test utrunc_s
247    /* NaN */
248    test_ftoi utrunc.s, a2, f0, 0xffc00001, 0, 0xffffffff, FSR_V
249    test_ftoi utrunc.s, a2, f0, 0xff800001, 0, 0xffffffff, FSR_V
250
251    /* -inf */
252    test_ftoi utrunc.s, a2, f0, 0xff800000, 0, 0x80000000, FSR_V
253
254    /* negative overflow */
255    test_ftoi utrunc.s, a2, f0, 0xceffffff, 1, 0x80000000, FSR_V
256    test_ftoi utrunc.s, a2, f0, 0xcf000000, 0, 0x80000000, FSR_V
257    test_ftoi utrunc.s, a2, f0, 0xceffffff, 0, 0x80000080, FSR_V
258
259    /* negative */
260    test_ftoi utrunc.s, a2, f0, 0xbfa00000, 1, -2, FSR_V /* -1.25 * 2 */
261    test_ftoi utrunc.s, a2, f0, 0xbfc00000, 0, -1, FSR_V /* -1.5 */
262    test_ftoi utrunc.s, a2, f0, 0xbf800000, 1, -2, FSR_V /* -1 * 2 */
263    test_ftoi utrunc.s, a2, f0, 0xbf800000, 0, -1, FSR_V /* -1 */
264    test_ftoi utrunc.s, a2, f0, 0xbf400000, 0,  0, FSR_I /* -0.75 */
265    test_ftoi utrunc.s, a2, f0, 0xbf000000, 0,  0, FSR_I /* -0.5 */
266
267    /* positive */
268    test_ftoi utrunc.s, a2, f0, 0x3f000000, 0, 0, FSR_I /* 0.5 */
269    test_ftoi utrunc.s, a2, f0, 0x3f400000, 0, 0, FSR_I /* 0.75 */
270    test_ftoi utrunc.s, a2, f0, 0x3f800000, 0, 1, FSR__ /* 1 */
271    test_ftoi utrunc.s, a2, f0, 0x3f800000, 1, 2, FSR__ /* 1 * 2 */
272    test_ftoi utrunc.s, a2, f0, 0x3fc00000, 0, 1, FSR_I /* 1.5 */
273    test_ftoi utrunc.s, a2, f0, 0x3fa00000, 1, 2, FSR_I /* 1.25 * 2 */
274
275    /* positive overflow */
276    test_ftoi utrunc.s, a2, f0, 0x4effffff, 0, 0x7fffff80, FSR__
277    test_ftoi utrunc.s, a2, f0, 0x4f000000, 0, 0x80000000, FSR__
278    test_ftoi utrunc.s, a2, f0, 0x4effffff, 1, 0xffffff00, FSR__
279    test_ftoi utrunc.s, a2, f0, 0x4f800000, 1, 0xffffffff, FSR_V
280
281    /* +inf */
282    test_ftoi utrunc.s, a2, f0, 0x7f800000, 0, 0xffffffff, FSR_V
283
284    /* NaN */
285    test_ftoi utrunc.s, a2, f0, 0x7f800001, 0, 0xffffffff, FSR_V
286    test_ftoi utrunc.s, a2, f0, 0x7fc00000, 0, 0xffffffff, FSR_V
287test_end
288
289test float_s
290    test_itof float.s, f0, a2, -1, 0, \
291        0xbf800000, 0xbf800000, 0xbf800000, 0xbf800000, FSR__
292    test_itof float.s, f0, a2, 0, 0, 0, 0, 0, 0, FSR__
293    test_itof float.s, f0, a2, 1, 1, \
294        0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, FSR__
295    test_itof float.s, f0, a2, 1, 0, \
296        0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, FSR__
297    test_itof float.s, f0, a2, 0x7fffffff, 0, \
298        0x4f000000, 0x4effffff, 0x4f000000, 0x4effffff, FSR_I
299test_end
300
301test ufloat_s
302    test_itof ufloat.s, f0, a2, 0, 0, 0, 0, 0, 0, FSR__
303    test_itof ufloat.s, f0, a2, 1, 1, \
304        0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, FSR__
305    test_itof ufloat.s, f0, a2, 1, 0, \
306        0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, FSR__
307    test_itof ufloat.s, f0, a2, 0x7fffffff, 0, \
308        0x4f000000, 0x4effffff, 0x4f000000, 0x4effffff, FSR_I
309    test_itof ufloat.s, f0, a2, 0xffffffff, 0, \
310        0x4f800000, 0x4f7fffff, 0x4f800000, 0x4f7fffff, FSR_I
311test_end
312
313#endif
314
315test_suite_end
316