xref: /openbmc/qemu/tests/tcg/s390x/per.S (revision 6fdc5bc1)
1	.org	0x8d
2ilc:
3	.org	0x8e
4program_interruption_code:
5	.org	0x96
6per_code:
7	.org	0x98
8per_address:
9	.org	0x150
10program_old_psw:
11	.org	0x1d0
12program_new_psw:
13	.quad	0, pgm_handler
14
15	.org	0x200			/* exit lowcore */
16
17per_on_psw:
18	.quad	0x4000000000000000, start_per
19per_on_regs:
20	.quad	0x80000000, 0, -1	/* successful-branching everywhere */
21per_off_regs:
22	.quad	0, 0 ,0
23success_psw:
24	.quad	0x2000000000000, 0xfff	/* see is_special_wait_psw() */
25failure_psw:
26	.quad	0x2000000000000, 0	/* disabled wait */
27
28	.org	0x2000			/* exit lowcore pages */
29
30	.globl _start
31_start:
32	lpswe	per_on_psw
33start_per:
34	lctlg	%c9, %c11, per_on_regs
35
36/* Test unconditional relative branch. */
37	larl	%r0, j1
38	larl	%r1, d1
39	lhi	%r2, 0
40j1:	j	d1
41	lpswe	failure_psw
42d1:
43
44/* Test unconditional indirect branch. */
45	larl	%r0, j2
46	larl	%r1, d2
47j2:	br	%r1
48	lpswe	failure_psw
49d2:
50
51/* Test conditional relative branch. */
52	larl	%r0, j3
53	larl	%r1, d3
54	clr	%r1, %r2	/* d3 != 0 */
55j3:	jne	d3
56	lpswe	failure_psw
57d3:
58
59/* Test conditional register branch. */
60	larl	%r0, j4
61	larl	%r1, d4
62	clr	%r1, %r2	/* d4 != 0 */
63j4:	bner	%r1
64	lpswe	failure_psw
65d4:
66
67/* Success! */
68	nop
69	lpswe	success_psw
70
71pgm_handler:
72	chhsi	program_interruption_code, 0x80	/* PER event? */
73	jne	fail
74	cli	per_code, 0x80		/* successful-branching event? */
75	jne	fail
76	clg	%r0, per_address	/* per_address == jump insn? */
77	jne	fail
78	clg	%r1, program_old_psw+8	/* psw.addr updated to dest? */
79	jne	fail
80	lpswe	program_old_psw
81fail:
82	lpswe	failure_psw
83