1 .org 0x200 /* lowcore padding */ 2 .globl _start 3_start: 4 lpswe start24_psw 5_start24: 6 lgrl %r0,initial_r0 7 lgrl %r1,expected_r0 8 bal %r0,0f 90: 10 cgrjne %r0,%r1,1f 11 lpswe success_psw 121: 13 lpswe failure_psw 14 .align 8 15start24_psw: 16 .quad 0x160000000000,_start24 /* 24-bit mode, cc = 1, pm = 6 */ 17initial_r0: 18 .quad 0x1234567887654321 19expected_r0: 20 .quad 0x1234567896000000 + 0b /* ilc = 2, cc = 1, pm = 6 */ 21success_psw: 22 .quad 0x2000000000000,0xfff /* see is_special_wait_psw() */ 23failure_psw: 24 .quad 0x2000000000000,0 /* disabled wait */ 25