xref: /openbmc/qemu/tests/tcg/ppc64/xxspltw.c (revision ed75658a)
1 #include <stdio.h>
2 #include <stdint.h>
3 #include <inttypes.h>
4 #include <assert.h>
5 
6 #define WORD_A 0xAAAAAAAAUL
7 #define WORD_B 0xBBBBBBBBUL
8 #define WORD_C 0xCCCCCCCCUL
9 #define WORD_D 0xDDDDDDDDUL
10 
11 #define DWORD_HI (WORD_A << 32 | WORD_B)
12 #define DWORD_LO (WORD_C << 32 | WORD_D)
13 
14 #define TEST(HI, LO, UIM, RES) \
15     do {                                                        \
16         union {                                                 \
17             uint64_t u;                                         \
18             double f;                                           \
19         } h = { .u = HI }, l = { .u = LO };                     \
20         /*                                                      \
21          * Use a pair of FPRs to load the VSR avoiding insns    \
22          * newer than xxswapd.                                  \
23          */                                                     \
24         asm("xxmrghd 32, %0, %1\n\t"                            \
25             "xxspltw 32, 32, %2\n\t"                            \
26             "xxmrghd %0, 32, %0\n\t"                            \
27             "xxswapd 32, 32\n\t"                                \
28             "xxmrghd %1, 32, %1\n\t"                            \
29             : "+f" (h.f), "+f" (l.f)                            \
30             : "i" (UIM)                                         \
31             : "v0");                                            \
32         printf("xxspltw(0x%016" PRIx64 "%016" PRIx64 ", %d) ="  \
33                " %016" PRIx64 "%016" PRIx64 "\n", HI, LO, UIM,  \
34                h.u, l.u);                                       \
35         assert(h.u == (RES));                                   \
36         assert(l.u == (RES));                                   \
37     } while (0)
38 
39 int main(void)
40 {
41     TEST(DWORD_HI, DWORD_LO, 0, WORD_A << 32 | WORD_A);
42     TEST(DWORD_HI, DWORD_LO, 1, WORD_B << 32 | WORD_B);
43     TEST(DWORD_HI, DWORD_LO, 2, WORD_C << 32 | WORD_C);
44     TEST(DWORD_HI, DWORD_LO, 3, WORD_D << 32 | WORD_D);
45     return 0;
46 }
47