1 /* 2 * Aspeed i2c bus interface to reading and writing to i2c device registers 3 * 4 * Copyright (c) 2023 IBM Corporation 5 * 6 * Authors: 7 * Stefan Berger <stefanb@linux.ibm.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 #ifndef QTEST_ASPEED_H 13 #define QTEST_ASPEED_H 14 15 #include <stdint.h> 16 17 #include "libqtest.h" 18 19 #define AST2600_ASPEED_I2C_BASE_ADDR 0x1e78a000 20 21 /* Implements only AST2600 I2C controller */ 22 23 static inline uint32_t ast2600_i2c_calc_bus_addr(uint8_t bus_num) 24 { 25 return AST2600_ASPEED_I2C_BASE_ADDR + 0x80 + bus_num * 0x80; 26 } 27 28 uint8_t aspeed_i2c_readb(QTestState *s, 29 uint32_t baseaddr, uint8_t slave_addr, uint8_t reg); 30 uint16_t aspeed_i2c_readw(QTestState *s, 31 uint32_t baseaddr, uint8_t slave_addr, uint8_t reg); 32 uint32_t aspeed_i2c_readl(QTestState *s, 33 uint32_t baseaddr, uint8_t slave_addr, uint8_t reg); 34 void aspeed_i2c_writeb(QTestState *s, uint32_t baseaddr, uint8_t slave_addr, 35 uint8_t reg, uint8_t v); 36 void aspeed_i2c_writew(QTestState *s, uint32_t baseaddr, uint8_t slave_addr, 37 uint8_t reg, uint16_t v); 38 void aspeed_i2c_writel(QTestState *s, uint32_t baseaddr, uint8_t slave_addr, 39 uint8_t reg, uint32_t v); 40 41 #endif 42