1 /* 2 * QTests for Nuvoton NPCM7xx PWM Modules. 3 * 4 * Copyright 2020 Google LLC 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 * for more details. 15 */ 16 17 #include "qemu/osdep.h" 18 #include "qemu/bitops.h" 19 #include "libqos/libqtest.h" 20 #include "qapi/qmp/qdict.h" 21 #include "qapi/qmp/qnum.h" 22 23 #define REF_HZ 25000000 24 25 /* Register field definitions. */ 26 #define CH_EN BIT(0) 27 #define CH_INV BIT(2) 28 #define CH_MOD BIT(3) 29 30 /* Registers shared between all PWMs in a module */ 31 #define PPR 0x00 32 #define CSR 0x04 33 #define PCR 0x08 34 #define PIER 0x3c 35 #define PIIR 0x40 36 37 /* CLK module related */ 38 #define CLK_BA 0xf0801000 39 #define CLKSEL 0x04 40 #define CLKDIV1 0x08 41 #define CLKDIV2 0x2c 42 #define PLLCON0 0x0c 43 #define PLLCON1 0x10 44 #define PLL_INDV(rv) extract32((rv), 0, 6) 45 #define PLL_FBDV(rv) extract32((rv), 16, 12) 46 #define PLL_OTDV1(rv) extract32((rv), 8, 3) 47 #define PLL_OTDV2(rv) extract32((rv), 13, 3) 48 #define APB3CKDIV(rv) extract32((rv), 28, 2) 49 #define CLK2CKDIV(rv) extract32((rv), 0, 1) 50 #define CLK4CKDIV(rv) extract32((rv), 26, 2) 51 #define CPUCKSEL(rv) extract32((rv), 0, 2) 52 53 #define MAX_DUTY 1000000 54 55 typedef struct PWMModule { 56 int irq; 57 uint64_t base_addr; 58 } PWMModule; 59 60 typedef struct PWM { 61 uint32_t cnr_offset; 62 uint32_t cmr_offset; 63 uint32_t pdr_offset; 64 uint32_t pwdr_offset; 65 } PWM; 66 67 typedef struct TestData { 68 const PWMModule *module; 69 const PWM *pwm; 70 } TestData; 71 72 static const PWMModule pwm_module_list[] = { 73 { 74 .irq = 93, 75 .base_addr = 0xf0103000 76 }, 77 { 78 .irq = 94, 79 .base_addr = 0xf0104000 80 } 81 }; 82 83 static const PWM pwm_list[] = { 84 { 85 .cnr_offset = 0x0c, 86 .cmr_offset = 0x10, 87 .pdr_offset = 0x14, 88 .pwdr_offset = 0x44, 89 }, 90 { 91 .cnr_offset = 0x18, 92 .cmr_offset = 0x1c, 93 .pdr_offset = 0x20, 94 .pwdr_offset = 0x48, 95 }, 96 { 97 .cnr_offset = 0x24, 98 .cmr_offset = 0x28, 99 .pdr_offset = 0x2c, 100 .pwdr_offset = 0x4c, 101 }, 102 { 103 .cnr_offset = 0x30, 104 .cmr_offset = 0x34, 105 .pdr_offset = 0x38, 106 .pwdr_offset = 0x50, 107 }, 108 }; 109 110 static const int ppr_base[] = { 0, 0, 8, 8 }; 111 static const int csr_base[] = { 0, 4, 8, 12 }; 112 static const int pcr_base[] = { 0, 8, 12, 16 }; 113 114 static const uint32_t ppr_list[] = { 115 0, 116 1, 117 10, 118 100, 119 255, /* Max possible value. */ 120 }; 121 122 static const uint32_t csr_list[] = { 123 0, 124 1, 125 2, 126 3, 127 4, /* Max possible value. */ 128 }; 129 130 static const uint32_t cnr_list[] = { 131 0, 132 1, 133 50, 134 100, 135 150, 136 200, 137 1000, 138 10000, 139 65535, /* Max possible value. */ 140 }; 141 142 static const uint32_t cmr_list[] = { 143 0, 144 1, 145 10, 146 50, 147 100, 148 150, 149 200, 150 1000, 151 10000, 152 65535, /* Max possible value. */ 153 }; 154 155 /* Returns the index of the PWM module. */ 156 static int pwm_module_index(const PWMModule *module) 157 { 158 ptrdiff_t diff = module - pwm_module_list; 159 160 g_assert_true(diff >= 0 && diff < ARRAY_SIZE(pwm_module_list)); 161 162 return diff; 163 } 164 165 /* Returns the index of the PWM entry. */ 166 static int pwm_index(const PWM *pwm) 167 { 168 ptrdiff_t diff = pwm - pwm_list; 169 170 g_assert_true(diff >= 0 && diff < ARRAY_SIZE(pwm_list)); 171 172 return diff; 173 } 174 175 static uint64_t pwm_qom_get(QTestState *qts, const char *path, const char *name) 176 { 177 QDict *response; 178 179 g_test_message("Getting properties %s from %s", name, path); 180 response = qtest_qmp(qts, "{ 'execute': 'qom-get'," 181 " 'arguments': { 'path': %s, 'property': %s}}", 182 path, name); 183 /* The qom set message returns successfully. */ 184 g_assert_true(qdict_haskey(response, "return")); 185 return qnum_get_uint(qobject_to(QNum, qdict_get(response, "return"))); 186 } 187 188 static uint64_t pwm_get_freq(QTestState *qts, int module_index, int pwm_index) 189 { 190 char path[100]; 191 char name[100]; 192 193 sprintf(path, "/machine/soc/pwm[%d]", module_index); 194 sprintf(name, "freq[%d]", pwm_index); 195 196 return pwm_qom_get(qts, path, name); 197 } 198 199 static uint64_t pwm_get_duty(QTestState *qts, int module_index, int pwm_index) 200 { 201 char path[100]; 202 char name[100]; 203 204 sprintf(path, "/machine/soc/pwm[%d]", module_index); 205 sprintf(name, "duty[%d]", pwm_index); 206 207 return pwm_qom_get(qts, path, name); 208 } 209 210 static uint32_t get_pll(uint32_t con) 211 { 212 return REF_HZ * PLL_FBDV(con) / (PLL_INDV(con) * PLL_OTDV1(con) 213 * PLL_OTDV2(con)); 214 } 215 216 static uint64_t read_pclk(QTestState *qts) 217 { 218 uint64_t freq = REF_HZ; 219 uint32_t clksel = qtest_readl(qts, CLK_BA + CLKSEL); 220 uint32_t pllcon; 221 uint32_t clkdiv1 = qtest_readl(qts, CLK_BA + CLKDIV1); 222 uint32_t clkdiv2 = qtest_readl(qts, CLK_BA + CLKDIV2); 223 224 switch (CPUCKSEL(clksel)) { 225 case 0: 226 pllcon = qtest_readl(qts, CLK_BA + PLLCON0); 227 freq = get_pll(pllcon); 228 break; 229 case 1: 230 pllcon = qtest_readl(qts, CLK_BA + PLLCON1); 231 freq = get_pll(pllcon); 232 break; 233 case 2: 234 break; 235 case 3: 236 break; 237 default: 238 g_assert_not_reached(); 239 } 240 241 freq >>= (CLK2CKDIV(clkdiv1) + CLK4CKDIV(clkdiv1) + APB3CKDIV(clkdiv2)); 242 243 return freq; 244 } 245 246 static uint32_t pwm_selector(uint32_t csr) 247 { 248 switch (csr) { 249 case 0: 250 return 2; 251 case 1: 252 return 4; 253 case 2: 254 return 8; 255 case 3: 256 return 16; 257 case 4: 258 return 1; 259 default: 260 g_assert_not_reached(); 261 } 262 } 263 264 static uint64_t pwm_compute_freq(QTestState *qts, uint32_t ppr, uint32_t csr, 265 uint32_t cnr) 266 { 267 return read_pclk(qts) / ((ppr + 1) * pwm_selector(csr) * (cnr + 1)); 268 } 269 270 static uint64_t pwm_compute_duty(uint32_t cnr, uint32_t cmr, bool inverted) 271 { 272 uint64_t duty; 273 274 if (cnr == 0) { 275 /* PWM is stopped. */ 276 duty = 0; 277 } else if (cmr >= cnr) { 278 duty = MAX_DUTY; 279 } else { 280 duty = MAX_DUTY * (cmr + 1) / (cnr + 1); 281 } 282 283 if (inverted) { 284 duty = MAX_DUTY - duty; 285 } 286 287 return duty; 288 } 289 290 static uint32_t pwm_read(QTestState *qts, const TestData *td, unsigned offset) 291 { 292 return qtest_readl(qts, td->module->base_addr + offset); 293 } 294 295 static void pwm_write(QTestState *qts, const TestData *td, unsigned offset, 296 uint32_t value) 297 { 298 qtest_writel(qts, td->module->base_addr + offset, value); 299 } 300 301 static uint32_t pwm_read_ppr(QTestState *qts, const TestData *td) 302 { 303 return extract32(pwm_read(qts, td, PPR), ppr_base[pwm_index(td->pwm)], 8); 304 } 305 306 static void pwm_write_ppr(QTestState *qts, const TestData *td, uint32_t value) 307 { 308 pwm_write(qts, td, PPR, value << ppr_base[pwm_index(td->pwm)]); 309 } 310 311 static uint32_t pwm_read_csr(QTestState *qts, const TestData *td) 312 { 313 return extract32(pwm_read(qts, td, CSR), csr_base[pwm_index(td->pwm)], 3); 314 } 315 316 static void pwm_write_csr(QTestState *qts, const TestData *td, uint32_t value) 317 { 318 pwm_write(qts, td, CSR, value << csr_base[pwm_index(td->pwm)]); 319 } 320 321 static uint32_t pwm_read_pcr(QTestState *qts, const TestData *td) 322 { 323 return extract32(pwm_read(qts, td, PCR), pcr_base[pwm_index(td->pwm)], 4); 324 } 325 326 static void pwm_write_pcr(QTestState *qts, const TestData *td, uint32_t value) 327 { 328 pwm_write(qts, td, PCR, value << pcr_base[pwm_index(td->pwm)]); 329 } 330 331 static uint32_t pwm_read_cnr(QTestState *qts, const TestData *td) 332 { 333 return pwm_read(qts, td, td->pwm->cnr_offset); 334 } 335 336 static void pwm_write_cnr(QTestState *qts, const TestData *td, uint32_t value) 337 { 338 pwm_write(qts, td, td->pwm->cnr_offset, value); 339 } 340 341 static uint32_t pwm_read_cmr(QTestState *qts, const TestData *td) 342 { 343 return pwm_read(qts, td, td->pwm->cmr_offset); 344 } 345 346 static void pwm_write_cmr(QTestState *qts, const TestData *td, uint32_t value) 347 { 348 pwm_write(qts, td, td->pwm->cmr_offset, value); 349 } 350 351 /* Check pwm registers can be reset to default value */ 352 static void test_init(gconstpointer test_data) 353 { 354 const TestData *td = test_data; 355 QTestState *qts = qtest_init("-machine quanta-gsj"); 356 int module = pwm_module_index(td->module); 357 int pwm = pwm_index(td->pwm); 358 359 g_assert_cmpuint(pwm_get_freq(qts, module, pwm), ==, 0); 360 g_assert_cmpuint(pwm_get_duty(qts, module, pwm), ==, 0); 361 362 qtest_quit(qts); 363 } 364 365 /* One-shot mode should not change frequency and duty cycle. */ 366 static void test_oneshot(gconstpointer test_data) 367 { 368 const TestData *td = test_data; 369 QTestState *qts = qtest_init("-machine quanta-gsj"); 370 int module = pwm_module_index(td->module); 371 int pwm = pwm_index(td->pwm); 372 uint32_t ppr, csr, pcr; 373 int i, j; 374 375 pcr = CH_EN; 376 for (i = 0; i < ARRAY_SIZE(ppr_list); ++i) { 377 ppr = ppr_list[i]; 378 pwm_write_ppr(qts, td, ppr); 379 380 for (j = 0; j < ARRAY_SIZE(csr_list); ++j) { 381 csr = csr_list[j]; 382 pwm_write_csr(qts, td, csr); 383 pwm_write_pcr(qts, td, pcr); 384 385 g_assert_cmpuint(pwm_read_ppr(qts, td), ==, ppr); 386 g_assert_cmpuint(pwm_read_csr(qts, td), ==, csr); 387 g_assert_cmpuint(pwm_read_pcr(qts, td), ==, pcr); 388 g_assert_cmpuint(pwm_get_freq(qts, module, pwm), ==, 0); 389 g_assert_cmpuint(pwm_get_duty(qts, module, pwm), ==, 0); 390 } 391 } 392 393 qtest_quit(qts); 394 } 395 396 /* In toggle mode, the PWM generates correct outputs. */ 397 static void test_toggle(gconstpointer test_data) 398 { 399 const TestData *td = test_data; 400 QTestState *qts = qtest_init("-machine quanta-gsj"); 401 int module = pwm_module_index(td->module); 402 int pwm = pwm_index(td->pwm); 403 uint32_t ppr, csr, pcr, cnr, cmr; 404 int i, j, k, l; 405 uint64_t expected_freq, expected_duty; 406 407 pcr = CH_EN | CH_MOD; 408 for (i = 0; i < ARRAY_SIZE(ppr_list); ++i) { 409 ppr = ppr_list[i]; 410 pwm_write_ppr(qts, td, ppr); 411 412 for (j = 0; j < ARRAY_SIZE(csr_list); ++j) { 413 csr = csr_list[j]; 414 pwm_write_csr(qts, td, csr); 415 416 for (k = 0; k < ARRAY_SIZE(cnr_list); ++k) { 417 cnr = cnr_list[k]; 418 pwm_write_cnr(qts, td, cnr); 419 420 for (l = 0; l < ARRAY_SIZE(cmr_list); ++l) { 421 cmr = cmr_list[l]; 422 pwm_write_cmr(qts, td, cmr); 423 expected_freq = pwm_compute_freq(qts, ppr, csr, cnr); 424 expected_duty = pwm_compute_duty(cnr, cmr, false); 425 426 pwm_write_pcr(qts, td, pcr); 427 g_assert_cmpuint(pwm_read_ppr(qts, td), ==, ppr); 428 g_assert_cmpuint(pwm_read_csr(qts, td), ==, csr); 429 g_assert_cmpuint(pwm_read_pcr(qts, td), ==, pcr); 430 g_assert_cmpuint(pwm_read_cnr(qts, td), ==, cnr); 431 g_assert_cmpuint(pwm_read_cmr(qts, td), ==, cmr); 432 g_assert_cmpuint(pwm_get_duty(qts, module, pwm), 433 ==, expected_duty); 434 if (expected_duty != 0 && expected_duty != 100) { 435 /* Duty cycle with 0 or 100 doesn't need frequency. */ 436 g_assert_cmpuint(pwm_get_freq(qts, module, pwm), 437 ==, expected_freq); 438 } 439 440 /* Test inverted mode */ 441 expected_duty = pwm_compute_duty(cnr, cmr, true); 442 pwm_write_pcr(qts, td, pcr | CH_INV); 443 g_assert_cmpuint(pwm_read_pcr(qts, td), ==, pcr | CH_INV); 444 g_assert_cmpuint(pwm_get_duty(qts, module, pwm), 445 ==, expected_duty); 446 if (expected_duty != 0 && expected_duty != 100) { 447 /* Duty cycle with 0 or 100 doesn't need frequency. */ 448 g_assert_cmpuint(pwm_get_freq(qts, module, pwm), 449 ==, expected_freq); 450 } 451 452 } 453 } 454 } 455 } 456 457 qtest_quit(qts); 458 } 459 460 static void pwm_add_test(const char *name, const TestData* td, 461 GTestDataFunc fn) 462 { 463 g_autofree char *full_name = g_strdup_printf( 464 "npcm7xx_pwm/module[%d]/pwm[%d]/%s", pwm_module_index(td->module), 465 pwm_index(td->pwm), name); 466 qtest_add_data_func(full_name, td, fn); 467 } 468 #define add_test(name, td) pwm_add_test(#name, td, test_##name) 469 470 int main(int argc, char **argv) 471 { 472 TestData test_data_list[ARRAY_SIZE(pwm_module_list) * ARRAY_SIZE(pwm_list)]; 473 474 g_test_init(&argc, &argv, NULL); 475 476 for (int i = 0; i < ARRAY_SIZE(pwm_module_list); ++i) { 477 for (int j = 0; j < ARRAY_SIZE(pwm_list); ++j) { 478 TestData *td = &test_data_list[i * ARRAY_SIZE(pwm_list) + j]; 479 480 td->module = &pwm_module_list[i]; 481 td->pwm = &pwm_list[j]; 482 483 add_test(init, td); 484 add_test(oneshot, td); 485 add_test(toggle, td); 486 } 487 } 488 489 return g_test_run(); 490 } 491