1*212c1933SFabiano Rosas# 2*212c1933SFabiano Rosas# Copyright (c) 2018 Red Hat, Inc. and/or its affiliates 3*212c1933SFabiano Rosas# 4*212c1933SFabiano Rosas# Author: 5*212c1933SFabiano Rosas# Wei Huang <wei@redhat.com> 6*212c1933SFabiano Rosas# 7*212c1933SFabiano Rosas# This work is licensed under the terms of the GNU GPL, version 2 or later. 8*212c1933SFabiano Rosas# See the COPYING file in the top-level directory. 9*212c1933SFabiano Rosas# 10*212c1933SFabiano Rosas# Note: Please make sure the compiler compiles the assembly code below with 11*212c1933SFabiano Rosas# pc-relative address. Also the branch instructions should use relative 12*212c1933SFabiano Rosas# addresses only. 13*212c1933SFabiano Rosas 14*212c1933SFabiano Rosas#include "../migration-test.h" 15*212c1933SFabiano Rosas 16*212c1933SFabiano Rosas.section .text 17*212c1933SFabiano Rosas 18*212c1933SFabiano Rosas .globl _start 19*212c1933SFabiano Rosas 20*212c1933SFabiano Rosas_start: 21*212c1933SFabiano Rosas /* disable MMU to use phys mem address */ 22*212c1933SFabiano Rosas mrs x0, sctlr_el1 23*212c1933SFabiano Rosas bic x0, x0, #(1<<0) 24*212c1933SFabiano Rosas msr sctlr_el1, x0 25*212c1933SFabiano Rosas isb 26*212c1933SFabiano Rosas 27*212c1933SFabiano Rosas /* traverse test memory region */ 28*212c1933SFabiano Rosas mov x0, #ARM_TEST_MEM_START 29*212c1933SFabiano Rosas mov x1, #ARM_TEST_MEM_END 30*212c1933SFabiano Rosas 31*212c1933SFabiano Rosas /* output char 'A' to PL011 */ 32*212c1933SFabiano Rosas mov w3, 'A' 33*212c1933SFabiano Rosas mov x2, #ARM_MACH_VIRT_UART 34*212c1933SFabiano Rosas strb w3, [x2] 35*212c1933SFabiano Rosas 36*212c1933SFabiano Rosas /* clean up memory */ 37*212c1933SFabiano Rosas mov w3, #0 38*212c1933SFabiano Rosas mov x4, x0 39*212c1933SFabiano Rosasclean: 40*212c1933SFabiano Rosas strb w3, [x4] 41*212c1933SFabiano Rosas add x4, x4, #TEST_MEM_PAGE_SIZE 42*212c1933SFabiano Rosas cmp x4, x1 43*212c1933SFabiano Rosas ble clean 44*212c1933SFabiano Rosas 45*212c1933SFabiano Rosas /* w5 keeps a counter so we can limit the output speed */ 46*212c1933SFabiano Rosas mov w5, #0 47*212c1933SFabiano Rosas 48*212c1933SFabiano Rosas /* main body */ 49*212c1933SFabiano Rosasmainloop: 50*212c1933SFabiano Rosas mov x4, x0 51*212c1933SFabiano Rosas 52*212c1933SFabiano Rosasinnerloop: 53*212c1933SFabiano Rosas /* increment the first byte of each page by 1 */ 54*212c1933SFabiano Rosas ldrb w3, [x4] 55*212c1933SFabiano Rosas add w3, w3, #1 56*212c1933SFabiano Rosas strb w3, [x4] 57*212c1933SFabiano Rosas 58*212c1933SFabiano Rosas /* make sure QEMU user space can see consistent data as MMU is off */ 59*212c1933SFabiano Rosas dc civac, x4 60*212c1933SFabiano Rosas 61*212c1933SFabiano Rosas add x4, x4, #TEST_MEM_PAGE_SIZE 62*212c1933SFabiano Rosas cmp x4, x1 63*212c1933SFabiano Rosas blt innerloop 64*212c1933SFabiano Rosas 65*212c1933SFabiano Rosas add w5, w5, #1 66*212c1933SFabiano Rosas and w5, w5, #0x1f 67*212c1933SFabiano Rosas cmp w5, #0 68*212c1933SFabiano Rosas bne mainloop 69*212c1933SFabiano Rosas 70*212c1933SFabiano Rosas /* output char 'B' to PL011 */ 71*212c1933SFabiano Rosas mov w3, 'B' 72*212c1933SFabiano Rosas strb w3, [x2] 73*212c1933SFabiano Rosas 74*212c1933SFabiano Rosas b mainloop 75