xref: /openbmc/qemu/tests/qtest/fuzz/generic_fuzz.c (revision a67dfa66)
1 /*
2  * Generic Virtual-Device Fuzzing Target
3  *
4  * Copyright Red Hat Inc., 2020
5  *
6  * Authors:
7  *  Alexander Bulekov   <alxndr@bu.edu>
8  *
9  * This work is licensed under the terms of the GNU GPL, version 2 or later.
10  * See the COPYING file in the top-level directory.
11  */
12 
13 #include "qemu/osdep.h"
14 
15 #include <wordexp.h>
16 
17 #include "hw/core/cpu.h"
18 #include "tests/qtest/libqtest.h"
19 #include "tests/qtest/libqos/pci-pc.h"
20 #include "fuzz.h"
21 #include "fork_fuzz.h"
22 #include "string.h"
23 #include "exec/memory.h"
24 #include "exec/ramblock.h"
25 #include "hw/qdev-core.h"
26 #include "hw/pci/pci.h"
27 #include "hw/pci/pci_device.h"
28 #include "hw/boards.h"
29 #include "generic_fuzz_configs.h"
30 #include "hw/mem/sparse-mem.h"
31 
32 /*
33  * SEPARATOR is used to separate "operations" in the fuzz input
34  */
35 #define SEPARATOR "FUZZ"
36 
37 enum cmds {
38     OP_IN,
39     OP_OUT,
40     OP_READ,
41     OP_WRITE,
42     OP_PCI_READ,
43     OP_PCI_WRITE,
44     OP_DISABLE_PCI,
45     OP_ADD_DMA_PATTERN,
46     OP_CLEAR_DMA_PATTERNS,
47     OP_CLOCK_STEP,
48 };
49 
50 #define DEFAULT_TIMEOUT_US 100000
51 #define USEC_IN_SEC 1000000000
52 
53 #define MAX_DMA_FILL_SIZE 0x10000
54 
55 #define PCI_HOST_BRIDGE_CFG 0xcf8
56 #define PCI_HOST_BRIDGE_DATA 0xcfc
57 
58 typedef struct {
59     ram_addr_t addr;
60     ram_addr_t size; /* The number of bytes until the end of the I/O region */
61 } address_range;
62 
63 static useconds_t timeout = DEFAULT_TIMEOUT_US;
64 
65 static bool qtest_log_enabled;
66 
67 MemoryRegion *sparse_mem_mr;
68 
69 /*
70  * A pattern used to populate a DMA region or perform a memwrite. This is
71  * useful for e.g. populating tables of unique addresses.
72  * Example {.index = 1; .stride = 2; .len = 3; .data = "\x00\x01\x02"}
73  * Renders as: 00 01 02   00 03 02   00 05 02   00 07 02 ...
74  */
75 typedef struct {
76     uint8_t index;      /* Index of a byte to increment by stride */
77     uint8_t stride;     /* Increment each index'th byte by this amount */
78     size_t len;
79     const uint8_t *data;
80 } pattern;
81 
82 /* Avoid filling the same DMA region between MMIO/PIO commands ? */
83 static bool avoid_double_fetches;
84 
85 static QTestState *qts_global; /* Need a global for the DMA callback */
86 
87 /*
88  * List of memory regions that are children of QOM objects specified by the
89  * user for fuzzing.
90  */
91 static GHashTable *fuzzable_memoryregions;
92 static GPtrArray *fuzzable_pci_devices;
93 
94 struct get_io_cb_info {
95     int index;
96     int found;
97     address_range result;
98 };
99 
100 static bool get_io_address_cb(Int128 start, Int128 size,
101                               const MemoryRegion *mr,
102                               hwaddr offset_in_region,
103                               void *opaque)
104 {
105     struct get_io_cb_info *info = opaque;
106     if (g_hash_table_lookup(fuzzable_memoryregions, mr)) {
107         if (info->index == 0) {
108             info->result.addr = (ram_addr_t)start;
109             info->result.size = (ram_addr_t)size;
110             info->found = 1;
111             return true;
112         }
113         info->index--;
114     }
115     return false;
116 }
117 
118 /*
119  * List of dma regions populated since the last fuzzing command. Used to ensure
120  * that we only write to each DMA address once, to avoid race conditions when
121  * building reproducers.
122  */
123 static GArray *dma_regions;
124 
125 static GArray *dma_patterns;
126 static int dma_pattern_index;
127 static bool pci_disabled;
128 
129 /*
130  * Allocate a block of memory and populate it with a pattern.
131  */
132 static void *pattern_alloc(pattern p, size_t len)
133 {
134     int i;
135     uint8_t *buf = g_malloc(len);
136     uint8_t sum = 0;
137 
138     for (i = 0; i < len; ++i) {
139         buf[i] = p.data[i % p.len];
140         if ((i % p.len) == p.index) {
141             buf[i] += sum;
142             sum += p.stride;
143         }
144     }
145     return buf;
146 }
147 
148 static int fuzz_memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
149 {
150     unsigned access_size_max = mr->ops->valid.max_access_size;
151 
152     /*
153      * Regions are assumed to support 1-4 byte accesses unless
154      * otherwise specified.
155      */
156     if (access_size_max == 0) {
157         access_size_max = 4;
158     }
159 
160     /* Bound the maximum access by the alignment of the address.  */
161     if (!mr->ops->impl.unaligned) {
162         unsigned align_size_max = addr & -addr;
163         if (align_size_max != 0 && align_size_max < access_size_max) {
164             access_size_max = align_size_max;
165         }
166     }
167 
168     /* Don't attempt accesses larger than the maximum.  */
169     if (l > access_size_max) {
170         l = access_size_max;
171     }
172     l = pow2floor(l);
173 
174     return l;
175 }
176 
177 /*
178  * Call-back for functions that perform DMA reads from guest memory. Confirm
179  * that the region has not already been populated since the last loop in
180  * generic_fuzz(), avoiding potential race-conditions, which we don't have
181  * a good way for reproducing right now.
182  */
183 void fuzz_dma_read_cb(size_t addr, size_t len, MemoryRegion *mr)
184 {
185     /* Are we in the generic-fuzzer or are we using another fuzz-target? */
186     if (!qts_global) {
187         return;
188     }
189 
190     /*
191      * Return immediately if:
192      * - We have no DMA patterns defined
193      * - The length of the DMA read request is zero
194      * - The DMA read is hitting an MR other than the machine's main RAM
195      * - The DMA request hits past the bounds of our RAM
196      */
197     if (dma_patterns->len == 0
198         || len == 0
199         || (mr != current_machine->ram && mr != sparse_mem_mr)) {
200         return;
201     }
202 
203     /*
204      * If we overlap with any existing dma_regions, split the range and only
205      * populate the non-overlapping parts.
206      */
207     address_range region;
208     bool double_fetch = false;
209     for (int i = 0;
210          i < dma_regions->len && (avoid_double_fetches || qtest_log_enabled);
211          ++i) {
212         region = g_array_index(dma_regions, address_range, i);
213         if (addr < region.addr + region.size && addr + len > region.addr) {
214             double_fetch = true;
215             if (addr < region.addr
216                 && avoid_double_fetches) {
217                 fuzz_dma_read_cb(addr, region.addr - addr, mr);
218             }
219             if (addr + len > region.addr + region.size
220                 && avoid_double_fetches) {
221                 fuzz_dma_read_cb(region.addr + region.size,
222                         addr + len - (region.addr + region.size), mr);
223             }
224             return;
225         }
226     }
227 
228     /* Cap the length of the DMA access to something reasonable */
229     len = MIN(len, MAX_DMA_FILL_SIZE);
230 
231     address_range ar = {addr, len};
232     g_array_append_val(dma_regions, ar);
233     pattern p = g_array_index(dma_patterns, pattern, dma_pattern_index);
234     void *buf_base = pattern_alloc(p, ar.size);
235     void *buf = buf_base;
236     hwaddr l, addr1;
237     MemoryRegion *mr1;
238     while (len > 0) {
239         l = len;
240         mr1 = address_space_translate(first_cpu->as,
241                                       addr, &addr1, &l, true,
242                                       MEMTXATTRS_UNSPECIFIED);
243 
244         /*
245          *  If mr1 isn't RAM, address_space_translate doesn't update l. Use
246          *  fuzz_memory_access_size to identify the number of bytes that it
247          *  is safe to write without accidentally writing to another
248          *  MemoryRegion.
249          */
250         if (!memory_region_is_ram(mr1)) {
251             l = fuzz_memory_access_size(mr1, l, addr1);
252         }
253         if (memory_region_is_ram(mr1) ||
254             memory_region_is_romd(mr1) ||
255             mr1 == sparse_mem_mr) {
256             /* ROM/RAM case */
257             if (qtest_log_enabled) {
258                 /*
259                 * With QTEST_LOG, use a normal, slow QTest memwrite. Prefix the log
260                 * that will be written by qtest.c with a DMA tag, so we can reorder
261                 * the resulting QTest trace so the DMA fills precede the last PIO/MMIO
262                 * command.
263                 */
264                 fprintf(stderr, "[DMA] ");
265                 if (double_fetch) {
266                     fprintf(stderr, "[DOUBLE-FETCH] ");
267                 }
268                 fflush(stderr);
269             }
270             qtest_memwrite(qts_global, addr, buf, l);
271         }
272         len -= l;
273         buf += l;
274         addr += l;
275 
276     }
277     g_free(buf_base);
278 
279     /* Increment the index of the pattern for the next DMA access */
280     dma_pattern_index = (dma_pattern_index + 1) % dma_patterns->len;
281 }
282 
283 /*
284  * Here we want to convert a fuzzer-provided [io-region-index, offset] to
285  * a physical address. To do this, we iterate over all of the matched
286  * MemoryRegions. Check whether each region exists within the particular io
287  * space. Return the absolute address of the offset within the index'th region
288  * that is a subregion of the io_space and the distance until the end of the
289  * memory region.
290  */
291 static bool get_io_address(address_range *result, AddressSpace *as,
292                             uint8_t index,
293                             uint32_t offset) {
294     FlatView *view;
295     view = as->current_map;
296     g_assert(view);
297     struct get_io_cb_info cb_info = {};
298 
299     cb_info.index = index;
300 
301     /*
302      * Loop around the FlatView until we match "index" number of
303      * fuzzable_memoryregions, or until we know that there are no matching
304      * memory_regions.
305      */
306     do {
307         flatview_for_each_range(view, get_io_address_cb , &cb_info);
308     } while (cb_info.index != index && !cb_info.found);
309 
310     *result = cb_info.result;
311     if (result->size) {
312         offset = offset % result->size;
313         result->addr += offset;
314         result->size -= offset;
315     }
316     return cb_info.found;
317 }
318 
319 static bool get_pio_address(address_range *result,
320                             uint8_t index, uint16_t offset)
321 {
322     /*
323      * PIO BARs can be set past the maximum port address (0xFFFF). Thus, result
324      * can contain an addr that extends past the PIO space. When we pass this
325      * address to qtest_in/qtest_out, it is cast to a uint16_t, so we might end
326      * up fuzzing a completely different MemoryRegion/Device. Therefore, check
327      * that the address here is within the PIO space limits.
328      */
329     bool found = get_io_address(result, &address_space_io, index, offset);
330     return result->addr <= 0xFFFF ? found : false;
331 }
332 
333 static bool get_mmio_address(address_range *result,
334                              uint8_t index, uint32_t offset)
335 {
336     return get_io_address(result, &address_space_memory, index, offset);
337 }
338 
339 static void op_in(QTestState *s, const unsigned char * data, size_t len)
340 {
341     enum Sizes {Byte, Word, Long, end_sizes};
342     struct {
343         uint8_t size;
344         uint8_t base;
345         uint16_t offset;
346     } a;
347     address_range abs;
348 
349     if (len < sizeof(a)) {
350         return;
351     }
352     memcpy(&a, data, sizeof(a));
353     if (get_pio_address(&abs, a.base, a.offset) == 0) {
354         return;
355     }
356 
357     switch (a.size %= end_sizes) {
358     case Byte:
359         qtest_inb(s, abs.addr);
360         break;
361     case Word:
362         if (abs.size >= 2) {
363             qtest_inw(s, abs.addr);
364         }
365         break;
366     case Long:
367         if (abs.size >= 4) {
368             qtest_inl(s, abs.addr);
369         }
370         break;
371     }
372 }
373 
374 static void op_out(QTestState *s, const unsigned char * data, size_t len)
375 {
376     enum Sizes {Byte, Word, Long, end_sizes};
377     struct {
378         uint8_t size;
379         uint8_t base;
380         uint16_t offset;
381         uint32_t value;
382     } a;
383     address_range abs;
384 
385     if (len < sizeof(a)) {
386         return;
387     }
388     memcpy(&a, data, sizeof(a));
389 
390     if (get_pio_address(&abs, a.base, a.offset) == 0) {
391         return;
392     }
393 
394     switch (a.size %= end_sizes) {
395     case Byte:
396         qtest_outb(s, abs.addr, a.value & 0xFF);
397         break;
398     case Word:
399         if (abs.size >= 2) {
400             qtest_outw(s, abs.addr, a.value & 0xFFFF);
401         }
402         break;
403     case Long:
404         if (abs.size >= 4) {
405             qtest_outl(s, abs.addr, a.value);
406         }
407         break;
408     }
409 }
410 
411 static void op_read(QTestState *s, const unsigned char * data, size_t len)
412 {
413     enum Sizes {Byte, Word, Long, Quad, end_sizes};
414     struct {
415         uint8_t size;
416         uint8_t base;
417         uint32_t offset;
418     } a;
419     address_range abs;
420 
421     if (len < sizeof(a)) {
422         return;
423     }
424     memcpy(&a, data, sizeof(a));
425 
426     if (get_mmio_address(&abs, a.base, a.offset) == 0) {
427         return;
428     }
429 
430     switch (a.size %= end_sizes) {
431     case Byte:
432         qtest_readb(s, abs.addr);
433         break;
434     case Word:
435         if (abs.size >= 2) {
436             qtest_readw(s, abs.addr);
437         }
438         break;
439     case Long:
440         if (abs.size >= 4) {
441             qtest_readl(s, abs.addr);
442         }
443         break;
444     case Quad:
445         if (abs.size >= 8) {
446             qtest_readq(s, abs.addr);
447         }
448         break;
449     }
450 }
451 
452 static void op_write(QTestState *s, const unsigned char * data, size_t len)
453 {
454     enum Sizes {Byte, Word, Long, Quad, end_sizes};
455     struct {
456         uint8_t size;
457         uint8_t base;
458         uint32_t offset;
459         uint64_t value;
460     } a;
461     address_range abs;
462 
463     if (len < sizeof(a)) {
464         return;
465     }
466     memcpy(&a, data, sizeof(a));
467 
468     if (get_mmio_address(&abs, a.base, a.offset) == 0) {
469         return;
470     }
471 
472     switch (a.size %= end_sizes) {
473     case Byte:
474             qtest_writeb(s, abs.addr, a.value & 0xFF);
475         break;
476     case Word:
477         if (abs.size >= 2) {
478             qtest_writew(s, abs.addr, a.value & 0xFFFF);
479         }
480         break;
481     case Long:
482         if (abs.size >= 4) {
483             qtest_writel(s, abs.addr, a.value & 0xFFFFFFFF);
484         }
485         break;
486     case Quad:
487         if (abs.size >= 8) {
488             qtest_writeq(s, abs.addr, a.value);
489         }
490         break;
491     }
492 }
493 
494 static void op_pci_read(QTestState *s, const unsigned char * data, size_t len)
495 {
496     enum Sizes {Byte, Word, Long, end_sizes};
497     struct {
498         uint8_t size;
499         uint8_t base;
500         uint8_t offset;
501     } a;
502     if (len < sizeof(a) || fuzzable_pci_devices->len == 0 || pci_disabled) {
503         return;
504     }
505     memcpy(&a, data, sizeof(a));
506     PCIDevice *dev = g_ptr_array_index(fuzzable_pci_devices,
507                                   a.base % fuzzable_pci_devices->len);
508     int devfn = dev->devfn;
509     qtest_outl(s, PCI_HOST_BRIDGE_CFG, (1U << 31) | (devfn << 8) | a.offset);
510     switch (a.size %= end_sizes) {
511     case Byte:
512         qtest_inb(s, PCI_HOST_BRIDGE_DATA);
513         break;
514     case Word:
515         qtest_inw(s, PCI_HOST_BRIDGE_DATA);
516         break;
517     case Long:
518         qtest_inl(s, PCI_HOST_BRIDGE_DATA);
519         break;
520     }
521 }
522 
523 static void op_pci_write(QTestState *s, const unsigned char * data, size_t len)
524 {
525     enum Sizes {Byte, Word, Long, end_sizes};
526     struct {
527         uint8_t size;
528         uint8_t base;
529         uint8_t offset;
530         uint32_t value;
531     } a;
532     if (len < sizeof(a) || fuzzable_pci_devices->len == 0 || pci_disabled) {
533         return;
534     }
535     memcpy(&a, data, sizeof(a));
536     PCIDevice *dev = g_ptr_array_index(fuzzable_pci_devices,
537                                   a.base % fuzzable_pci_devices->len);
538     int devfn = dev->devfn;
539     qtest_outl(s, PCI_HOST_BRIDGE_CFG, (1U << 31) | (devfn << 8) | a.offset);
540     switch (a.size %= end_sizes) {
541     case Byte:
542         qtest_outb(s, PCI_HOST_BRIDGE_DATA, a.value & 0xFF);
543         break;
544     case Word:
545         qtest_outw(s, PCI_HOST_BRIDGE_DATA, a.value & 0xFFFF);
546         break;
547     case Long:
548         qtest_outl(s, PCI_HOST_BRIDGE_DATA, a.value & 0xFFFFFFFF);
549         break;
550     }
551 }
552 
553 static void op_add_dma_pattern(QTestState *s,
554                                const unsigned char *data, size_t len)
555 {
556     struct {
557         /*
558          * index and stride can be used to increment the index-th byte of the
559          * pattern by the value stride, for each loop of the pattern.
560          */
561         uint8_t index;
562         uint8_t stride;
563     } a;
564 
565     if (len < sizeof(a) + 1) {
566         return;
567     }
568     memcpy(&a, data, sizeof(a));
569     pattern p = {a.index, a.stride, len - sizeof(a), data + sizeof(a)};
570     p.index = a.index % p.len;
571     g_array_append_val(dma_patterns, p);
572     return;
573 }
574 
575 static void op_clear_dma_patterns(QTestState *s,
576                                   const unsigned char *data, size_t len)
577 {
578     g_array_set_size(dma_patterns, 0);
579     dma_pattern_index = 0;
580 }
581 
582 static void op_clock_step(QTestState *s, const unsigned char *data, size_t len)
583 {
584     qtest_clock_step_next(s);
585 }
586 
587 static void op_disable_pci(QTestState *s, const unsigned char *data, size_t len)
588 {
589     pci_disabled = true;
590 }
591 
592 static void handle_timeout(int sig)
593 {
594     if (qtest_log_enabled) {
595         fprintf(stderr, "[Timeout]\n");
596         fflush(stderr);
597     }
598 
599     /*
600      * If there is a crash, libfuzzer/ASAN forks a child to run an
601      * "llvm-symbolizer" process for printing out a pretty stacktrace. It
602      * communicates with this child using a pipe.  If we timeout+Exit, while
603      * libfuzzer is still communicating with the llvm-symbolizer child, we will
604      * be left with an orphan llvm-symbolizer process. Sometimes, this appears
605      * to lead to a deadlock in the forkserver. Use waitpid to check if there
606      * are any waitable children. If so, exit out of the signal-handler, and
607      * let libfuzzer finish communicating with the child, and exit, on its own.
608      */
609     if (waitpid(-1, NULL, WNOHANG) == 0) {
610         return;
611     }
612 
613     _Exit(0);
614 }
615 
616 /*
617  * Here, we interpret random bytes from the fuzzer, as a sequence of commands.
618  * Some commands can be variable-width, so we use a separator, SEPARATOR, to
619  * specify the boundaries between commands. SEPARATOR is used to separate
620  * "operations" in the fuzz input. Why use a separator, instead of just using
621  * the operations' length to identify operation boundaries?
622  *   1. This is a simple way to support variable-length operations
623  *   2. This adds "stability" to the input.
624  *      For example take the input "AbBcgDefg", where there is no separator and
625  *      Opcodes are capitalized.
626  *      Simply, by removing the first byte, we end up with a very different
627  *      sequence:
628  *      BbcGdefg...
629  *      By adding a separator, we avoid this problem:
630  *      Ab SEP Bcg SEP Defg -> B SEP Bcg SEP Defg
631  *      Since B uses two additional bytes as operands, the first "B" will be
632  *      ignored. The fuzzer actively tries to reduce inputs, so such unused
633  *      bytes are likely to be pruned, eventually.
634  *
635  *  SEPARATOR is trivial for the fuzzer to discover when using ASan. Optionally,
636  *  SEPARATOR can be manually specified as a dictionary value (see libfuzzer's
637  *  -dict), though this should not be necessary.
638  *
639  * As a result, the stream of bytes is converted into a sequence of commands.
640  * In a simplified example where SEPARATOR is 0xFF:
641  * 00 01 02 FF 03 04 05 06 FF 01 FF ...
642  * becomes this sequence of commands:
643  * 00 01 02    -> op00 (0102)   -> in (0102, 2)
644  * 03 04 05 06 -> op03 (040506) -> write (040506, 3)
645  * 01          -> op01 (-,0)    -> out (-,0)
646  * ...
647  *
648  * Note here that it is the job of the individual opcode functions to check
649  * that enough data was provided. I.e. in the last command out (,0), out needs
650  * to check that there is not enough data provided to select an address/value
651  * for the operation.
652  */
653 static void generic_fuzz(QTestState *s, const unsigned char *Data, size_t Size)
654 {
655     void (*ops[]) (QTestState *s, const unsigned char* , size_t) = {
656         [OP_IN]                 = op_in,
657         [OP_OUT]                = op_out,
658         [OP_READ]               = op_read,
659         [OP_WRITE]              = op_write,
660         [OP_PCI_READ]           = op_pci_read,
661         [OP_PCI_WRITE]          = op_pci_write,
662         [OP_DISABLE_PCI]        = op_disable_pci,
663         [OP_ADD_DMA_PATTERN]    = op_add_dma_pattern,
664         [OP_CLEAR_DMA_PATTERNS] = op_clear_dma_patterns,
665         [OP_CLOCK_STEP]         = op_clock_step,
666     };
667     const unsigned char *cmd = Data;
668     const unsigned char *nextcmd;
669     size_t cmd_len;
670     uint8_t op;
671 
672     if (fork() == 0) {
673         struct sigaction sact;
674         struct itimerval timer;
675         sigset_t set;
676         /*
677          * Sometimes the fuzzer will find inputs that take quite a long time to
678          * process. Often times, these inputs do not result in new coverage.
679          * Even if these inputs might be interesting, they can slow down the
680          * fuzzer, overall. Set a timeout for each command to avoid hurting
681          * performance, too much
682          */
683         if (timeout) {
684 
685             sigemptyset(&sact.sa_mask);
686             sact.sa_flags   = SA_NODEFER;
687             sact.sa_handler = handle_timeout;
688             sigaction(SIGALRM, &sact, NULL);
689 
690             sigemptyset(&set);
691             sigaddset(&set, SIGALRM);
692             pthread_sigmask(SIG_UNBLOCK, &set, NULL);
693 
694             memset(&timer, 0, sizeof(timer));
695             timer.it_value.tv_sec = timeout / USEC_IN_SEC;
696             timer.it_value.tv_usec = timeout % USEC_IN_SEC;
697         }
698 
699         op_clear_dma_patterns(s, NULL, 0);
700         pci_disabled = false;
701 
702         while (cmd && Size) {
703             /* Reset the timeout, each time we run a new command */
704             if (timeout) {
705                 setitimer(ITIMER_REAL, &timer, NULL);
706             }
707 
708             /* Get the length until the next command or end of input */
709             nextcmd = memmem(cmd, Size, SEPARATOR, strlen(SEPARATOR));
710             cmd_len = nextcmd ? nextcmd - cmd : Size;
711 
712             if (cmd_len > 0) {
713                 /* Interpret the first byte of the command as an opcode */
714                 op = *cmd % (sizeof(ops) / sizeof((ops)[0]));
715                 ops[op](s, cmd + 1, cmd_len - 1);
716 
717                 /* Run the main loop */
718                 flush_events(s);
719             }
720             /* Advance to the next command */
721             cmd = nextcmd ? nextcmd + sizeof(SEPARATOR) - 1 : nextcmd;
722             Size = Size - (cmd_len + sizeof(SEPARATOR) - 1);
723             g_array_set_size(dma_regions, 0);
724         }
725         _Exit(0);
726     } else {
727         flush_events(s);
728         wait(0);
729     }
730 }
731 
732 static void usage(void)
733 {
734     printf("Please specify the following environment variables:\n");
735     printf("QEMU_FUZZ_ARGS= the command line arguments passed to qemu\n");
736     printf("QEMU_FUZZ_OBJECTS= "
737             "a space separated list of QOM type names for objects to fuzz\n");
738     printf("Optionally: QEMU_AVOID_DOUBLE_FETCH= "
739             "Try to avoid racy DMA double fetch bugs? %d by default\n",
740             avoid_double_fetches);
741     printf("Optionally: QEMU_FUZZ_TIMEOUT= Specify a custom timeout (us). "
742             "0 to disable. %d by default\n", timeout);
743     exit(0);
744 }
745 
746 static int locate_fuzz_memory_regions(Object *child, void *opaque)
747 {
748     MemoryRegion *mr;
749     if (object_dynamic_cast(child, TYPE_MEMORY_REGION)) {
750         mr = MEMORY_REGION(child);
751         if ((memory_region_is_ram(mr) ||
752             memory_region_is_ram_device(mr) ||
753             memory_region_is_rom(mr)) == false) {
754             /*
755              * We don't want duplicate pointers to the same MemoryRegion, so
756              * try to remove copies of the pointer, before adding it.
757              */
758             g_hash_table_insert(fuzzable_memoryregions, mr, (gpointer)true);
759         }
760     }
761     return 0;
762 }
763 
764 static int locate_fuzz_objects(Object *child, void *opaque)
765 {
766     GString *type_name;
767     GString *path_name;
768     char *pattern = opaque;
769 
770     type_name = g_string_new(object_get_typename(child));
771     g_string_ascii_down(type_name);
772     if (g_pattern_match_simple(pattern, type_name->str)) {
773         /* Find and save ptrs to any child MemoryRegions */
774         object_child_foreach_recursive(child, locate_fuzz_memory_regions, NULL);
775 
776         /*
777          * We matched an object. If its a PCI device, store a pointer to it so
778          * we can map BARs and fuzz its config space.
779          */
780         if (object_dynamic_cast(OBJECT(child), TYPE_PCI_DEVICE)) {
781             /*
782              * Don't want duplicate pointers to the same PCIDevice, so remove
783              * copies of the pointer, before adding it.
784              */
785             g_ptr_array_remove_fast(fuzzable_pci_devices, PCI_DEVICE(child));
786             g_ptr_array_add(fuzzable_pci_devices, PCI_DEVICE(child));
787         }
788     } else if (object_dynamic_cast(OBJECT(child), TYPE_MEMORY_REGION)) {
789         path_name = g_string_new(object_get_canonical_path_component(child));
790         g_string_ascii_down(path_name);
791         if (g_pattern_match_simple(pattern, path_name->str)) {
792             MemoryRegion *mr;
793             mr = MEMORY_REGION(child);
794             if ((memory_region_is_ram(mr) ||
795                  memory_region_is_ram_device(mr) ||
796                  memory_region_is_rom(mr)) == false) {
797                 g_hash_table_insert(fuzzable_memoryregions, mr, (gpointer)true);
798             }
799         }
800         g_string_free(path_name, true);
801     }
802     g_string_free(type_name, true);
803     return 0;
804 }
805 
806 
807 static void pci_enum(gpointer pcidev, gpointer bus)
808 {
809     PCIDevice *dev = pcidev;
810     QPCIDevice *qdev;
811     int i;
812 
813     qdev = qpci_device_find(bus, dev->devfn);
814     g_assert(qdev != NULL);
815     for (i = 0; i < 6; i++) {
816         if (dev->io_regions[i].size) {
817             qpci_iomap(qdev, i, NULL);
818         }
819     }
820     qpci_device_enable(qdev);
821     g_free(qdev);
822 }
823 
824 static void generic_pre_fuzz(QTestState *s)
825 {
826     GHashTableIter iter;
827     MemoryRegion *mr;
828     QPCIBus *pcibus;
829     char **result;
830     GString *name_pattern;
831 
832     if (!getenv("QEMU_FUZZ_OBJECTS")) {
833         usage();
834     }
835     if (getenv("QTEST_LOG")) {
836         qtest_log_enabled = 1;
837     }
838     if (getenv("QEMU_AVOID_DOUBLE_FETCH")) {
839         avoid_double_fetches = 1;
840     }
841     if (getenv("QEMU_FUZZ_TIMEOUT")) {
842         timeout = g_ascii_strtoll(getenv("QEMU_FUZZ_TIMEOUT"), NULL, 0);
843     }
844     qts_global = s;
845 
846     /*
847      * Create a special device that we can use to back DMA buffers at very
848      * high memory addresses
849      */
850     sparse_mem_mr = sparse_mem_init(0, UINT64_MAX);
851 
852     dma_regions = g_array_new(false, false, sizeof(address_range));
853     dma_patterns = g_array_new(false, false, sizeof(pattern));
854 
855     fuzzable_memoryregions = g_hash_table_new(NULL, NULL);
856     fuzzable_pci_devices   = g_ptr_array_new();
857 
858     result = g_strsplit(getenv("QEMU_FUZZ_OBJECTS"), " ", -1);
859     for (int i = 0; result[i] != NULL; i++) {
860         name_pattern = g_string_new(result[i]);
861         /*
862          * Make the pattern lowercase. We do the same for all the MemoryRegion
863          * and Type names so the configs are case-insensitive.
864          */
865         g_string_ascii_down(name_pattern);
866         printf("Matching objects by name %s\n", result[i]);
867         object_child_foreach_recursive(qdev_get_machine(),
868                                     locate_fuzz_objects,
869                                     name_pattern->str);
870         g_string_free(name_pattern, true);
871     }
872     g_strfreev(result);
873     printf("This process will try to fuzz the following MemoryRegions:\n");
874 
875     g_hash_table_iter_init(&iter, fuzzable_memoryregions);
876     while (g_hash_table_iter_next(&iter, (gpointer)&mr, NULL)) {
877         printf("  * %s (size 0x%" PRIx64 ")\n",
878                object_get_canonical_path_component(&(mr->parent_obj)),
879                memory_region_size(mr));
880     }
881 
882     if (!g_hash_table_size(fuzzable_memoryregions)) {
883         printf("No fuzzable memory regions found...\n");
884         exit(1);
885     }
886 
887     pcibus = qpci_new_pc(s, NULL);
888     g_ptr_array_foreach(fuzzable_pci_devices, pci_enum, pcibus);
889     qpci_free_pc(pcibus);
890 
891     counter_shm_init();
892 }
893 
894 /*
895  * When libfuzzer gives us two inputs to combine, return a new input with the
896  * following structure:
897  *
898  * Input 1 (data1)
899  * SEPARATOR
900  * Clear out the DMA Patterns
901  * SEPARATOR
902  * Disable the pci_read/write instructions
903  * SEPARATOR
904  * Input 2 (data2)
905  *
906  * The idea is to collate the core behaviors of the two inputs.
907  * For example:
908  * Input 1: maps a device's BARs, sets up three DMA patterns, and triggers
909  *          device functionality A
910  * Input 2: maps a device's BARs, sets up one DMA pattern, and triggers device
911  *          functionality B
912  *
913  * This function attempts to produce an input that:
914  * Ouptut: maps a device's BARs, set up three DMA patterns, triggers
915  *          functionality A device, replaces the DMA patterns with a single
916  *          patten, and triggers device functionality B.
917  */
918 static size_t generic_fuzz_crossover(const uint8_t *data1, size_t size1, const
919                                      uint8_t *data2, size_t size2, uint8_t *out,
920                                      size_t max_out_size, unsigned int seed)
921 {
922     size_t copy_len = 0, size = 0;
923 
924     /* Check that we have enough space for data1 and at least part of data2 */
925     if (max_out_size <= size1 + strlen(SEPARATOR) * 3 + 2) {
926         return 0;
927     }
928 
929     /* Copy_Len in the first input */
930     copy_len = size1;
931     memcpy(out + size, data1, copy_len);
932     size += copy_len;
933     max_out_size -= copy_len;
934 
935     /* Append a separator */
936     copy_len = strlen(SEPARATOR);
937     memcpy(out + size, SEPARATOR, copy_len);
938     size += copy_len;
939     max_out_size -= copy_len;
940 
941     /* Clear out the DMA Patterns */
942     copy_len = 1;
943     if (copy_len) {
944         out[size] = OP_CLEAR_DMA_PATTERNS;
945     }
946     size += copy_len;
947     max_out_size -= copy_len;
948 
949     /* Append a separator */
950     copy_len = strlen(SEPARATOR);
951     memcpy(out + size, SEPARATOR, copy_len);
952     size += copy_len;
953     max_out_size -= copy_len;
954 
955     /* Disable PCI ops. Assume data1 took care of setting up PCI */
956     copy_len = 1;
957     if (copy_len) {
958         out[size] = OP_DISABLE_PCI;
959     }
960     size += copy_len;
961     max_out_size -= copy_len;
962 
963     /* Append a separator */
964     copy_len = strlen(SEPARATOR);
965     memcpy(out + size, SEPARATOR, copy_len);
966     size += copy_len;
967     max_out_size -= copy_len;
968 
969     /* Copy_Len over the second input */
970     copy_len = MIN(size2, max_out_size);
971     memcpy(out + size, data2, copy_len);
972     size += copy_len;
973     max_out_size -= copy_len;
974 
975     return  size;
976 }
977 
978 
979 static GString *generic_fuzz_cmdline(FuzzTarget *t)
980 {
981     GString *cmd_line = g_string_new(TARGET_NAME);
982     if (!getenv("QEMU_FUZZ_ARGS")) {
983         usage();
984     }
985     g_string_append_printf(cmd_line, " -display none \
986                                       -machine accel=qtest, \
987                                       -m 512M %s ", getenv("QEMU_FUZZ_ARGS"));
988     return cmd_line;
989 }
990 
991 static GString *generic_fuzz_predefined_config_cmdline(FuzzTarget *t)
992 {
993     gchar *args;
994     const generic_fuzz_config *config;
995     g_assert(t->opaque);
996 
997     config = t->opaque;
998     g_setenv("QEMU_AVOID_DOUBLE_FETCH", "1", 1);
999     if (config->argfunc) {
1000         args = config->argfunc();
1001         g_setenv("QEMU_FUZZ_ARGS", args, 1);
1002         g_free(args);
1003     } else {
1004         g_assert_nonnull(config->args);
1005         g_setenv("QEMU_FUZZ_ARGS", config->args, 1);
1006     }
1007     g_setenv("QEMU_FUZZ_OBJECTS", config->objects, 1);
1008     return generic_fuzz_cmdline(t);
1009 }
1010 
1011 static void register_generic_fuzz_targets(void)
1012 {
1013     fuzz_add_target(&(FuzzTarget){
1014             .name = "generic-fuzz",
1015             .description = "Fuzz based on any qemu command-line args. ",
1016             .get_init_cmdline = generic_fuzz_cmdline,
1017             .pre_fuzz = generic_pre_fuzz,
1018             .fuzz = generic_fuzz,
1019             .crossover = generic_fuzz_crossover
1020     });
1021 
1022     GString *name;
1023     const generic_fuzz_config *config;
1024 
1025     for (int i = 0;
1026          i < sizeof(predefined_configs) / sizeof(generic_fuzz_config);
1027          i++) {
1028         config = predefined_configs + i;
1029         name = g_string_new("generic-fuzz");
1030         g_string_append_printf(name, "-%s", config->name);
1031         fuzz_add_target(&(FuzzTarget){
1032                 .name = name->str,
1033                 .description = "Predefined generic-fuzz config.",
1034                 .get_init_cmdline = generic_fuzz_predefined_config_cmdline,
1035                 .pre_fuzz = generic_pre_fuzz,
1036                 .fuzz = generic_fuzz,
1037                 .crossover = generic_fuzz_crossover,
1038                 .opaque = (void *)config
1039         });
1040     }
1041 }
1042 
1043 fuzz_target_init(register_generic_fuzz_targets);
1044