1 /* 2 * Generic Virtual-Device Fuzzing Target 3 * 4 * Copyright Red Hat Inc., 2020 5 * 6 * Authors: 7 * Alexander Bulekov <alxndr@bu.edu> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 13 #include "qemu/osdep.h" 14 15 #include <wordexp.h> 16 17 #include "hw/core/cpu.h" 18 #include "tests/qtest/libqos/libqtest.h" 19 #include "tests/qtest/libqos/pci-pc.h" 20 #include "fuzz.h" 21 #include "fork_fuzz.h" 22 #include "exec/address-spaces.h" 23 #include "string.h" 24 #include "exec/memory.h" 25 #include "exec/ramblock.h" 26 #include "exec/address-spaces.h" 27 #include "hw/qdev-core.h" 28 #include "hw/pci/pci.h" 29 #include "hw/boards.h" 30 #include "generic_fuzz_configs.h" 31 32 /* 33 * SEPARATOR is used to separate "operations" in the fuzz input 34 */ 35 #define SEPARATOR "FUZZ" 36 37 enum cmds { 38 OP_IN, 39 OP_OUT, 40 OP_READ, 41 OP_WRITE, 42 OP_PCI_READ, 43 OP_PCI_WRITE, 44 OP_DISABLE_PCI, 45 OP_ADD_DMA_PATTERN, 46 OP_CLEAR_DMA_PATTERNS, 47 OP_CLOCK_STEP, 48 }; 49 50 #define DEFAULT_TIMEOUT_US 100000 51 #define USEC_IN_SEC 1000000000 52 53 #define MAX_DMA_FILL_SIZE 0x10000 54 55 #define PCI_HOST_BRIDGE_CFG 0xcf8 56 #define PCI_HOST_BRIDGE_DATA 0xcfc 57 58 typedef struct { 59 ram_addr_t addr; 60 ram_addr_t size; /* The number of bytes until the end of the I/O region */ 61 } address_range; 62 63 static useconds_t timeout = DEFAULT_TIMEOUT_US; 64 65 static bool qtest_log_enabled; 66 67 /* 68 * A pattern used to populate a DMA region or perform a memwrite. This is 69 * useful for e.g. populating tables of unique addresses. 70 * Example {.index = 1; .stride = 2; .len = 3; .data = "\x00\x01\x02"} 71 * Renders as: 00 01 02 00 03 02 00 05 02 00 07 02 ... 72 */ 73 typedef struct { 74 uint8_t index; /* Index of a byte to increment by stride */ 75 uint8_t stride; /* Increment each index'th byte by this amount */ 76 size_t len; 77 const uint8_t *data; 78 } pattern; 79 80 /* Avoid filling the same DMA region between MMIO/PIO commands ? */ 81 static bool avoid_double_fetches; 82 83 static QTestState *qts_global; /* Need a global for the DMA callback */ 84 85 /* 86 * List of memory regions that are children of QOM objects specified by the 87 * user for fuzzing. 88 */ 89 static GHashTable *fuzzable_memoryregions; 90 static GPtrArray *fuzzable_pci_devices; 91 92 struct get_io_cb_info { 93 int index; 94 int found; 95 address_range result; 96 }; 97 98 static int get_io_address_cb(Int128 start, Int128 size, 99 const MemoryRegion *mr, void *opaque) { 100 struct get_io_cb_info *info = opaque; 101 if (g_hash_table_lookup(fuzzable_memoryregions, mr)) { 102 if (info->index == 0) { 103 info->result.addr = (ram_addr_t)start; 104 info->result.size = (ram_addr_t)size; 105 info->found = 1; 106 return 1; 107 } 108 info->index--; 109 } 110 return 0; 111 } 112 113 /* 114 * List of dma regions populated since the last fuzzing command. Used to ensure 115 * that we only write to each DMA address once, to avoid race conditions when 116 * building reproducers. 117 */ 118 static GArray *dma_regions; 119 120 static GArray *dma_patterns; 121 static int dma_pattern_index; 122 static bool pci_disabled; 123 124 /* 125 * Allocate a block of memory and populate it with a pattern. 126 */ 127 static void *pattern_alloc(pattern p, size_t len) 128 { 129 int i; 130 uint8_t *buf = g_malloc(len); 131 uint8_t sum = 0; 132 133 for (i = 0; i < len; ++i) { 134 buf[i] = p.data[i % p.len]; 135 if ((i % p.len) == p.index) { 136 buf[i] += sum; 137 sum += p.stride; 138 } 139 } 140 return buf; 141 } 142 143 static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr) 144 { 145 unsigned access_size_max = mr->ops->valid.max_access_size; 146 147 /* 148 * Regions are assumed to support 1-4 byte accesses unless 149 * otherwise specified. 150 */ 151 if (access_size_max == 0) { 152 access_size_max = 4; 153 } 154 155 /* Bound the maximum access by the alignment of the address. */ 156 if (!mr->ops->impl.unaligned) { 157 unsigned align_size_max = addr & -addr; 158 if (align_size_max != 0 && align_size_max < access_size_max) { 159 access_size_max = align_size_max; 160 } 161 } 162 163 /* Don't attempt accesses larger than the maximum. */ 164 if (l > access_size_max) { 165 l = access_size_max; 166 } 167 l = pow2floor(l); 168 169 return l; 170 } 171 172 /* 173 * Call-back for functions that perform DMA reads from guest memory. Confirm 174 * that the region has not already been populated since the last loop in 175 * generic_fuzz(), avoiding potential race-conditions, which we don't have 176 * a good way for reproducing right now. 177 */ 178 void fuzz_dma_read_cb(size_t addr, size_t len, MemoryRegion *mr, bool is_write) 179 { 180 /* Are we in the generic-fuzzer or are we using another fuzz-target? */ 181 if (!qts_global) { 182 return; 183 } 184 185 /* 186 * Return immediately if: 187 * - We have no DMA patterns defined 188 * - The length of the DMA read request is zero 189 * - The DMA read is hitting an MR other than the machine's main RAM 190 * - The DMA request is not a read (what happens for a address_space_map 191 * with is_write=True? Can the device use the same pointer to do reads?) 192 * - The DMA request hits past the bounds of our RAM 193 */ 194 if (dma_patterns->len == 0 195 || len == 0 196 || mr != current_machine->ram 197 || is_write 198 || addr > current_machine->ram_size) { 199 return; 200 } 201 202 /* 203 * If we overlap with any existing dma_regions, split the range and only 204 * populate the non-overlapping parts. 205 */ 206 address_range region; 207 bool double_fetch = false; 208 for (int i = 0; 209 i < dma_regions->len && (avoid_double_fetches || qtest_log_enabled); 210 ++i) { 211 region = g_array_index(dma_regions, address_range, i); 212 if (addr < region.addr + region.size && addr + len > region.addr) { 213 double_fetch = true; 214 if (addr < region.addr 215 && avoid_double_fetches) { 216 fuzz_dma_read_cb(addr, region.addr - addr, mr, is_write); 217 } 218 if (addr + len > region.addr + region.size 219 && avoid_double_fetches) { 220 fuzz_dma_read_cb(region.addr + region.size, 221 addr + len - (region.addr + region.size), mr, is_write); 222 } 223 return; 224 } 225 } 226 227 /* Cap the length of the DMA access to something reasonable */ 228 len = MIN(len, MAX_DMA_FILL_SIZE); 229 230 address_range ar = {addr, len}; 231 g_array_append_val(dma_regions, ar); 232 pattern p = g_array_index(dma_patterns, pattern, dma_pattern_index); 233 void *buf_base = pattern_alloc(p, ar.size); 234 void *buf = buf_base; 235 hwaddr l, addr1; 236 MemoryRegion *mr1; 237 while (len > 0) { 238 l = len; 239 mr1 = address_space_translate(first_cpu->as, 240 addr, &addr1, &l, true, 241 MEMTXATTRS_UNSPECIFIED); 242 243 if (!(memory_region_is_ram(mr1) || 244 memory_region_is_romd(mr1))) { 245 l = memory_access_size(mr1, l, addr1); 246 } else { 247 /* ROM/RAM case */ 248 if (qtest_log_enabled) { 249 /* 250 * With QTEST_LOG, use a normal, slow QTest memwrite. Prefix the log 251 * that will be written by qtest.c with a DMA tag, so we can reorder 252 * the resulting QTest trace so the DMA fills precede the last PIO/MMIO 253 * command. 254 */ 255 fprintf(stderr, "[DMA] "); 256 if (double_fetch) { 257 fprintf(stderr, "[DOUBLE-FETCH] "); 258 } 259 fflush(stderr); 260 } 261 qtest_memwrite(qts_global, addr, buf, l); 262 } 263 len -= l; 264 buf += l; 265 addr += l; 266 267 } 268 g_free(buf_base); 269 270 /* Increment the index of the pattern for the next DMA access */ 271 dma_pattern_index = (dma_pattern_index + 1) % dma_patterns->len; 272 } 273 274 /* 275 * Here we want to convert a fuzzer-provided [io-region-index, offset] to 276 * a physical address. To do this, we iterate over all of the matched 277 * MemoryRegions. Check whether each region exists within the particular io 278 * space. Return the absolute address of the offset within the index'th region 279 * that is a subregion of the io_space and the distance until the end of the 280 * memory region. 281 */ 282 static bool get_io_address(address_range *result, AddressSpace *as, 283 uint8_t index, 284 uint32_t offset) { 285 FlatView *view; 286 view = as->current_map; 287 g_assert(view); 288 struct get_io_cb_info cb_info = {}; 289 290 cb_info.index = index; 291 292 /* 293 * Loop around the FlatView until we match "index" number of 294 * fuzzable_memoryregions, or until we know that there are no matching 295 * memory_regions. 296 */ 297 do { 298 flatview_for_each_range(view, get_io_address_cb , &cb_info); 299 } while (cb_info.index != index && !cb_info.found); 300 301 *result = cb_info.result; 302 if (result->size) { 303 offset = offset % result->size; 304 result->addr += offset; 305 result->size -= offset; 306 } 307 return cb_info.found; 308 } 309 310 static bool get_pio_address(address_range *result, 311 uint8_t index, uint16_t offset) 312 { 313 /* 314 * PIO BARs can be set past the maximum port address (0xFFFF). Thus, result 315 * can contain an addr that extends past the PIO space. When we pass this 316 * address to qtest_in/qtest_out, it is cast to a uint16_t, so we might end 317 * up fuzzing a completely different MemoryRegion/Device. Therefore, check 318 * that the address here is within the PIO space limits. 319 */ 320 bool found = get_io_address(result, &address_space_io, index, offset); 321 return result->addr <= 0xFFFF ? found : false; 322 } 323 324 static bool get_mmio_address(address_range *result, 325 uint8_t index, uint32_t offset) 326 { 327 return get_io_address(result, &address_space_memory, index, offset); 328 } 329 330 static void op_in(QTestState *s, const unsigned char * data, size_t len) 331 { 332 enum Sizes {Byte, Word, Long, end_sizes}; 333 struct { 334 uint8_t size; 335 uint8_t base; 336 uint16_t offset; 337 } a; 338 address_range abs; 339 340 if (len < sizeof(a)) { 341 return; 342 } 343 memcpy(&a, data, sizeof(a)); 344 if (get_pio_address(&abs, a.base, a.offset) == 0) { 345 return; 346 } 347 348 switch (a.size %= end_sizes) { 349 case Byte: 350 qtest_inb(s, abs.addr); 351 break; 352 case Word: 353 if (abs.size >= 2) { 354 qtest_inw(s, abs.addr); 355 } 356 break; 357 case Long: 358 if (abs.size >= 4) { 359 qtest_inl(s, abs.addr); 360 } 361 break; 362 } 363 } 364 365 static void op_out(QTestState *s, const unsigned char * data, size_t len) 366 { 367 enum Sizes {Byte, Word, Long, end_sizes}; 368 struct { 369 uint8_t size; 370 uint8_t base; 371 uint16_t offset; 372 uint32_t value; 373 } a; 374 address_range abs; 375 376 if (len < sizeof(a)) { 377 return; 378 } 379 memcpy(&a, data, sizeof(a)); 380 381 if (get_pio_address(&abs, a.base, a.offset) == 0) { 382 return; 383 } 384 385 switch (a.size %= end_sizes) { 386 case Byte: 387 qtest_outb(s, abs.addr, a.value & 0xFF); 388 break; 389 case Word: 390 if (abs.size >= 2) { 391 qtest_outw(s, abs.addr, a.value & 0xFFFF); 392 } 393 break; 394 case Long: 395 if (abs.size >= 4) { 396 qtest_outl(s, abs.addr, a.value); 397 } 398 break; 399 } 400 } 401 402 static void op_read(QTestState *s, const unsigned char * data, size_t len) 403 { 404 enum Sizes {Byte, Word, Long, Quad, end_sizes}; 405 struct { 406 uint8_t size; 407 uint8_t base; 408 uint32_t offset; 409 } a; 410 address_range abs; 411 412 if (len < sizeof(a)) { 413 return; 414 } 415 memcpy(&a, data, sizeof(a)); 416 417 if (get_mmio_address(&abs, a.base, a.offset) == 0) { 418 return; 419 } 420 421 switch (a.size %= end_sizes) { 422 case Byte: 423 qtest_readb(s, abs.addr); 424 break; 425 case Word: 426 if (abs.size >= 2) { 427 qtest_readw(s, abs.addr); 428 } 429 break; 430 case Long: 431 if (abs.size >= 4) { 432 qtest_readl(s, abs.addr); 433 } 434 break; 435 case Quad: 436 if (abs.size >= 8) { 437 qtest_readq(s, abs.addr); 438 } 439 break; 440 } 441 } 442 443 static void op_write(QTestState *s, const unsigned char * data, size_t len) 444 { 445 enum Sizes {Byte, Word, Long, Quad, end_sizes}; 446 struct { 447 uint8_t size; 448 uint8_t base; 449 uint32_t offset; 450 uint64_t value; 451 } a; 452 address_range abs; 453 454 if (len < sizeof(a)) { 455 return; 456 } 457 memcpy(&a, data, sizeof(a)); 458 459 if (get_mmio_address(&abs, a.base, a.offset) == 0) { 460 return; 461 } 462 463 switch (a.size %= end_sizes) { 464 case Byte: 465 qtest_writeb(s, abs.addr, a.value & 0xFF); 466 break; 467 case Word: 468 if (abs.size >= 2) { 469 qtest_writew(s, abs.addr, a.value & 0xFFFF); 470 } 471 break; 472 case Long: 473 if (abs.size >= 4) { 474 qtest_writel(s, abs.addr, a.value & 0xFFFFFFFF); 475 } 476 break; 477 case Quad: 478 if (abs.size >= 8) { 479 qtest_writeq(s, abs.addr, a.value); 480 } 481 break; 482 } 483 } 484 485 static void op_pci_read(QTestState *s, const unsigned char * data, size_t len) 486 { 487 enum Sizes {Byte, Word, Long, end_sizes}; 488 struct { 489 uint8_t size; 490 uint8_t base; 491 uint8_t offset; 492 } a; 493 if (len < sizeof(a) || fuzzable_pci_devices->len == 0 || pci_disabled) { 494 return; 495 } 496 memcpy(&a, data, sizeof(a)); 497 PCIDevice *dev = g_ptr_array_index(fuzzable_pci_devices, 498 a.base % fuzzable_pci_devices->len); 499 int devfn = dev->devfn; 500 qtest_outl(s, PCI_HOST_BRIDGE_CFG, (1U << 31) | (devfn << 8) | a.offset); 501 switch (a.size %= end_sizes) { 502 case Byte: 503 qtest_inb(s, PCI_HOST_BRIDGE_DATA); 504 break; 505 case Word: 506 qtest_inw(s, PCI_HOST_BRIDGE_DATA); 507 break; 508 case Long: 509 qtest_inl(s, PCI_HOST_BRIDGE_DATA); 510 break; 511 } 512 } 513 514 static void op_pci_write(QTestState *s, const unsigned char * data, size_t len) 515 { 516 enum Sizes {Byte, Word, Long, end_sizes}; 517 struct { 518 uint8_t size; 519 uint8_t base; 520 uint8_t offset; 521 uint32_t value; 522 } a; 523 if (len < sizeof(a) || fuzzable_pci_devices->len == 0 || pci_disabled) { 524 return; 525 } 526 memcpy(&a, data, sizeof(a)); 527 PCIDevice *dev = g_ptr_array_index(fuzzable_pci_devices, 528 a.base % fuzzable_pci_devices->len); 529 int devfn = dev->devfn; 530 qtest_outl(s, PCI_HOST_BRIDGE_CFG, (1U << 31) | (devfn << 8) | a.offset); 531 switch (a.size %= end_sizes) { 532 case Byte: 533 qtest_outb(s, PCI_HOST_BRIDGE_DATA, a.value & 0xFF); 534 break; 535 case Word: 536 qtest_outw(s, PCI_HOST_BRIDGE_DATA, a.value & 0xFFFF); 537 break; 538 case Long: 539 qtest_outl(s, PCI_HOST_BRIDGE_DATA, a.value & 0xFFFFFFFF); 540 break; 541 } 542 } 543 544 static void op_add_dma_pattern(QTestState *s, 545 const unsigned char *data, size_t len) 546 { 547 struct { 548 /* 549 * index and stride can be used to increment the index-th byte of the 550 * pattern by the value stride, for each loop of the pattern. 551 */ 552 uint8_t index; 553 uint8_t stride; 554 } a; 555 556 if (len < sizeof(a) + 1) { 557 return; 558 } 559 memcpy(&a, data, sizeof(a)); 560 pattern p = {a.index, a.stride, len - sizeof(a), data + sizeof(a)}; 561 p.index = a.index % p.len; 562 g_array_append_val(dma_patterns, p); 563 return; 564 } 565 566 static void op_clear_dma_patterns(QTestState *s, 567 const unsigned char *data, size_t len) 568 { 569 g_array_set_size(dma_patterns, 0); 570 dma_pattern_index = 0; 571 } 572 573 static void op_clock_step(QTestState *s, const unsigned char *data, size_t len) 574 { 575 qtest_clock_step_next(s); 576 } 577 578 static void op_disable_pci(QTestState *s, const unsigned char *data, size_t len) 579 { 580 pci_disabled = true; 581 } 582 583 static void handle_timeout(int sig) 584 { 585 if (qtest_log_enabled) { 586 fprintf(stderr, "[Timeout]\n"); 587 fflush(stderr); 588 } 589 _Exit(0); 590 } 591 592 /* 593 * Here, we interpret random bytes from the fuzzer, as a sequence of commands. 594 * Some commands can be variable-width, so we use a separator, SEPARATOR, to 595 * specify the boundaries between commands. SEPARATOR is used to separate 596 * "operations" in the fuzz input. Why use a separator, instead of just using 597 * the operations' length to identify operation boundaries? 598 * 1. This is a simple way to support variable-length operations 599 * 2. This adds "stability" to the input. 600 * For example take the input "AbBcgDefg", where there is no separator and 601 * Opcodes are capitalized. 602 * Simply, by removing the first byte, we end up with a very different 603 * sequence: 604 * BbcGdefg... 605 * By adding a separator, we avoid this problem: 606 * Ab SEP Bcg SEP Defg -> B SEP Bcg SEP Defg 607 * Since B uses two additional bytes as operands, the first "B" will be 608 * ignored. The fuzzer actively tries to reduce inputs, so such unused 609 * bytes are likely to be pruned, eventually. 610 * 611 * SEPARATOR is trivial for the fuzzer to discover when using ASan. Optionally, 612 * SEPARATOR can be manually specified as a dictionary value (see libfuzzer's 613 * -dict), though this should not be necessary. 614 * 615 * As a result, the stream of bytes is converted into a sequence of commands. 616 * In a simplified example where SEPARATOR is 0xFF: 617 * 00 01 02 FF 03 04 05 06 FF 01 FF ... 618 * becomes this sequence of commands: 619 * 00 01 02 -> op00 (0102) -> in (0102, 2) 620 * 03 04 05 06 -> op03 (040506) -> write (040506, 3) 621 * 01 -> op01 (-,0) -> out (-,0) 622 * ... 623 * 624 * Note here that it is the job of the individual opcode functions to check 625 * that enough data was provided. I.e. in the last command out (,0), out needs 626 * to check that there is not enough data provided to select an address/value 627 * for the operation. 628 */ 629 static void generic_fuzz(QTestState *s, const unsigned char *Data, size_t Size) 630 { 631 void (*ops[]) (QTestState *s, const unsigned char* , size_t) = { 632 [OP_IN] = op_in, 633 [OP_OUT] = op_out, 634 [OP_READ] = op_read, 635 [OP_WRITE] = op_write, 636 [OP_PCI_READ] = op_pci_read, 637 [OP_PCI_WRITE] = op_pci_write, 638 [OP_DISABLE_PCI] = op_disable_pci, 639 [OP_ADD_DMA_PATTERN] = op_add_dma_pattern, 640 [OP_CLEAR_DMA_PATTERNS] = op_clear_dma_patterns, 641 [OP_CLOCK_STEP] = op_clock_step, 642 }; 643 const unsigned char *cmd = Data; 644 const unsigned char *nextcmd; 645 size_t cmd_len; 646 uint8_t op; 647 648 if (fork() == 0) { 649 /* 650 * Sometimes the fuzzer will find inputs that take quite a long time to 651 * process. Often times, these inputs do not result in new coverage. 652 * Even if these inputs might be interesting, they can slow down the 653 * fuzzer, overall. Set a timeout to avoid hurting performance, too much 654 */ 655 if (timeout) { 656 struct sigaction sact; 657 struct itimerval timer; 658 659 sigemptyset(&sact.sa_mask); 660 sact.sa_flags = SA_NODEFER; 661 sact.sa_handler = handle_timeout; 662 sigaction(SIGALRM, &sact, NULL); 663 664 memset(&timer, 0, sizeof(timer)); 665 timer.it_value.tv_sec = timeout / USEC_IN_SEC; 666 timer.it_value.tv_usec = timeout % USEC_IN_SEC; 667 setitimer(ITIMER_VIRTUAL, &timer, NULL); 668 } 669 670 op_clear_dma_patterns(s, NULL, 0); 671 pci_disabled = false; 672 673 while (cmd && Size) { 674 /* Get the length until the next command or end of input */ 675 nextcmd = memmem(cmd, Size, SEPARATOR, strlen(SEPARATOR)); 676 cmd_len = nextcmd ? nextcmd - cmd : Size; 677 678 if (cmd_len > 0) { 679 /* Interpret the first byte of the command as an opcode */ 680 op = *cmd % (sizeof(ops) / sizeof((ops)[0])); 681 ops[op](s, cmd + 1, cmd_len - 1); 682 683 /* Run the main loop */ 684 flush_events(s); 685 } 686 /* Advance to the next command */ 687 cmd = nextcmd ? nextcmd + sizeof(SEPARATOR) - 1 : nextcmd; 688 Size = Size - (cmd_len + sizeof(SEPARATOR) - 1); 689 g_array_set_size(dma_regions, 0); 690 } 691 _Exit(0); 692 } else { 693 flush_events(s); 694 wait(0); 695 } 696 } 697 698 static void usage(void) 699 { 700 printf("Please specify the following environment variables:\n"); 701 printf("QEMU_FUZZ_ARGS= the command line arguments passed to qemu\n"); 702 printf("QEMU_FUZZ_OBJECTS= " 703 "a space separated list of QOM type names for objects to fuzz\n"); 704 printf("Optionally: QEMU_AVOID_DOUBLE_FETCH= " 705 "Try to avoid racy DMA double fetch bugs? %d by default\n", 706 avoid_double_fetches); 707 printf("Optionally: QEMU_FUZZ_TIMEOUT= Specify a custom timeout (us). " 708 "0 to disable. %d by default\n", timeout); 709 exit(0); 710 } 711 712 static int locate_fuzz_memory_regions(Object *child, void *opaque) 713 { 714 const char *name; 715 MemoryRegion *mr; 716 if (object_dynamic_cast(child, TYPE_MEMORY_REGION)) { 717 mr = MEMORY_REGION(child); 718 if ((memory_region_is_ram(mr) || 719 memory_region_is_ram_device(mr) || 720 memory_region_is_rom(mr)) == false) { 721 name = object_get_canonical_path_component(child); 722 /* 723 * We don't want duplicate pointers to the same MemoryRegion, so 724 * try to remove copies of the pointer, before adding it. 725 */ 726 g_hash_table_insert(fuzzable_memoryregions, mr, (gpointer)true); 727 } 728 } 729 return 0; 730 } 731 732 static int locate_fuzz_objects(Object *child, void *opaque) 733 { 734 char *pattern = opaque; 735 if (g_pattern_match_simple(pattern, object_get_typename(child))) { 736 /* Find and save ptrs to any child MemoryRegions */ 737 object_child_foreach_recursive(child, locate_fuzz_memory_regions, NULL); 738 739 /* 740 * We matched an object. If its a PCI device, store a pointer to it so 741 * we can map BARs and fuzz its config space. 742 */ 743 if (object_dynamic_cast(OBJECT(child), TYPE_PCI_DEVICE)) { 744 /* 745 * Don't want duplicate pointers to the same PCIDevice, so remove 746 * copies of the pointer, before adding it. 747 */ 748 g_ptr_array_remove_fast(fuzzable_pci_devices, PCI_DEVICE(child)); 749 g_ptr_array_add(fuzzable_pci_devices, PCI_DEVICE(child)); 750 } 751 } else if (object_dynamic_cast(OBJECT(child), TYPE_MEMORY_REGION)) { 752 if (g_pattern_match_simple(pattern, 753 object_get_canonical_path_component(child))) { 754 MemoryRegion *mr; 755 mr = MEMORY_REGION(child); 756 if ((memory_region_is_ram(mr) || 757 memory_region_is_ram_device(mr) || 758 memory_region_is_rom(mr)) == false) { 759 g_hash_table_insert(fuzzable_memoryregions, mr, (gpointer)true); 760 } 761 } 762 } 763 return 0; 764 } 765 766 767 static void pci_enum(gpointer pcidev, gpointer bus) 768 { 769 PCIDevice *dev = pcidev; 770 QPCIDevice *qdev; 771 int i; 772 773 qdev = qpci_device_find(bus, dev->devfn); 774 g_assert(qdev != NULL); 775 for (i = 0; i < 6; i++) { 776 if (dev->io_regions[i].size) { 777 qpci_iomap(qdev, i, NULL); 778 } 779 } 780 qpci_device_enable(qdev); 781 g_free(qdev); 782 } 783 784 static void generic_pre_fuzz(QTestState *s) 785 { 786 GHashTableIter iter; 787 MemoryRegion *mr; 788 QPCIBus *pcibus; 789 char **result; 790 791 if (!getenv("QEMU_FUZZ_OBJECTS")) { 792 usage(); 793 } 794 if (getenv("QTEST_LOG")) { 795 qtest_log_enabled = 1; 796 } 797 if (getenv("QEMU_AVOID_DOUBLE_FETCH")) { 798 avoid_double_fetches = 1; 799 } 800 if (getenv("QEMU_FUZZ_TIMEOUT")) { 801 timeout = g_ascii_strtoll(getenv("QEMU_FUZZ_TIMEOUT"), NULL, 0); 802 } 803 qts_global = s; 804 805 dma_regions = g_array_new(false, false, sizeof(address_range)); 806 dma_patterns = g_array_new(false, false, sizeof(pattern)); 807 808 fuzzable_memoryregions = g_hash_table_new(NULL, NULL); 809 fuzzable_pci_devices = g_ptr_array_new(); 810 811 result = g_strsplit(getenv("QEMU_FUZZ_OBJECTS"), " ", -1); 812 for (int i = 0; result[i] != NULL; i++) { 813 printf("Matching objects by name %s\n", result[i]); 814 object_child_foreach_recursive(qdev_get_machine(), 815 locate_fuzz_objects, 816 result[i]); 817 } 818 g_strfreev(result); 819 printf("This process will try to fuzz the following MemoryRegions:\n"); 820 821 g_hash_table_iter_init(&iter, fuzzable_memoryregions); 822 while (g_hash_table_iter_next(&iter, (gpointer)&mr, NULL)) { 823 printf(" * %s (size %lx)\n", 824 object_get_canonical_path_component(&(mr->parent_obj)), 825 (uint64_t)mr->size); 826 } 827 828 if (!g_hash_table_size(fuzzable_memoryregions)) { 829 printf("No fuzzable memory regions found...\n"); 830 exit(1); 831 } 832 833 pcibus = qpci_new_pc(s, NULL); 834 g_ptr_array_foreach(fuzzable_pci_devices, pci_enum, pcibus); 835 qpci_free_pc(pcibus); 836 837 counter_shm_init(); 838 } 839 840 /* 841 * When libfuzzer gives us two inputs to combine, return a new input with the 842 * following structure: 843 * 844 * Input 1 (data1) 845 * SEPARATOR 846 * Clear out the DMA Patterns 847 * SEPARATOR 848 * Disable the pci_read/write instructions 849 * SEPARATOR 850 * Input 2 (data2) 851 * 852 * The idea is to collate the core behaviors of the two inputs. 853 * For example: 854 * Input 1: maps a device's BARs, sets up three DMA patterns, and triggers 855 * device functionality A 856 * Input 2: maps a device's BARs, sets up one DMA pattern, and triggers device 857 * functionality B 858 * 859 * This function attempts to produce an input that: 860 * Ouptut: maps a device's BARs, set up three DMA patterns, triggers 861 * functionality A device, replaces the DMA patterns with a single 862 * patten, and triggers device functionality B. 863 */ 864 static size_t generic_fuzz_crossover(const uint8_t *data1, size_t size1, const 865 uint8_t *data2, size_t size2, uint8_t *out, 866 size_t max_out_size, unsigned int seed) 867 { 868 size_t copy_len = 0, size = 0; 869 870 /* Check that we have enough space for data1 and at least part of data2 */ 871 if (max_out_size <= size1 + strlen(SEPARATOR) * 3 + 2) { 872 return 0; 873 } 874 875 /* Copy_Len in the first input */ 876 copy_len = size1; 877 memcpy(out + size, data1, copy_len); 878 size += copy_len; 879 max_out_size -= copy_len; 880 881 /* Append a separator */ 882 copy_len = strlen(SEPARATOR); 883 memcpy(out + size, SEPARATOR, copy_len); 884 size += copy_len; 885 max_out_size -= copy_len; 886 887 /* Clear out the DMA Patterns */ 888 copy_len = 1; 889 if (copy_len) { 890 out[size] = OP_CLEAR_DMA_PATTERNS; 891 } 892 size += copy_len; 893 max_out_size -= copy_len; 894 895 /* Append a separator */ 896 copy_len = strlen(SEPARATOR); 897 memcpy(out + size, SEPARATOR, copy_len); 898 size += copy_len; 899 max_out_size -= copy_len; 900 901 /* Disable PCI ops. Assume data1 took care of setting up PCI */ 902 copy_len = 1; 903 if (copy_len) { 904 out[size] = OP_DISABLE_PCI; 905 } 906 size += copy_len; 907 max_out_size -= copy_len; 908 909 /* Append a separator */ 910 copy_len = strlen(SEPARATOR); 911 memcpy(out + size, SEPARATOR, copy_len); 912 size += copy_len; 913 max_out_size -= copy_len; 914 915 /* Copy_Len over the second input */ 916 copy_len = MIN(size2, max_out_size); 917 memcpy(out + size, data2, copy_len); 918 size += copy_len; 919 max_out_size -= copy_len; 920 921 return size; 922 } 923 924 925 static GString *generic_fuzz_cmdline(FuzzTarget *t) 926 { 927 GString *cmd_line = g_string_new(TARGET_NAME); 928 if (!getenv("QEMU_FUZZ_ARGS")) { 929 usage(); 930 } 931 g_string_append_printf(cmd_line, " -display none \ 932 -machine accel=qtest, \ 933 -m 512M %s ", getenv("QEMU_FUZZ_ARGS")); 934 return cmd_line; 935 } 936 937 static GString *generic_fuzz_predefined_config_cmdline(FuzzTarget *t) 938 { 939 const generic_fuzz_config *config; 940 g_assert(t->opaque); 941 942 config = t->opaque; 943 setenv("QEMU_AVOID_DOUBLE_FETCH", "1", 1); 944 setenv("QEMU_FUZZ_ARGS", config->args, 1); 945 setenv("QEMU_FUZZ_OBJECTS", config->objects, 1); 946 return generic_fuzz_cmdline(t); 947 } 948 949 static void register_generic_fuzz_targets(void) 950 { 951 fuzz_add_target(&(FuzzTarget){ 952 .name = "generic-fuzz", 953 .description = "Fuzz based on any qemu command-line args. ", 954 .get_init_cmdline = generic_fuzz_cmdline, 955 .pre_fuzz = generic_pre_fuzz, 956 .fuzz = generic_fuzz, 957 .crossover = generic_fuzz_crossover 958 }); 959 960 GString *name; 961 const generic_fuzz_config *config; 962 963 for (int i = 0; 964 i < sizeof(predefined_configs) / sizeof(generic_fuzz_config); 965 i++) { 966 config = predefined_configs + i; 967 name = g_string_new("generic-fuzz"); 968 g_string_append_printf(name, "-%s", config->name); 969 fuzz_add_target(&(FuzzTarget){ 970 .name = name->str, 971 .description = "Predefined generic-fuzz config.", 972 .get_init_cmdline = generic_fuzz_predefined_config_cmdline, 973 .pre_fuzz = generic_pre_fuzz, 974 .fuzz = generic_fuzz, 975 .crossover = generic_fuzz_crossover, 976 .opaque = (void *)config 977 }); 978 } 979 } 980 981 fuzz_target_init(register_generic_fuzz_targets); 982