1 /* 2 * QTest testcase for CXL 3 * 4 * This work is licensed under the terms of the GNU GPL, version 2 or later. 5 * See the COPYING file in the top-level directory. 6 */ 7 8 #include "qemu/osdep.h" 9 #include "libqtest-single.h" 10 11 #define QEMU_PXB_CMD \ 12 "-machine q35,cxl=on " \ 13 "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " \ 14 "-M cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.size=4G " 15 16 #define QEMU_2PXB_CMD \ 17 "-machine q35,cxl=on " \ 18 "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " \ 19 "-device pxb-cxl,id=cxl.1,bus=pcie.0,bus_nr=53 " \ 20 "-M cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.targets.1=cxl.1,cxl-fmw.0.size=4G " 21 22 #define QEMU_RP \ 23 "-device cxl-rp,id=rp0,bus=cxl.0,chassis=0,slot=0 " 24 25 /* Dual ports on first pxb */ 26 #define QEMU_2RP \ 27 "-device cxl-rp,id=rp0,bus=cxl.0,chassis=0,slot=0 " \ 28 "-device cxl-rp,id=rp1,bus=cxl.0,chassis=0,slot=1 " 29 30 /* Dual ports on each of the pxb instances */ 31 #define QEMU_4RP \ 32 "-device cxl-rp,id=rp0,bus=cxl.0,chassis=0,slot=0 " \ 33 "-device cxl-rp,id=rp1,bus=cxl.0,chassis=0,slot=1 " \ 34 "-device cxl-rp,id=rp2,bus=cxl.1,chassis=0,slot=2 " \ 35 "-device cxl-rp,id=rp3,bus=cxl.1,chassis=0,slot=3 " 36 37 #define QEMU_T3D_DEPRECATED \ 38 "-object memory-backend-file,id=cxl-mem0,mem-path=%s,size=256M " \ 39 "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M " \ 40 "-device cxl-type3,bus=rp0,memdev=cxl-mem0,lsa=lsa0,id=cxl-pmem0 " 41 42 #define QEMU_T3D_PMEM \ 43 "-object memory-backend-file,id=cxl-mem0,mem-path=%s,size=256M " \ 44 "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M " \ 45 "-device cxl-type3,bus=rp0,persistent-memdev=cxl-mem0,lsa=lsa0,id=pmem0 " 46 47 #define QEMU_T3D_VMEM \ 48 "-object memory-backend-ram,id=cxl-mem0,size=256M " \ 49 "-device cxl-type3,bus=rp0,volatile-memdev=cxl-mem0,id=mem0 " 50 51 #define QEMU_T3D_VMEM_LSA \ 52 "-object memory-backend-ram,id=cxl-mem0,size=256M " \ 53 "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M " \ 54 "-device cxl-type3,bus=rp0,volatile-memdev=cxl-mem0,lsa=lsa0,id=mem0 " 55 56 #define QEMU_2T3D \ 57 "-object memory-backend-file,id=cxl-mem0,mem-path=%s,size=256M " \ 58 "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M " \ 59 "-device cxl-type3,bus=rp0,persistent-memdev=cxl-mem0,lsa=lsa0,id=pmem0 " \ 60 "-object memory-backend-file,id=cxl-mem1,mem-path=%s,size=256M " \ 61 "-object memory-backend-file,id=lsa1,mem-path=%s,size=256M " \ 62 "-device cxl-type3,bus=rp1,persistent-memdev=cxl-mem1,lsa=lsa1,id=pmem1 " 63 64 #define QEMU_4T3D \ 65 "-object memory-backend-file,id=cxl-mem0,mem-path=%s,size=256M " \ 66 "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M " \ 67 "-device cxl-type3,bus=rp0,persistent-memdev=cxl-mem0,lsa=lsa0,id=pmem0 " \ 68 "-object memory-backend-file,id=cxl-mem1,mem-path=%s,size=256M " \ 69 "-object memory-backend-file,id=lsa1,mem-path=%s,size=256M " \ 70 "-device cxl-type3,bus=rp1,persistent-memdev=cxl-mem1,lsa=lsa1,id=pmem1 " \ 71 "-object memory-backend-file,id=cxl-mem2,mem-path=%s,size=256M " \ 72 "-object memory-backend-file,id=lsa2,mem-path=%s,size=256M " \ 73 "-device cxl-type3,bus=rp2,persistent-memdev=cxl-mem2,lsa=lsa2,id=pmem2 " \ 74 "-object memory-backend-file,id=cxl-mem3,mem-path=%s,size=256M " \ 75 "-object memory-backend-file,id=lsa3,mem-path=%s,size=256M " \ 76 "-device cxl-type3,bus=rp3,persistent-memdev=cxl-mem3,lsa=lsa3,id=pmem3 " 77 78 static void cxl_basic_hb(void) 79 { 80 qtest_start("-machine q35,cxl=on"); 81 qtest_end(); 82 } 83 84 static void cxl_basic_pxb(void) 85 { 86 qtest_start("-machine q35,cxl=on -device pxb-cxl,bus=pcie.0"); 87 qtest_end(); 88 } 89 90 static void cxl_pxb_with_window(void) 91 { 92 qtest_start(QEMU_PXB_CMD); 93 qtest_end(); 94 } 95 96 static void cxl_2pxb_with_window(void) 97 { 98 qtest_start(QEMU_2PXB_CMD); 99 qtest_end(); 100 } 101 102 static void cxl_root_port(void) 103 { 104 qtest_start(QEMU_PXB_CMD QEMU_RP); 105 qtest_end(); 106 } 107 108 static void cxl_2root_port(void) 109 { 110 qtest_start(QEMU_PXB_CMD QEMU_2RP); 111 qtest_end(); 112 } 113 114 #ifdef CONFIG_POSIX 115 static void cxl_t3d_deprecated(void) 116 { 117 g_autoptr(GString) cmdline = g_string_new(NULL); 118 g_autofree const char *tmpfs = NULL; 119 120 tmpfs = g_dir_make_tmp("cxl-test-XXXXXX", NULL); 121 122 g_string_printf(cmdline, QEMU_PXB_CMD QEMU_RP QEMU_T3D_DEPRECATED, 123 tmpfs, tmpfs); 124 125 qtest_start(cmdline->str); 126 qtest_end(); 127 rmdir(tmpfs); 128 } 129 130 static void cxl_t3d_persistent(void) 131 { 132 g_autoptr(GString) cmdline = g_string_new(NULL); 133 g_autofree const char *tmpfs = NULL; 134 135 tmpfs = g_dir_make_tmp("cxl-test-XXXXXX", NULL); 136 137 g_string_printf(cmdline, QEMU_PXB_CMD QEMU_RP QEMU_T3D_PMEM, 138 tmpfs, tmpfs); 139 140 qtest_start(cmdline->str); 141 qtest_end(); 142 rmdir(tmpfs); 143 } 144 145 static void cxl_t3d_volatile(void) 146 { 147 g_autoptr(GString) cmdline = g_string_new(NULL); 148 149 g_string_printf(cmdline, QEMU_PXB_CMD QEMU_RP QEMU_T3D_VMEM); 150 151 qtest_start(cmdline->str); 152 qtest_end(); 153 } 154 155 static void cxl_t3d_volatile_lsa(void) 156 { 157 g_autoptr(GString) cmdline = g_string_new(NULL); 158 g_autofree const char *tmpfs = NULL; 159 160 tmpfs = g_dir_make_tmp("cxl-test-XXXXXX", NULL); 161 162 g_string_printf(cmdline, QEMU_PXB_CMD QEMU_RP QEMU_T3D_VMEM_LSA, 163 tmpfs); 164 165 qtest_start(cmdline->str); 166 qtest_end(); 167 rmdir(tmpfs); 168 } 169 170 static void cxl_1pxb_2rp_2t3d(void) 171 { 172 g_autoptr(GString) cmdline = g_string_new(NULL); 173 g_autofree const char *tmpfs = NULL; 174 175 tmpfs = g_dir_make_tmp("cxl-test-XXXXXX", NULL); 176 177 g_string_printf(cmdline, QEMU_PXB_CMD QEMU_2RP QEMU_2T3D, 178 tmpfs, tmpfs, tmpfs, tmpfs); 179 180 qtest_start(cmdline->str); 181 qtest_end(); 182 rmdir(tmpfs); 183 } 184 185 static void cxl_2pxb_4rp_4t3d(void) 186 { 187 g_autoptr(GString) cmdline = g_string_new(NULL); 188 g_autofree const char *tmpfs = NULL; 189 190 tmpfs = g_dir_make_tmp("cxl-test-XXXXXX", NULL); 191 192 g_string_printf(cmdline, QEMU_2PXB_CMD QEMU_4RP QEMU_4T3D, 193 tmpfs, tmpfs, tmpfs, tmpfs, tmpfs, tmpfs, 194 tmpfs, tmpfs); 195 196 qtest_start(cmdline->str); 197 qtest_end(); 198 rmdir(tmpfs); 199 } 200 #endif /* CONFIG_POSIX */ 201 202 int main(int argc, char **argv) 203 { 204 g_test_init(&argc, &argv, NULL); 205 206 qtest_add_func("/pci/cxl/basic_hostbridge", cxl_basic_hb); 207 qtest_add_func("/pci/cxl/basic_pxb", cxl_basic_pxb); 208 qtest_add_func("/pci/cxl/pxb_with_window", cxl_pxb_with_window); 209 qtest_add_func("/pci/cxl/pxb_x2_with_window", cxl_2pxb_with_window); 210 qtest_add_func("/pci/cxl/rp", cxl_root_port); 211 qtest_add_func("/pci/cxl/rp_x2", cxl_2root_port); 212 #ifdef CONFIG_POSIX 213 qtest_add_func("/pci/cxl/type3_device", cxl_t3d_deprecated); 214 qtest_add_func("/pci/cxl/type3_device_pmem", cxl_t3d_persistent); 215 qtest_add_func("/pci/cxl/type3_device_vmem", cxl_t3d_volatile); 216 qtest_add_func("/pci/cxl/type3_device_vmem_lsa", cxl_t3d_volatile_lsa); 217 qtest_add_func("/pci/cxl/rp_x2_type3_x2", cxl_1pxb_2rp_2t3d); 218 qtest_add_func("/pci/cxl/pxb_x2_root_port_x4_type3_x4", cxl_2pxb_4rp_4t3d); 219 #endif 220 return g_test_run(); 221 } 222