1 /* 2 * Tiny Code Generator for QEMU 3 * 4 * Copyright (c) 2008 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 /* define it to use liveness analysis (better code) */ 26 #define USE_LIVENESS_ANALYSIS 27 #define USE_TCG_OPTIMIZATIONS 28 29 #include "qemu/osdep.h" 30 31 /* Define to jump the ELF file used to communicate with GDB. */ 32 #undef DEBUG_JIT 33 34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG) 35 /* define it to suppress various consistency checks (faster) */ 36 #define NDEBUG 37 #endif 38 39 #include "qemu-common.h" 40 #include "qemu/host-utils.h" 41 #include "qemu/timer.h" 42 43 /* Note: the long term plan is to reduce the dependencies on the QEMU 44 CPU definitions. Currently they are used for qemu_ld/st 45 instructions */ 46 #define NO_CPU_IO_DEFS 47 #include "cpu.h" 48 49 #include "tcg-op.h" 50 51 #if UINTPTR_MAX == UINT32_MAX 52 # define ELF_CLASS ELFCLASS32 53 #else 54 # define ELF_CLASS ELFCLASS64 55 #endif 56 #ifdef HOST_WORDS_BIGENDIAN 57 # define ELF_DATA ELFDATA2MSB 58 #else 59 # define ELF_DATA ELFDATA2LSB 60 #endif 61 62 #include "elf.h" 63 #include "exec/log.h" 64 65 /* Forward declarations for functions declared in tcg-target.c and used here. */ 66 static void tcg_target_init(TCGContext *s); 67 static void tcg_target_qemu_prologue(TCGContext *s); 68 static void patch_reloc(tcg_insn_unit *code_ptr, int type, 69 intptr_t value, intptr_t addend); 70 71 /* The CIE and FDE header definitions will be common to all hosts. */ 72 typedef struct { 73 uint32_t len __attribute__((aligned((sizeof(void *))))); 74 uint32_t id; 75 uint8_t version; 76 char augmentation[1]; 77 uint8_t code_align; 78 uint8_t data_align; 79 uint8_t return_column; 80 } DebugFrameCIE; 81 82 typedef struct QEMU_PACKED { 83 uint32_t len __attribute__((aligned((sizeof(void *))))); 84 uint32_t cie_offset; 85 uintptr_t func_start; 86 uintptr_t func_len; 87 } DebugFrameFDEHeader; 88 89 typedef struct QEMU_PACKED { 90 DebugFrameCIE cie; 91 DebugFrameFDEHeader fde; 92 } DebugFrameHeader; 93 94 static void tcg_register_jit_int(void *buf, size_t size, 95 const void *debug_frame, 96 size_t debug_frame_size) 97 __attribute__((unused)); 98 99 /* Forward declarations for functions declared and used in tcg-target.c. */ 100 static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str); 101 static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, 102 intptr_t arg2); 103 static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg); 104 static void tcg_out_movi(TCGContext *s, TCGType type, 105 TCGReg ret, tcg_target_long arg); 106 static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, 107 const int *const_args); 108 static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1, 109 intptr_t arg2); 110 static void tcg_out_call(TCGContext *s, tcg_insn_unit *target); 111 static int tcg_target_const_match(tcg_target_long val, TCGType type, 112 const TCGArgConstraint *arg_ct); 113 static void tcg_out_tb_init(TCGContext *s); 114 static void tcg_out_tb_finalize(TCGContext *s); 115 116 117 118 static TCGRegSet tcg_target_available_regs[2]; 119 static TCGRegSet tcg_target_call_clobber_regs; 120 121 #if TCG_TARGET_INSN_UNIT_SIZE == 1 122 static __attribute__((unused)) inline void tcg_out8(TCGContext *s, uint8_t v) 123 { 124 *s->code_ptr++ = v; 125 } 126 127 static __attribute__((unused)) inline void tcg_patch8(tcg_insn_unit *p, 128 uint8_t v) 129 { 130 *p = v; 131 } 132 #endif 133 134 #if TCG_TARGET_INSN_UNIT_SIZE <= 2 135 static __attribute__((unused)) inline void tcg_out16(TCGContext *s, uint16_t v) 136 { 137 if (TCG_TARGET_INSN_UNIT_SIZE == 2) { 138 *s->code_ptr++ = v; 139 } else { 140 tcg_insn_unit *p = s->code_ptr; 141 memcpy(p, &v, sizeof(v)); 142 s->code_ptr = p + (2 / TCG_TARGET_INSN_UNIT_SIZE); 143 } 144 } 145 146 static __attribute__((unused)) inline void tcg_patch16(tcg_insn_unit *p, 147 uint16_t v) 148 { 149 if (TCG_TARGET_INSN_UNIT_SIZE == 2) { 150 *p = v; 151 } else { 152 memcpy(p, &v, sizeof(v)); 153 } 154 } 155 #endif 156 157 #if TCG_TARGET_INSN_UNIT_SIZE <= 4 158 static __attribute__((unused)) inline void tcg_out32(TCGContext *s, uint32_t v) 159 { 160 if (TCG_TARGET_INSN_UNIT_SIZE == 4) { 161 *s->code_ptr++ = v; 162 } else { 163 tcg_insn_unit *p = s->code_ptr; 164 memcpy(p, &v, sizeof(v)); 165 s->code_ptr = p + (4 / TCG_TARGET_INSN_UNIT_SIZE); 166 } 167 } 168 169 static __attribute__((unused)) inline void tcg_patch32(tcg_insn_unit *p, 170 uint32_t v) 171 { 172 if (TCG_TARGET_INSN_UNIT_SIZE == 4) { 173 *p = v; 174 } else { 175 memcpy(p, &v, sizeof(v)); 176 } 177 } 178 #endif 179 180 #if TCG_TARGET_INSN_UNIT_SIZE <= 8 181 static __attribute__((unused)) inline void tcg_out64(TCGContext *s, uint64_t v) 182 { 183 if (TCG_TARGET_INSN_UNIT_SIZE == 8) { 184 *s->code_ptr++ = v; 185 } else { 186 tcg_insn_unit *p = s->code_ptr; 187 memcpy(p, &v, sizeof(v)); 188 s->code_ptr = p + (8 / TCG_TARGET_INSN_UNIT_SIZE); 189 } 190 } 191 192 static __attribute__((unused)) inline void tcg_patch64(tcg_insn_unit *p, 193 uint64_t v) 194 { 195 if (TCG_TARGET_INSN_UNIT_SIZE == 8) { 196 *p = v; 197 } else { 198 memcpy(p, &v, sizeof(v)); 199 } 200 } 201 #endif 202 203 /* label relocation processing */ 204 205 static void tcg_out_reloc(TCGContext *s, tcg_insn_unit *code_ptr, int type, 206 TCGLabel *l, intptr_t addend) 207 { 208 TCGRelocation *r; 209 210 if (l->has_value) { 211 /* FIXME: This may break relocations on RISC targets that 212 modify instruction fields in place. The caller may not have 213 written the initial value. */ 214 patch_reloc(code_ptr, type, l->u.value, addend); 215 } else { 216 /* add a new relocation entry */ 217 r = tcg_malloc(sizeof(TCGRelocation)); 218 r->type = type; 219 r->ptr = code_ptr; 220 r->addend = addend; 221 r->next = l->u.first_reloc; 222 l->u.first_reloc = r; 223 } 224 } 225 226 static void tcg_out_label(TCGContext *s, TCGLabel *l, tcg_insn_unit *ptr) 227 { 228 intptr_t value = (intptr_t)ptr; 229 TCGRelocation *r; 230 231 assert(!l->has_value); 232 233 for (r = l->u.first_reloc; r != NULL; r = r->next) { 234 patch_reloc(r->ptr, r->type, value, r->addend); 235 } 236 237 l->has_value = 1; 238 l->u.value_ptr = ptr; 239 } 240 241 TCGLabel *gen_new_label(void) 242 { 243 TCGContext *s = &tcg_ctx; 244 TCGLabel *l = tcg_malloc(sizeof(TCGLabel)); 245 246 *l = (TCGLabel){ 247 .id = s->nb_labels++ 248 }; 249 250 return l; 251 } 252 253 #include "tcg-target.c" 254 255 /* pool based memory allocation */ 256 void *tcg_malloc_internal(TCGContext *s, int size) 257 { 258 TCGPool *p; 259 int pool_size; 260 261 if (size > TCG_POOL_CHUNK_SIZE) { 262 /* big malloc: insert a new pool (XXX: could optimize) */ 263 p = g_malloc(sizeof(TCGPool) + size); 264 p->size = size; 265 p->next = s->pool_first_large; 266 s->pool_first_large = p; 267 return p->data; 268 } else { 269 p = s->pool_current; 270 if (!p) { 271 p = s->pool_first; 272 if (!p) 273 goto new_pool; 274 } else { 275 if (!p->next) { 276 new_pool: 277 pool_size = TCG_POOL_CHUNK_SIZE; 278 p = g_malloc(sizeof(TCGPool) + pool_size); 279 p->size = pool_size; 280 p->next = NULL; 281 if (s->pool_current) 282 s->pool_current->next = p; 283 else 284 s->pool_first = p; 285 } else { 286 p = p->next; 287 } 288 } 289 } 290 s->pool_current = p; 291 s->pool_cur = p->data + size; 292 s->pool_end = p->data + p->size; 293 return p->data; 294 } 295 296 void tcg_pool_reset(TCGContext *s) 297 { 298 TCGPool *p, *t; 299 for (p = s->pool_first_large; p; p = t) { 300 t = p->next; 301 g_free(p); 302 } 303 s->pool_first_large = NULL; 304 s->pool_cur = s->pool_end = NULL; 305 s->pool_current = NULL; 306 } 307 308 typedef struct TCGHelperInfo { 309 void *func; 310 const char *name; 311 unsigned flags; 312 unsigned sizemask; 313 } TCGHelperInfo; 314 315 #include "exec/helper-proto.h" 316 317 static const TCGHelperInfo all_helpers[] = { 318 #include "exec/helper-tcg.h" 319 }; 320 321 void tcg_context_init(TCGContext *s) 322 { 323 int op, total_args, n, i; 324 TCGOpDef *def; 325 TCGArgConstraint *args_ct; 326 int *sorted_args; 327 GHashTable *helper_table; 328 329 memset(s, 0, sizeof(*s)); 330 s->nb_globals = 0; 331 332 /* Count total number of arguments and allocate the corresponding 333 space */ 334 total_args = 0; 335 for(op = 0; op < NB_OPS; op++) { 336 def = &tcg_op_defs[op]; 337 n = def->nb_iargs + def->nb_oargs; 338 total_args += n; 339 } 340 341 args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args); 342 sorted_args = g_malloc(sizeof(int) * total_args); 343 344 for(op = 0; op < NB_OPS; op++) { 345 def = &tcg_op_defs[op]; 346 def->args_ct = args_ct; 347 def->sorted_args = sorted_args; 348 n = def->nb_iargs + def->nb_oargs; 349 sorted_args += n; 350 args_ct += n; 351 } 352 353 /* Register helpers. */ 354 /* Use g_direct_hash/equal for direct pointer comparisons on func. */ 355 s->helpers = helper_table = g_hash_table_new(NULL, NULL); 356 357 for (i = 0; i < ARRAY_SIZE(all_helpers); ++i) { 358 g_hash_table_insert(helper_table, (gpointer)all_helpers[i].func, 359 (gpointer)&all_helpers[i]); 360 } 361 362 tcg_target_init(s); 363 } 364 365 void tcg_prologue_init(TCGContext *s) 366 { 367 size_t prologue_size, total_size; 368 void *buf0, *buf1; 369 370 /* Put the prologue at the beginning of code_gen_buffer. */ 371 buf0 = s->code_gen_buffer; 372 s->code_ptr = buf0; 373 s->code_buf = buf0; 374 s->code_gen_prologue = buf0; 375 376 /* Generate the prologue. */ 377 tcg_target_qemu_prologue(s); 378 buf1 = s->code_ptr; 379 flush_icache_range((uintptr_t)buf0, (uintptr_t)buf1); 380 381 /* Deduct the prologue from the buffer. */ 382 prologue_size = tcg_current_code_size(s); 383 s->code_gen_ptr = buf1; 384 s->code_gen_buffer = buf1; 385 s->code_buf = buf1; 386 total_size = s->code_gen_buffer_size - prologue_size; 387 s->code_gen_buffer_size = total_size; 388 389 /* Compute a high-water mark, at which we voluntarily flush the buffer 390 and start over. The size here is arbitrary, significantly larger 391 than we expect the code generation for any one opcode to require. */ 392 /* ??? We currently have no good estimate for, or checks in, 393 tcg_out_tb_finalize. If there are quite a lot of guest memory ops, 394 the number of out-of-line fragments could be quite high. In the 395 short-term, increase the highwater buffer. */ 396 s->code_gen_highwater = s->code_gen_buffer + (total_size - 64*1024); 397 398 tcg_register_jit(s->code_gen_buffer, total_size); 399 400 #ifdef DEBUG_DISAS 401 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { 402 qemu_log("PROLOGUE: [size=%zu]\n", prologue_size); 403 log_disas(buf0, prologue_size); 404 qemu_log("\n"); 405 qemu_log_flush(); 406 } 407 #endif 408 } 409 410 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size) 411 { 412 s->frame_start = start; 413 s->frame_end = start + size; 414 s->frame_reg = reg; 415 } 416 417 void tcg_func_start(TCGContext *s) 418 { 419 tcg_pool_reset(s); 420 s->nb_temps = s->nb_globals; 421 422 /* No temps have been previously allocated for size or locality. */ 423 memset(s->free_temps, 0, sizeof(s->free_temps)); 424 425 s->nb_labels = 0; 426 s->current_frame_offset = s->frame_start; 427 428 #ifdef CONFIG_DEBUG_TCG 429 s->goto_tb_issue_mask = 0; 430 #endif 431 432 s->gen_first_op_idx = 0; 433 s->gen_last_op_idx = -1; 434 s->gen_next_op_idx = 0; 435 s->gen_next_parm_idx = 0; 436 437 s->be = tcg_malloc(sizeof(TCGBackendData)); 438 } 439 440 static inline void tcg_temp_alloc(TCGContext *s, int n) 441 { 442 if (n > TCG_MAX_TEMPS) 443 tcg_abort(); 444 } 445 446 static inline int tcg_global_reg_new_internal(TCGType type, int reg, 447 const char *name) 448 { 449 TCGContext *s = &tcg_ctx; 450 TCGTemp *ts; 451 int idx; 452 453 #if TCG_TARGET_REG_BITS == 32 454 if (type != TCG_TYPE_I32) 455 tcg_abort(); 456 #endif 457 if (tcg_regset_test_reg(s->reserved_regs, reg)) 458 tcg_abort(); 459 idx = s->nb_globals; 460 tcg_temp_alloc(s, s->nb_globals + 1); 461 ts = &s->temps[s->nb_globals]; 462 ts->base_type = type; 463 ts->type = type; 464 ts->fixed_reg = 1; 465 ts->reg = reg; 466 ts->name = name; 467 s->nb_globals++; 468 tcg_regset_set_reg(s->reserved_regs, reg); 469 return idx; 470 } 471 472 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name) 473 { 474 int idx; 475 476 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name); 477 return MAKE_TCGV_I32(idx); 478 } 479 480 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name) 481 { 482 int idx; 483 484 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name); 485 return MAKE_TCGV_I64(idx); 486 } 487 488 static inline int tcg_global_mem_new_internal(TCGType type, int reg, 489 intptr_t offset, 490 const char *name) 491 { 492 TCGContext *s = &tcg_ctx; 493 TCGTemp *ts; 494 int idx; 495 496 idx = s->nb_globals; 497 #if TCG_TARGET_REG_BITS == 32 498 if (type == TCG_TYPE_I64) { 499 char buf[64]; 500 tcg_temp_alloc(s, s->nb_globals + 2); 501 ts = &s->temps[s->nb_globals]; 502 ts->base_type = type; 503 ts->type = TCG_TYPE_I32; 504 ts->fixed_reg = 0; 505 ts->mem_allocated = 1; 506 ts->mem_reg = reg; 507 #ifdef HOST_WORDS_BIGENDIAN 508 ts->mem_offset = offset + 4; 509 #else 510 ts->mem_offset = offset; 511 #endif 512 pstrcpy(buf, sizeof(buf), name); 513 pstrcat(buf, sizeof(buf), "_0"); 514 ts->name = strdup(buf); 515 ts++; 516 517 ts->base_type = type; 518 ts->type = TCG_TYPE_I32; 519 ts->fixed_reg = 0; 520 ts->mem_allocated = 1; 521 ts->mem_reg = reg; 522 #ifdef HOST_WORDS_BIGENDIAN 523 ts->mem_offset = offset; 524 #else 525 ts->mem_offset = offset + 4; 526 #endif 527 pstrcpy(buf, sizeof(buf), name); 528 pstrcat(buf, sizeof(buf), "_1"); 529 ts->name = strdup(buf); 530 531 s->nb_globals += 2; 532 } else 533 #endif 534 { 535 tcg_temp_alloc(s, s->nb_globals + 1); 536 ts = &s->temps[s->nb_globals]; 537 ts->base_type = type; 538 ts->type = type; 539 ts->fixed_reg = 0; 540 ts->mem_allocated = 1; 541 ts->mem_reg = reg; 542 ts->mem_offset = offset; 543 ts->name = name; 544 s->nb_globals++; 545 } 546 return idx; 547 } 548 549 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name) 550 { 551 int idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name); 552 return MAKE_TCGV_I32(idx); 553 } 554 555 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name) 556 { 557 int idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name); 558 return MAKE_TCGV_I64(idx); 559 } 560 561 static inline int tcg_temp_new_internal(TCGType type, int temp_local) 562 { 563 TCGContext *s = &tcg_ctx; 564 TCGTemp *ts; 565 int idx, k; 566 567 k = type + (temp_local ? TCG_TYPE_COUNT : 0); 568 idx = find_first_bit(s->free_temps[k].l, TCG_MAX_TEMPS); 569 if (idx < TCG_MAX_TEMPS) { 570 /* There is already an available temp with the right type. */ 571 clear_bit(idx, s->free_temps[k].l); 572 573 ts = &s->temps[idx]; 574 ts->temp_allocated = 1; 575 assert(ts->base_type == type); 576 assert(ts->temp_local == temp_local); 577 } else { 578 idx = s->nb_temps; 579 #if TCG_TARGET_REG_BITS == 32 580 if (type == TCG_TYPE_I64) { 581 tcg_temp_alloc(s, s->nb_temps + 2); 582 ts = &s->temps[s->nb_temps]; 583 ts->base_type = type; 584 ts->type = TCG_TYPE_I32; 585 ts->temp_allocated = 1; 586 ts->temp_local = temp_local; 587 ts->name = NULL; 588 ts++; 589 ts->base_type = type; 590 ts->type = TCG_TYPE_I32; 591 ts->temp_allocated = 1; 592 ts->temp_local = temp_local; 593 ts->name = NULL; 594 s->nb_temps += 2; 595 } else 596 #endif 597 { 598 tcg_temp_alloc(s, s->nb_temps + 1); 599 ts = &s->temps[s->nb_temps]; 600 ts->base_type = type; 601 ts->type = type; 602 ts->temp_allocated = 1; 603 ts->temp_local = temp_local; 604 ts->name = NULL; 605 s->nb_temps++; 606 } 607 } 608 609 #if defined(CONFIG_DEBUG_TCG) 610 s->temps_in_use++; 611 #endif 612 return idx; 613 } 614 615 TCGv_i32 tcg_temp_new_internal_i32(int temp_local) 616 { 617 int idx; 618 619 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local); 620 return MAKE_TCGV_I32(idx); 621 } 622 623 TCGv_i64 tcg_temp_new_internal_i64(int temp_local) 624 { 625 int idx; 626 627 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local); 628 return MAKE_TCGV_I64(idx); 629 } 630 631 static void tcg_temp_free_internal(int idx) 632 { 633 TCGContext *s = &tcg_ctx; 634 TCGTemp *ts; 635 int k; 636 637 #if defined(CONFIG_DEBUG_TCG) 638 s->temps_in_use--; 639 if (s->temps_in_use < 0) { 640 fprintf(stderr, "More temporaries freed than allocated!\n"); 641 } 642 #endif 643 644 assert(idx >= s->nb_globals && idx < s->nb_temps); 645 ts = &s->temps[idx]; 646 assert(ts->temp_allocated != 0); 647 ts->temp_allocated = 0; 648 649 k = ts->base_type + (ts->temp_local ? TCG_TYPE_COUNT : 0); 650 set_bit(idx, s->free_temps[k].l); 651 } 652 653 void tcg_temp_free_i32(TCGv_i32 arg) 654 { 655 tcg_temp_free_internal(GET_TCGV_I32(arg)); 656 } 657 658 void tcg_temp_free_i64(TCGv_i64 arg) 659 { 660 tcg_temp_free_internal(GET_TCGV_I64(arg)); 661 } 662 663 TCGv_i32 tcg_const_i32(int32_t val) 664 { 665 TCGv_i32 t0; 666 t0 = tcg_temp_new_i32(); 667 tcg_gen_movi_i32(t0, val); 668 return t0; 669 } 670 671 TCGv_i64 tcg_const_i64(int64_t val) 672 { 673 TCGv_i64 t0; 674 t0 = tcg_temp_new_i64(); 675 tcg_gen_movi_i64(t0, val); 676 return t0; 677 } 678 679 TCGv_i32 tcg_const_local_i32(int32_t val) 680 { 681 TCGv_i32 t0; 682 t0 = tcg_temp_local_new_i32(); 683 tcg_gen_movi_i32(t0, val); 684 return t0; 685 } 686 687 TCGv_i64 tcg_const_local_i64(int64_t val) 688 { 689 TCGv_i64 t0; 690 t0 = tcg_temp_local_new_i64(); 691 tcg_gen_movi_i64(t0, val); 692 return t0; 693 } 694 695 #if defined(CONFIG_DEBUG_TCG) 696 void tcg_clear_temp_count(void) 697 { 698 TCGContext *s = &tcg_ctx; 699 s->temps_in_use = 0; 700 } 701 702 int tcg_check_temp_count(void) 703 { 704 TCGContext *s = &tcg_ctx; 705 if (s->temps_in_use) { 706 /* Clear the count so that we don't give another 707 * warning immediately next time around. 708 */ 709 s->temps_in_use = 0; 710 return 1; 711 } 712 return 0; 713 } 714 #endif 715 716 /* Note: we convert the 64 bit args to 32 bit and do some alignment 717 and endian swap. Maybe it would be better to do the alignment 718 and endian swap in tcg_reg_alloc_call(). */ 719 void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret, 720 int nargs, TCGArg *args) 721 { 722 int i, real_args, nb_rets, pi, pi_first; 723 unsigned sizemask, flags; 724 TCGHelperInfo *info; 725 726 info = g_hash_table_lookup(s->helpers, (gpointer)func); 727 flags = info->flags; 728 sizemask = info->sizemask; 729 730 #if defined(__sparc__) && !defined(__arch64__) \ 731 && !defined(CONFIG_TCG_INTERPRETER) 732 /* We have 64-bit values in one register, but need to pass as two 733 separate parameters. Split them. */ 734 int orig_sizemask = sizemask; 735 int orig_nargs = nargs; 736 TCGv_i64 retl, reth; 737 738 TCGV_UNUSED_I64(retl); 739 TCGV_UNUSED_I64(reth); 740 if (sizemask != 0) { 741 TCGArg *split_args = __builtin_alloca(sizeof(TCGArg) * nargs * 2); 742 for (i = real_args = 0; i < nargs; ++i) { 743 int is_64bit = sizemask & (1 << (i+1)*2); 744 if (is_64bit) { 745 TCGv_i64 orig = MAKE_TCGV_I64(args[i]); 746 TCGv_i32 h = tcg_temp_new_i32(); 747 TCGv_i32 l = tcg_temp_new_i32(); 748 tcg_gen_extr_i64_i32(l, h, orig); 749 split_args[real_args++] = GET_TCGV_I32(h); 750 split_args[real_args++] = GET_TCGV_I32(l); 751 } else { 752 split_args[real_args++] = args[i]; 753 } 754 } 755 nargs = real_args; 756 args = split_args; 757 sizemask = 0; 758 } 759 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 760 for (i = 0; i < nargs; ++i) { 761 int is_64bit = sizemask & (1 << (i+1)*2); 762 int is_signed = sizemask & (2 << (i+1)*2); 763 if (!is_64bit) { 764 TCGv_i64 temp = tcg_temp_new_i64(); 765 TCGv_i64 orig = MAKE_TCGV_I64(args[i]); 766 if (is_signed) { 767 tcg_gen_ext32s_i64(temp, orig); 768 } else { 769 tcg_gen_ext32u_i64(temp, orig); 770 } 771 args[i] = GET_TCGV_I64(temp); 772 } 773 } 774 #endif /* TCG_TARGET_EXTEND_ARGS */ 775 776 pi_first = pi = s->gen_next_parm_idx; 777 if (ret != TCG_CALL_DUMMY_ARG) { 778 #if defined(__sparc__) && !defined(__arch64__) \ 779 && !defined(CONFIG_TCG_INTERPRETER) 780 if (orig_sizemask & 1) { 781 /* The 32-bit ABI is going to return the 64-bit value in 782 the %o0/%o1 register pair. Prepare for this by using 783 two return temporaries, and reassemble below. */ 784 retl = tcg_temp_new_i64(); 785 reth = tcg_temp_new_i64(); 786 s->gen_opparam_buf[pi++] = GET_TCGV_I64(reth); 787 s->gen_opparam_buf[pi++] = GET_TCGV_I64(retl); 788 nb_rets = 2; 789 } else { 790 s->gen_opparam_buf[pi++] = ret; 791 nb_rets = 1; 792 } 793 #else 794 if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) { 795 #ifdef HOST_WORDS_BIGENDIAN 796 s->gen_opparam_buf[pi++] = ret + 1; 797 s->gen_opparam_buf[pi++] = ret; 798 #else 799 s->gen_opparam_buf[pi++] = ret; 800 s->gen_opparam_buf[pi++] = ret + 1; 801 #endif 802 nb_rets = 2; 803 } else { 804 s->gen_opparam_buf[pi++] = ret; 805 nb_rets = 1; 806 } 807 #endif 808 } else { 809 nb_rets = 0; 810 } 811 real_args = 0; 812 for (i = 0; i < nargs; i++) { 813 int is_64bit = sizemask & (1 << (i+1)*2); 814 if (TCG_TARGET_REG_BITS < 64 && is_64bit) { 815 #ifdef TCG_TARGET_CALL_ALIGN_ARGS 816 /* some targets want aligned 64 bit args */ 817 if (real_args & 1) { 818 s->gen_opparam_buf[pi++] = TCG_CALL_DUMMY_ARG; 819 real_args++; 820 } 821 #endif 822 /* If stack grows up, then we will be placing successive 823 arguments at lower addresses, which means we need to 824 reverse the order compared to how we would normally 825 treat either big or little-endian. For those arguments 826 that will wind up in registers, this still works for 827 HPPA (the only current STACK_GROWSUP target) since the 828 argument registers are *also* allocated in decreasing 829 order. If another such target is added, this logic may 830 have to get more complicated to differentiate between 831 stack arguments and register arguments. */ 832 #if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP) 833 s->gen_opparam_buf[pi++] = args[i] + 1; 834 s->gen_opparam_buf[pi++] = args[i]; 835 #else 836 s->gen_opparam_buf[pi++] = args[i]; 837 s->gen_opparam_buf[pi++] = args[i] + 1; 838 #endif 839 real_args += 2; 840 continue; 841 } 842 843 s->gen_opparam_buf[pi++] = args[i]; 844 real_args++; 845 } 846 s->gen_opparam_buf[pi++] = (uintptr_t)func; 847 s->gen_opparam_buf[pi++] = flags; 848 849 i = s->gen_next_op_idx; 850 tcg_debug_assert(i < OPC_BUF_SIZE); 851 tcg_debug_assert(pi <= OPPARAM_BUF_SIZE); 852 853 /* Set links for sequential allocation during translation. */ 854 s->gen_op_buf[i] = (TCGOp){ 855 .opc = INDEX_op_call, 856 .callo = nb_rets, 857 .calli = real_args, 858 .args = pi_first, 859 .prev = i - 1, 860 .next = i + 1 861 }; 862 863 /* Make sure the calli field didn't overflow. */ 864 tcg_debug_assert(s->gen_op_buf[i].calli == real_args); 865 866 s->gen_last_op_idx = i; 867 s->gen_next_op_idx = i + 1; 868 s->gen_next_parm_idx = pi; 869 870 #if defined(__sparc__) && !defined(__arch64__) \ 871 && !defined(CONFIG_TCG_INTERPRETER) 872 /* Free all of the parts we allocated above. */ 873 for (i = real_args = 0; i < orig_nargs; ++i) { 874 int is_64bit = orig_sizemask & (1 << (i+1)*2); 875 if (is_64bit) { 876 TCGv_i32 h = MAKE_TCGV_I32(args[real_args++]); 877 TCGv_i32 l = MAKE_TCGV_I32(args[real_args++]); 878 tcg_temp_free_i32(h); 879 tcg_temp_free_i32(l); 880 } else { 881 real_args++; 882 } 883 } 884 if (orig_sizemask & 1) { 885 /* The 32-bit ABI returned two 32-bit pieces. Re-assemble them. 886 Note that describing these as TCGv_i64 eliminates an unnecessary 887 zero-extension that tcg_gen_concat_i32_i64 would create. */ 888 tcg_gen_concat32_i64(MAKE_TCGV_I64(ret), retl, reth); 889 tcg_temp_free_i64(retl); 890 tcg_temp_free_i64(reth); 891 } 892 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 893 for (i = 0; i < nargs; ++i) { 894 int is_64bit = sizemask & (1 << (i+1)*2); 895 if (!is_64bit) { 896 TCGv_i64 temp = MAKE_TCGV_I64(args[i]); 897 tcg_temp_free_i64(temp); 898 } 899 } 900 #endif /* TCG_TARGET_EXTEND_ARGS */ 901 } 902 903 static void tcg_reg_alloc_start(TCGContext *s) 904 { 905 int i; 906 TCGTemp *ts; 907 for(i = 0; i < s->nb_globals; i++) { 908 ts = &s->temps[i]; 909 if (ts->fixed_reg) { 910 ts->val_type = TEMP_VAL_REG; 911 } else { 912 ts->val_type = TEMP_VAL_MEM; 913 } 914 } 915 for(i = s->nb_globals; i < s->nb_temps; i++) { 916 ts = &s->temps[i]; 917 if (ts->temp_local) { 918 ts->val_type = TEMP_VAL_MEM; 919 } else { 920 ts->val_type = TEMP_VAL_DEAD; 921 } 922 ts->mem_allocated = 0; 923 ts->fixed_reg = 0; 924 } 925 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 926 s->reg_to_temp[i] = -1; 927 } 928 } 929 930 static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size, 931 int idx) 932 { 933 TCGTemp *ts; 934 935 assert(idx >= 0 && idx < s->nb_temps); 936 ts = &s->temps[idx]; 937 if (idx < s->nb_globals) { 938 pstrcpy(buf, buf_size, ts->name); 939 } else { 940 if (ts->temp_local) 941 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals); 942 else 943 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals); 944 } 945 return buf; 946 } 947 948 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg) 949 { 950 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg)); 951 } 952 953 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg) 954 { 955 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg)); 956 } 957 958 /* Find helper name. */ 959 static inline const char *tcg_find_helper(TCGContext *s, uintptr_t val) 960 { 961 const char *ret = NULL; 962 if (s->helpers) { 963 TCGHelperInfo *info = g_hash_table_lookup(s->helpers, (gpointer)val); 964 if (info) { 965 ret = info->name; 966 } 967 } 968 return ret; 969 } 970 971 static const char * const cond_name[] = 972 { 973 [TCG_COND_NEVER] = "never", 974 [TCG_COND_ALWAYS] = "always", 975 [TCG_COND_EQ] = "eq", 976 [TCG_COND_NE] = "ne", 977 [TCG_COND_LT] = "lt", 978 [TCG_COND_GE] = "ge", 979 [TCG_COND_LE] = "le", 980 [TCG_COND_GT] = "gt", 981 [TCG_COND_LTU] = "ltu", 982 [TCG_COND_GEU] = "geu", 983 [TCG_COND_LEU] = "leu", 984 [TCG_COND_GTU] = "gtu" 985 }; 986 987 static const char * const ldst_name[] = 988 { 989 [MO_UB] = "ub", 990 [MO_SB] = "sb", 991 [MO_LEUW] = "leuw", 992 [MO_LESW] = "lesw", 993 [MO_LEUL] = "leul", 994 [MO_LESL] = "lesl", 995 [MO_LEQ] = "leq", 996 [MO_BEUW] = "beuw", 997 [MO_BESW] = "besw", 998 [MO_BEUL] = "beul", 999 [MO_BESL] = "besl", 1000 [MO_BEQ] = "beq", 1001 }; 1002 1003 void tcg_dump_ops(TCGContext *s) 1004 { 1005 char buf[128]; 1006 TCGOp *op; 1007 int oi; 1008 1009 for (oi = s->gen_first_op_idx; oi >= 0; oi = op->next) { 1010 int i, k, nb_oargs, nb_iargs, nb_cargs; 1011 const TCGOpDef *def; 1012 const TCGArg *args; 1013 TCGOpcode c; 1014 1015 op = &s->gen_op_buf[oi]; 1016 c = op->opc; 1017 def = &tcg_op_defs[c]; 1018 args = &s->gen_opparam_buf[op->args]; 1019 1020 if (c == INDEX_op_insn_start) { 1021 qemu_log("%s ----", oi != s->gen_first_op_idx ? "\n" : ""); 1022 1023 for (i = 0; i < TARGET_INSN_START_WORDS; ++i) { 1024 target_ulong a; 1025 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS 1026 a = ((target_ulong)args[i * 2 + 1] << 32) | args[i * 2]; 1027 #else 1028 a = args[i]; 1029 #endif 1030 qemu_log(" " TARGET_FMT_lx, a); 1031 } 1032 } else if (c == INDEX_op_call) { 1033 /* variable number of arguments */ 1034 nb_oargs = op->callo; 1035 nb_iargs = op->calli; 1036 nb_cargs = def->nb_cargs; 1037 1038 /* function name, flags, out args */ 1039 qemu_log(" %s %s,$0x%" TCG_PRIlx ",$%d", def->name, 1040 tcg_find_helper(s, args[nb_oargs + nb_iargs]), 1041 args[nb_oargs + nb_iargs + 1], nb_oargs); 1042 for (i = 0; i < nb_oargs; i++) { 1043 qemu_log(",%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1044 args[i])); 1045 } 1046 for (i = 0; i < nb_iargs; i++) { 1047 TCGArg arg = args[nb_oargs + i]; 1048 const char *t = "<dummy>"; 1049 if (arg != TCG_CALL_DUMMY_ARG) { 1050 t = tcg_get_arg_str_idx(s, buf, sizeof(buf), arg); 1051 } 1052 qemu_log(",%s", t); 1053 } 1054 } else { 1055 qemu_log(" %s ", def->name); 1056 1057 nb_oargs = def->nb_oargs; 1058 nb_iargs = def->nb_iargs; 1059 nb_cargs = def->nb_cargs; 1060 1061 k = 0; 1062 for (i = 0; i < nb_oargs; i++) { 1063 if (k != 0) { 1064 qemu_log(","); 1065 } 1066 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1067 args[k++])); 1068 } 1069 for (i = 0; i < nb_iargs; i++) { 1070 if (k != 0) { 1071 qemu_log(","); 1072 } 1073 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1074 args[k++])); 1075 } 1076 switch (c) { 1077 case INDEX_op_brcond_i32: 1078 case INDEX_op_setcond_i32: 1079 case INDEX_op_movcond_i32: 1080 case INDEX_op_brcond2_i32: 1081 case INDEX_op_setcond2_i32: 1082 case INDEX_op_brcond_i64: 1083 case INDEX_op_setcond_i64: 1084 case INDEX_op_movcond_i64: 1085 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) { 1086 qemu_log(",%s", cond_name[args[k++]]); 1087 } else { 1088 qemu_log(",$0x%" TCG_PRIlx, args[k++]); 1089 } 1090 i = 1; 1091 break; 1092 case INDEX_op_qemu_ld_i32: 1093 case INDEX_op_qemu_st_i32: 1094 case INDEX_op_qemu_ld_i64: 1095 case INDEX_op_qemu_st_i64: 1096 { 1097 TCGMemOpIdx oi = args[k++]; 1098 TCGMemOp op = get_memop(oi); 1099 unsigned ix = get_mmuidx(oi); 1100 1101 if (op & ~(MO_AMASK | MO_BSWAP | MO_SSIZE)) { 1102 qemu_log(",$0x%x,%u", op, ix); 1103 } else { 1104 const char *s_al = "", *s_op; 1105 if (op & MO_AMASK) { 1106 if ((op & MO_AMASK) == MO_ALIGN) { 1107 s_al = "al+"; 1108 } else { 1109 s_al = "un+"; 1110 } 1111 } 1112 s_op = ldst_name[op & (MO_BSWAP | MO_SSIZE)]; 1113 qemu_log(",%s%s,%u", s_al, s_op, ix); 1114 } 1115 i = 1; 1116 } 1117 break; 1118 default: 1119 i = 0; 1120 break; 1121 } 1122 switch (c) { 1123 case INDEX_op_set_label: 1124 case INDEX_op_br: 1125 case INDEX_op_brcond_i32: 1126 case INDEX_op_brcond_i64: 1127 case INDEX_op_brcond2_i32: 1128 qemu_log("%s$L%d", k ? "," : "", arg_label(args[k])->id); 1129 i++, k++; 1130 break; 1131 default: 1132 break; 1133 } 1134 for (; i < nb_cargs; i++, k++) { 1135 qemu_log("%s$0x%" TCG_PRIlx, k ? "," : "", args[k]); 1136 } 1137 } 1138 qemu_log("\n"); 1139 } 1140 } 1141 1142 /* we give more priority to constraints with less registers */ 1143 static int get_constraint_priority(const TCGOpDef *def, int k) 1144 { 1145 const TCGArgConstraint *arg_ct; 1146 1147 int i, n; 1148 arg_ct = &def->args_ct[k]; 1149 if (arg_ct->ct & TCG_CT_ALIAS) { 1150 /* an alias is equivalent to a single register */ 1151 n = 1; 1152 } else { 1153 if (!(arg_ct->ct & TCG_CT_REG)) 1154 return 0; 1155 n = 0; 1156 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 1157 if (tcg_regset_test_reg(arg_ct->u.regs, i)) 1158 n++; 1159 } 1160 } 1161 return TCG_TARGET_NB_REGS - n + 1; 1162 } 1163 1164 /* sort from highest priority to lowest */ 1165 static void sort_constraints(TCGOpDef *def, int start, int n) 1166 { 1167 int i, j, p1, p2, tmp; 1168 1169 for(i = 0; i < n; i++) 1170 def->sorted_args[start + i] = start + i; 1171 if (n <= 1) 1172 return; 1173 for(i = 0; i < n - 1; i++) { 1174 for(j = i + 1; j < n; j++) { 1175 p1 = get_constraint_priority(def, def->sorted_args[start + i]); 1176 p2 = get_constraint_priority(def, def->sorted_args[start + j]); 1177 if (p1 < p2) { 1178 tmp = def->sorted_args[start + i]; 1179 def->sorted_args[start + i] = def->sorted_args[start + j]; 1180 def->sorted_args[start + j] = tmp; 1181 } 1182 } 1183 } 1184 } 1185 1186 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs) 1187 { 1188 TCGOpcode op; 1189 TCGOpDef *def; 1190 const char *ct_str; 1191 int i, nb_args; 1192 1193 for(;;) { 1194 if (tdefs->op == (TCGOpcode)-1) 1195 break; 1196 op = tdefs->op; 1197 assert((unsigned)op < NB_OPS); 1198 def = &tcg_op_defs[op]; 1199 #if defined(CONFIG_DEBUG_TCG) 1200 /* Duplicate entry in op definitions? */ 1201 assert(!def->used); 1202 def->used = 1; 1203 #endif 1204 nb_args = def->nb_iargs + def->nb_oargs; 1205 for(i = 0; i < nb_args; i++) { 1206 ct_str = tdefs->args_ct_str[i]; 1207 /* Incomplete TCGTargetOpDef entry? */ 1208 assert(ct_str != NULL); 1209 tcg_regset_clear(def->args_ct[i].u.regs); 1210 def->args_ct[i].ct = 0; 1211 if (ct_str[0] >= '0' && ct_str[0] <= '9') { 1212 int oarg; 1213 oarg = ct_str[0] - '0'; 1214 assert(oarg < def->nb_oargs); 1215 assert(def->args_ct[oarg].ct & TCG_CT_REG); 1216 /* TCG_CT_ALIAS is for the output arguments. The input 1217 argument is tagged with TCG_CT_IALIAS. */ 1218 def->args_ct[i] = def->args_ct[oarg]; 1219 def->args_ct[oarg].ct = TCG_CT_ALIAS; 1220 def->args_ct[oarg].alias_index = i; 1221 def->args_ct[i].ct |= TCG_CT_IALIAS; 1222 def->args_ct[i].alias_index = oarg; 1223 } else { 1224 for(;;) { 1225 if (*ct_str == '\0') 1226 break; 1227 switch(*ct_str) { 1228 case 'i': 1229 def->args_ct[i].ct |= TCG_CT_CONST; 1230 ct_str++; 1231 break; 1232 default: 1233 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) { 1234 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n", 1235 ct_str, i, def->name); 1236 exit(1); 1237 } 1238 } 1239 } 1240 } 1241 } 1242 1243 /* TCGTargetOpDef entry with too much information? */ 1244 assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL); 1245 1246 /* sort the constraints (XXX: this is just an heuristic) */ 1247 sort_constraints(def, 0, def->nb_oargs); 1248 sort_constraints(def, def->nb_oargs, def->nb_iargs); 1249 1250 #if 0 1251 { 1252 int i; 1253 1254 printf("%s: sorted=", def->name); 1255 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++) 1256 printf(" %d", def->sorted_args[i]); 1257 printf("\n"); 1258 } 1259 #endif 1260 tdefs++; 1261 } 1262 1263 #if defined(CONFIG_DEBUG_TCG) 1264 i = 0; 1265 for (op = 0; op < tcg_op_defs_max; op++) { 1266 const TCGOpDef *def = &tcg_op_defs[op]; 1267 if (def->flags & TCG_OPF_NOT_PRESENT) { 1268 /* Wrong entry in op definitions? */ 1269 if (def->used) { 1270 fprintf(stderr, "Invalid op definition for %s\n", def->name); 1271 i = 1; 1272 } 1273 } else { 1274 /* Missing entry in op definitions? */ 1275 if (!def->used) { 1276 fprintf(stderr, "Missing op definition for %s\n", def->name); 1277 i = 1; 1278 } 1279 } 1280 } 1281 if (i == 1) { 1282 tcg_abort(); 1283 } 1284 #endif 1285 } 1286 1287 void tcg_op_remove(TCGContext *s, TCGOp *op) 1288 { 1289 int next = op->next; 1290 int prev = op->prev; 1291 1292 if (next >= 0) { 1293 s->gen_op_buf[next].prev = prev; 1294 } else { 1295 s->gen_last_op_idx = prev; 1296 } 1297 if (prev >= 0) { 1298 s->gen_op_buf[prev].next = next; 1299 } else { 1300 s->gen_first_op_idx = next; 1301 } 1302 1303 memset(op, -1, sizeof(*op)); 1304 1305 #ifdef CONFIG_PROFILER 1306 s->del_op_count++; 1307 #endif 1308 } 1309 1310 #ifdef USE_LIVENESS_ANALYSIS 1311 /* liveness analysis: end of function: all temps are dead, and globals 1312 should be in memory. */ 1313 static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps, 1314 uint8_t *mem_temps) 1315 { 1316 memset(dead_temps, 1, s->nb_temps); 1317 memset(mem_temps, 1, s->nb_globals); 1318 memset(mem_temps + s->nb_globals, 0, s->nb_temps - s->nb_globals); 1319 } 1320 1321 /* liveness analysis: end of basic block: all temps are dead, globals 1322 and local temps should be in memory. */ 1323 static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps, 1324 uint8_t *mem_temps) 1325 { 1326 int i; 1327 1328 memset(dead_temps, 1, s->nb_temps); 1329 memset(mem_temps, 1, s->nb_globals); 1330 for(i = s->nb_globals; i < s->nb_temps; i++) { 1331 mem_temps[i] = s->temps[i].temp_local; 1332 } 1333 } 1334 1335 /* Liveness analysis : update the opc_dead_args array to tell if a 1336 given input arguments is dead. Instructions updating dead 1337 temporaries are removed. */ 1338 static void tcg_liveness_analysis(TCGContext *s) 1339 { 1340 uint8_t *dead_temps, *mem_temps; 1341 int oi, oi_prev, nb_ops; 1342 1343 nb_ops = s->gen_next_op_idx; 1344 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); 1345 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); 1346 1347 dead_temps = tcg_malloc(s->nb_temps); 1348 mem_temps = tcg_malloc(s->nb_temps); 1349 tcg_la_func_end(s, dead_temps, mem_temps); 1350 1351 for (oi = s->gen_last_op_idx; oi >= 0; oi = oi_prev) { 1352 int i, nb_iargs, nb_oargs; 1353 TCGOpcode opc_new, opc_new2; 1354 bool have_opc_new2; 1355 uint16_t dead_args; 1356 uint8_t sync_args; 1357 TCGArg arg; 1358 1359 TCGOp * const op = &s->gen_op_buf[oi]; 1360 TCGArg * const args = &s->gen_opparam_buf[op->args]; 1361 TCGOpcode opc = op->opc; 1362 const TCGOpDef *def = &tcg_op_defs[opc]; 1363 1364 oi_prev = op->prev; 1365 1366 switch (opc) { 1367 case INDEX_op_call: 1368 { 1369 int call_flags; 1370 1371 nb_oargs = op->callo; 1372 nb_iargs = op->calli; 1373 call_flags = args[nb_oargs + nb_iargs + 1]; 1374 1375 /* pure functions can be removed if their result is unused */ 1376 if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) { 1377 for (i = 0; i < nb_oargs; i++) { 1378 arg = args[i]; 1379 if (!dead_temps[arg] || mem_temps[arg]) { 1380 goto do_not_remove_call; 1381 } 1382 } 1383 goto do_remove; 1384 } else { 1385 do_not_remove_call: 1386 1387 /* output args are dead */ 1388 dead_args = 0; 1389 sync_args = 0; 1390 for (i = 0; i < nb_oargs; i++) { 1391 arg = args[i]; 1392 if (dead_temps[arg]) { 1393 dead_args |= (1 << i); 1394 } 1395 if (mem_temps[arg]) { 1396 sync_args |= (1 << i); 1397 } 1398 dead_temps[arg] = 1; 1399 mem_temps[arg] = 0; 1400 } 1401 1402 if (!(call_flags & TCG_CALL_NO_READ_GLOBALS)) { 1403 /* globals should be synced to memory */ 1404 memset(mem_temps, 1, s->nb_globals); 1405 } 1406 if (!(call_flags & (TCG_CALL_NO_WRITE_GLOBALS | 1407 TCG_CALL_NO_READ_GLOBALS))) { 1408 /* globals should go back to memory */ 1409 memset(dead_temps, 1, s->nb_globals); 1410 } 1411 1412 /* record arguments that die in this helper */ 1413 for (i = nb_oargs; i < nb_iargs + nb_oargs; i++) { 1414 arg = args[i]; 1415 if (arg != TCG_CALL_DUMMY_ARG) { 1416 if (dead_temps[arg]) { 1417 dead_args |= (1 << i); 1418 } 1419 } 1420 } 1421 /* input arguments are live for preceding opcodes */ 1422 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 1423 arg = args[i]; 1424 dead_temps[arg] = 0; 1425 } 1426 s->op_dead_args[oi] = dead_args; 1427 s->op_sync_args[oi] = sync_args; 1428 } 1429 } 1430 break; 1431 case INDEX_op_insn_start: 1432 break; 1433 case INDEX_op_discard: 1434 /* mark the temporary as dead */ 1435 dead_temps[args[0]] = 1; 1436 mem_temps[args[0]] = 0; 1437 break; 1438 1439 case INDEX_op_add2_i32: 1440 opc_new = INDEX_op_add_i32; 1441 goto do_addsub2; 1442 case INDEX_op_sub2_i32: 1443 opc_new = INDEX_op_sub_i32; 1444 goto do_addsub2; 1445 case INDEX_op_add2_i64: 1446 opc_new = INDEX_op_add_i64; 1447 goto do_addsub2; 1448 case INDEX_op_sub2_i64: 1449 opc_new = INDEX_op_sub_i64; 1450 do_addsub2: 1451 nb_iargs = 4; 1452 nb_oargs = 2; 1453 /* Test if the high part of the operation is dead, but not 1454 the low part. The result can be optimized to a simple 1455 add or sub. This happens often for x86_64 guest when the 1456 cpu mode is set to 32 bit. */ 1457 if (dead_temps[args[1]] && !mem_temps[args[1]]) { 1458 if (dead_temps[args[0]] && !mem_temps[args[0]]) { 1459 goto do_remove; 1460 } 1461 /* Replace the opcode and adjust the args in place, 1462 leaving 3 unused args at the end. */ 1463 op->opc = opc = opc_new; 1464 args[1] = args[2]; 1465 args[2] = args[4]; 1466 /* Fall through and mark the single-word operation live. */ 1467 nb_iargs = 2; 1468 nb_oargs = 1; 1469 } 1470 goto do_not_remove; 1471 1472 case INDEX_op_mulu2_i32: 1473 opc_new = INDEX_op_mul_i32; 1474 opc_new2 = INDEX_op_muluh_i32; 1475 have_opc_new2 = TCG_TARGET_HAS_muluh_i32; 1476 goto do_mul2; 1477 case INDEX_op_muls2_i32: 1478 opc_new = INDEX_op_mul_i32; 1479 opc_new2 = INDEX_op_mulsh_i32; 1480 have_opc_new2 = TCG_TARGET_HAS_mulsh_i32; 1481 goto do_mul2; 1482 case INDEX_op_mulu2_i64: 1483 opc_new = INDEX_op_mul_i64; 1484 opc_new2 = INDEX_op_muluh_i64; 1485 have_opc_new2 = TCG_TARGET_HAS_muluh_i64; 1486 goto do_mul2; 1487 case INDEX_op_muls2_i64: 1488 opc_new = INDEX_op_mul_i64; 1489 opc_new2 = INDEX_op_mulsh_i64; 1490 have_opc_new2 = TCG_TARGET_HAS_mulsh_i64; 1491 goto do_mul2; 1492 do_mul2: 1493 nb_iargs = 2; 1494 nb_oargs = 2; 1495 if (dead_temps[args[1]] && !mem_temps[args[1]]) { 1496 if (dead_temps[args[0]] && !mem_temps[args[0]]) { 1497 /* Both parts of the operation are dead. */ 1498 goto do_remove; 1499 } 1500 /* The high part of the operation is dead; generate the low. */ 1501 op->opc = opc = opc_new; 1502 args[1] = args[2]; 1503 args[2] = args[3]; 1504 } else if (have_opc_new2 && dead_temps[args[0]] 1505 && !mem_temps[args[0]]) { 1506 /* The low part of the operation is dead; generate the high. */ 1507 op->opc = opc = opc_new2; 1508 args[0] = args[1]; 1509 args[1] = args[2]; 1510 args[2] = args[3]; 1511 } else { 1512 goto do_not_remove; 1513 } 1514 /* Mark the single-word operation live. */ 1515 nb_oargs = 1; 1516 goto do_not_remove; 1517 1518 default: 1519 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */ 1520 nb_iargs = def->nb_iargs; 1521 nb_oargs = def->nb_oargs; 1522 1523 /* Test if the operation can be removed because all 1524 its outputs are dead. We assume that nb_oargs == 0 1525 implies side effects */ 1526 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) { 1527 for (i = 0; i < nb_oargs; i++) { 1528 arg = args[i]; 1529 if (!dead_temps[arg] || mem_temps[arg]) { 1530 goto do_not_remove; 1531 } 1532 } 1533 do_remove: 1534 tcg_op_remove(s, op); 1535 } else { 1536 do_not_remove: 1537 /* output args are dead */ 1538 dead_args = 0; 1539 sync_args = 0; 1540 for (i = 0; i < nb_oargs; i++) { 1541 arg = args[i]; 1542 if (dead_temps[arg]) { 1543 dead_args |= (1 << i); 1544 } 1545 if (mem_temps[arg]) { 1546 sync_args |= (1 << i); 1547 } 1548 dead_temps[arg] = 1; 1549 mem_temps[arg] = 0; 1550 } 1551 1552 /* if end of basic block, update */ 1553 if (def->flags & TCG_OPF_BB_END) { 1554 tcg_la_bb_end(s, dead_temps, mem_temps); 1555 } else if (def->flags & TCG_OPF_SIDE_EFFECTS) { 1556 /* globals should be synced to memory */ 1557 memset(mem_temps, 1, s->nb_globals); 1558 } 1559 1560 /* record arguments that die in this opcode */ 1561 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 1562 arg = args[i]; 1563 if (dead_temps[arg]) { 1564 dead_args |= (1 << i); 1565 } 1566 } 1567 /* input arguments are live for preceding opcodes */ 1568 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 1569 arg = args[i]; 1570 dead_temps[arg] = 0; 1571 } 1572 s->op_dead_args[oi] = dead_args; 1573 s->op_sync_args[oi] = sync_args; 1574 } 1575 break; 1576 } 1577 } 1578 } 1579 #else 1580 /* dummy liveness analysis */ 1581 static void tcg_liveness_analysis(TCGContext *s) 1582 { 1583 int nb_ops; 1584 nb_ops = s->gen_opc_ptr - s->gen_opc_buf; 1585 1586 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); 1587 memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t)); 1588 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); 1589 memset(s->op_sync_args, 0, nb_ops * sizeof(uint8_t)); 1590 } 1591 #endif 1592 1593 #ifndef NDEBUG 1594 static void dump_regs(TCGContext *s) 1595 { 1596 TCGTemp *ts; 1597 int i; 1598 char buf[64]; 1599 1600 for(i = 0; i < s->nb_temps; i++) { 1601 ts = &s->temps[i]; 1602 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i)); 1603 switch(ts->val_type) { 1604 case TEMP_VAL_REG: 1605 printf("%s", tcg_target_reg_names[ts->reg]); 1606 break; 1607 case TEMP_VAL_MEM: 1608 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]); 1609 break; 1610 case TEMP_VAL_CONST: 1611 printf("$0x%" TCG_PRIlx, ts->val); 1612 break; 1613 case TEMP_VAL_DEAD: 1614 printf("D"); 1615 break; 1616 default: 1617 printf("???"); 1618 break; 1619 } 1620 printf("\n"); 1621 } 1622 1623 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 1624 if (s->reg_to_temp[i] >= 0) { 1625 printf("%s: %s\n", 1626 tcg_target_reg_names[i], 1627 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i])); 1628 } 1629 } 1630 } 1631 1632 static void check_regs(TCGContext *s) 1633 { 1634 int reg, k; 1635 TCGTemp *ts; 1636 char buf[64]; 1637 1638 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 1639 k = s->reg_to_temp[reg]; 1640 if (k >= 0) { 1641 ts = &s->temps[k]; 1642 if (ts->val_type != TEMP_VAL_REG || 1643 ts->reg != reg) { 1644 printf("Inconsistency for register %s:\n", 1645 tcg_target_reg_names[reg]); 1646 goto fail; 1647 } 1648 } 1649 } 1650 for(k = 0; k < s->nb_temps; k++) { 1651 ts = &s->temps[k]; 1652 if (ts->val_type == TEMP_VAL_REG && 1653 !ts->fixed_reg && 1654 s->reg_to_temp[ts->reg] != k) { 1655 printf("Inconsistency for temp %s:\n", 1656 tcg_get_arg_str_idx(s, buf, sizeof(buf), k)); 1657 fail: 1658 printf("reg state:\n"); 1659 dump_regs(s); 1660 tcg_abort(); 1661 } 1662 } 1663 } 1664 #endif 1665 1666 static void temp_allocate_frame(TCGContext *s, int temp) 1667 { 1668 TCGTemp *ts; 1669 ts = &s->temps[temp]; 1670 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64) 1671 /* Sparc64 stack is accessed with offset of 2047 */ 1672 s->current_frame_offset = (s->current_frame_offset + 1673 (tcg_target_long)sizeof(tcg_target_long) - 1) & 1674 ~(sizeof(tcg_target_long) - 1); 1675 #endif 1676 if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) > 1677 s->frame_end) { 1678 tcg_abort(); 1679 } 1680 ts->mem_offset = s->current_frame_offset; 1681 ts->mem_reg = s->frame_reg; 1682 ts->mem_allocated = 1; 1683 s->current_frame_offset += sizeof(tcg_target_long); 1684 } 1685 1686 /* sync register 'reg' by saving it to the corresponding temporary */ 1687 static inline void tcg_reg_sync(TCGContext *s, int reg) 1688 { 1689 TCGTemp *ts; 1690 int temp; 1691 1692 temp = s->reg_to_temp[reg]; 1693 ts = &s->temps[temp]; 1694 assert(ts->val_type == TEMP_VAL_REG); 1695 if (!ts->mem_coherent && !ts->fixed_reg) { 1696 if (!ts->mem_allocated) { 1697 temp_allocate_frame(s, temp); 1698 } 1699 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 1700 } 1701 ts->mem_coherent = 1; 1702 } 1703 1704 /* free register 'reg' by spilling the corresponding temporary if necessary */ 1705 static void tcg_reg_free(TCGContext *s, int reg) 1706 { 1707 int temp; 1708 1709 temp = s->reg_to_temp[reg]; 1710 if (temp != -1) { 1711 tcg_reg_sync(s, reg); 1712 s->temps[temp].val_type = TEMP_VAL_MEM; 1713 s->reg_to_temp[reg] = -1; 1714 } 1715 } 1716 1717 /* Allocate a register belonging to reg1 & ~reg2 */ 1718 static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2) 1719 { 1720 int i, reg; 1721 TCGRegSet reg_ct; 1722 1723 tcg_regset_andnot(reg_ct, reg1, reg2); 1724 1725 /* first try free registers */ 1726 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { 1727 reg = tcg_target_reg_alloc_order[i]; 1728 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1) 1729 return reg; 1730 } 1731 1732 /* XXX: do better spill choice */ 1733 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { 1734 reg = tcg_target_reg_alloc_order[i]; 1735 if (tcg_regset_test_reg(reg_ct, reg)) { 1736 tcg_reg_free(s, reg); 1737 return reg; 1738 } 1739 } 1740 1741 tcg_abort(); 1742 } 1743 1744 /* mark a temporary as dead. */ 1745 static inline void temp_dead(TCGContext *s, int temp) 1746 { 1747 TCGTemp *ts; 1748 1749 ts = &s->temps[temp]; 1750 if (!ts->fixed_reg) { 1751 if (ts->val_type == TEMP_VAL_REG) { 1752 s->reg_to_temp[ts->reg] = -1; 1753 } 1754 if (temp < s->nb_globals || ts->temp_local) { 1755 ts->val_type = TEMP_VAL_MEM; 1756 } else { 1757 ts->val_type = TEMP_VAL_DEAD; 1758 } 1759 } 1760 } 1761 1762 /* sync a temporary to memory. 'allocated_regs' is used in case a 1763 temporary registers needs to be allocated to store a constant. */ 1764 static inline void temp_sync(TCGContext *s, int temp, TCGRegSet allocated_regs) 1765 { 1766 TCGTemp *ts; 1767 1768 ts = &s->temps[temp]; 1769 if (!ts->fixed_reg) { 1770 switch(ts->val_type) { 1771 case TEMP_VAL_CONST: 1772 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 1773 allocated_regs); 1774 ts->val_type = TEMP_VAL_REG; 1775 s->reg_to_temp[ts->reg] = temp; 1776 ts->mem_coherent = 0; 1777 tcg_out_movi(s, ts->type, ts->reg, ts->val); 1778 /* fallthrough*/ 1779 case TEMP_VAL_REG: 1780 tcg_reg_sync(s, ts->reg); 1781 break; 1782 case TEMP_VAL_DEAD: 1783 case TEMP_VAL_MEM: 1784 break; 1785 default: 1786 tcg_abort(); 1787 } 1788 } 1789 } 1790 1791 /* save a temporary to memory. 'allocated_regs' is used in case a 1792 temporary registers needs to be allocated to store a constant. */ 1793 static inline void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs) 1794 { 1795 #ifdef USE_LIVENESS_ANALYSIS 1796 /* The liveness analysis already ensures that globals are back 1797 in memory. Keep an assert for safety. */ 1798 assert(s->temps[temp].val_type == TEMP_VAL_MEM || s->temps[temp].fixed_reg); 1799 #else 1800 temp_sync(s, temp, allocated_regs); 1801 temp_dead(s, temp); 1802 #endif 1803 } 1804 1805 /* save globals to their canonical location and assume they can be 1806 modified be the following code. 'allocated_regs' is used in case a 1807 temporary registers needs to be allocated to store a constant. */ 1808 static void save_globals(TCGContext *s, TCGRegSet allocated_regs) 1809 { 1810 int i; 1811 1812 for(i = 0; i < s->nb_globals; i++) { 1813 temp_save(s, i, allocated_regs); 1814 } 1815 } 1816 1817 /* sync globals to their canonical location and assume they can be 1818 read by the following code. 'allocated_regs' is used in case a 1819 temporary registers needs to be allocated to store a constant. */ 1820 static void sync_globals(TCGContext *s, TCGRegSet allocated_regs) 1821 { 1822 int i; 1823 1824 for (i = 0; i < s->nb_globals; i++) { 1825 #ifdef USE_LIVENESS_ANALYSIS 1826 assert(s->temps[i].val_type != TEMP_VAL_REG || s->temps[i].fixed_reg || 1827 s->temps[i].mem_coherent); 1828 #else 1829 temp_sync(s, i, allocated_regs); 1830 #endif 1831 } 1832 } 1833 1834 /* at the end of a basic block, we assume all temporaries are dead and 1835 all globals are stored at their canonical location. */ 1836 static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs) 1837 { 1838 TCGTemp *ts; 1839 int i; 1840 1841 for(i = s->nb_globals; i < s->nb_temps; i++) { 1842 ts = &s->temps[i]; 1843 if (ts->temp_local) { 1844 temp_save(s, i, allocated_regs); 1845 } else { 1846 #ifdef USE_LIVENESS_ANALYSIS 1847 /* The liveness analysis already ensures that temps are dead. 1848 Keep an assert for safety. */ 1849 assert(ts->val_type == TEMP_VAL_DEAD); 1850 #else 1851 temp_dead(s, i); 1852 #endif 1853 } 1854 } 1855 1856 save_globals(s, allocated_regs); 1857 } 1858 1859 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1) 1860 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1) 1861 1862 static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args, 1863 uint16_t dead_args, uint8_t sync_args) 1864 { 1865 TCGTemp *ots; 1866 tcg_target_ulong val; 1867 1868 ots = &s->temps[args[0]]; 1869 val = args[1]; 1870 1871 if (ots->fixed_reg) { 1872 /* for fixed registers, we do not do any constant 1873 propagation */ 1874 tcg_out_movi(s, ots->type, ots->reg, val); 1875 } else { 1876 /* The movi is not explicitly generated here */ 1877 if (ots->val_type == TEMP_VAL_REG) 1878 s->reg_to_temp[ots->reg] = -1; 1879 ots->val_type = TEMP_VAL_CONST; 1880 ots->val = val; 1881 } 1882 if (NEED_SYNC_ARG(0)) { 1883 temp_sync(s, args[0], s->reserved_regs); 1884 } 1885 if (IS_DEAD_ARG(0)) { 1886 temp_dead(s, args[0]); 1887 } 1888 } 1889 1890 static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def, 1891 const TCGArg *args, uint16_t dead_args, 1892 uint8_t sync_args) 1893 { 1894 TCGRegSet allocated_regs; 1895 TCGTemp *ts, *ots; 1896 TCGType otype, itype; 1897 1898 tcg_regset_set(allocated_regs, s->reserved_regs); 1899 ots = &s->temps[args[0]]; 1900 ts = &s->temps[args[1]]; 1901 1902 /* Note that otype != itype for no-op truncation. */ 1903 otype = ots->type; 1904 itype = ts->type; 1905 1906 /* If the source value is not in a register, and we're going to be 1907 forced to have it in a register in order to perform the copy, 1908 then copy the SOURCE value into its own register first. That way 1909 we don't have to reload SOURCE the next time it is used. */ 1910 if (((NEED_SYNC_ARG(0) || ots->fixed_reg) && ts->val_type != TEMP_VAL_REG) 1911 || ts->val_type == TEMP_VAL_MEM) { 1912 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[itype], 1913 allocated_regs); 1914 if (ts->val_type == TEMP_VAL_MEM) { 1915 tcg_out_ld(s, itype, ts->reg, ts->mem_reg, ts->mem_offset); 1916 ts->mem_coherent = 1; 1917 } else if (ts->val_type == TEMP_VAL_CONST) { 1918 tcg_out_movi(s, itype, ts->reg, ts->val); 1919 ts->mem_coherent = 0; 1920 } 1921 s->reg_to_temp[ts->reg] = args[1]; 1922 ts->val_type = TEMP_VAL_REG; 1923 } 1924 1925 if (IS_DEAD_ARG(0) && !ots->fixed_reg) { 1926 /* mov to a non-saved dead register makes no sense (even with 1927 liveness analysis disabled). */ 1928 assert(NEED_SYNC_ARG(0)); 1929 /* The code above should have moved the temp to a register. */ 1930 assert(ts->val_type == TEMP_VAL_REG); 1931 if (!ots->mem_allocated) { 1932 temp_allocate_frame(s, args[0]); 1933 } 1934 tcg_out_st(s, otype, ts->reg, ots->mem_reg, ots->mem_offset); 1935 if (IS_DEAD_ARG(1)) { 1936 temp_dead(s, args[1]); 1937 } 1938 temp_dead(s, args[0]); 1939 } else if (ts->val_type == TEMP_VAL_CONST) { 1940 /* propagate constant */ 1941 if (ots->val_type == TEMP_VAL_REG) { 1942 s->reg_to_temp[ots->reg] = -1; 1943 } 1944 ots->val_type = TEMP_VAL_CONST; 1945 ots->val = ts->val; 1946 if (IS_DEAD_ARG(1)) { 1947 temp_dead(s, args[1]); 1948 } 1949 } else { 1950 /* The code in the first if block should have moved the 1951 temp to a register. */ 1952 assert(ts->val_type == TEMP_VAL_REG); 1953 if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) { 1954 /* the mov can be suppressed */ 1955 if (ots->val_type == TEMP_VAL_REG) { 1956 s->reg_to_temp[ots->reg] = -1; 1957 } 1958 ots->reg = ts->reg; 1959 temp_dead(s, args[1]); 1960 } else { 1961 if (ots->val_type != TEMP_VAL_REG) { 1962 /* When allocating a new register, make sure to not spill the 1963 input one. */ 1964 tcg_regset_set_reg(allocated_regs, ts->reg); 1965 ots->reg = tcg_reg_alloc(s, tcg_target_available_regs[otype], 1966 allocated_regs); 1967 } 1968 tcg_out_mov(s, otype, ots->reg, ts->reg); 1969 } 1970 ots->val_type = TEMP_VAL_REG; 1971 ots->mem_coherent = 0; 1972 s->reg_to_temp[ots->reg] = args[0]; 1973 if (NEED_SYNC_ARG(0)) { 1974 tcg_reg_sync(s, ots->reg); 1975 } 1976 } 1977 } 1978 1979 static void tcg_reg_alloc_op(TCGContext *s, 1980 const TCGOpDef *def, TCGOpcode opc, 1981 const TCGArg *args, uint16_t dead_args, 1982 uint8_t sync_args) 1983 { 1984 TCGRegSet allocated_regs; 1985 int i, k, nb_iargs, nb_oargs, reg; 1986 TCGArg arg; 1987 const TCGArgConstraint *arg_ct; 1988 TCGTemp *ts; 1989 TCGArg new_args[TCG_MAX_OP_ARGS]; 1990 int const_args[TCG_MAX_OP_ARGS]; 1991 1992 nb_oargs = def->nb_oargs; 1993 nb_iargs = def->nb_iargs; 1994 1995 /* copy constants */ 1996 memcpy(new_args + nb_oargs + nb_iargs, 1997 args + nb_oargs + nb_iargs, 1998 sizeof(TCGArg) * def->nb_cargs); 1999 2000 /* satisfy input constraints */ 2001 tcg_regset_set(allocated_regs, s->reserved_regs); 2002 for(k = 0; k < nb_iargs; k++) { 2003 i = def->sorted_args[nb_oargs + k]; 2004 arg = args[i]; 2005 arg_ct = &def->args_ct[i]; 2006 ts = &s->temps[arg]; 2007 if (ts->val_type == TEMP_VAL_MEM) { 2008 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2009 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2010 ts->val_type = TEMP_VAL_REG; 2011 ts->reg = reg; 2012 ts->mem_coherent = 1; 2013 s->reg_to_temp[reg] = arg; 2014 } else if (ts->val_type == TEMP_VAL_CONST) { 2015 if (tcg_target_const_match(ts->val, ts->type, arg_ct)) { 2016 /* constant is OK for instruction */ 2017 const_args[i] = 1; 2018 new_args[i] = ts->val; 2019 goto iarg_end; 2020 } else { 2021 /* need to move to a register */ 2022 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2023 tcg_out_movi(s, ts->type, reg, ts->val); 2024 ts->val_type = TEMP_VAL_REG; 2025 ts->reg = reg; 2026 ts->mem_coherent = 0; 2027 s->reg_to_temp[reg] = arg; 2028 } 2029 } 2030 assert(ts->val_type == TEMP_VAL_REG); 2031 if (arg_ct->ct & TCG_CT_IALIAS) { 2032 if (ts->fixed_reg) { 2033 /* if fixed register, we must allocate a new register 2034 if the alias is not the same register */ 2035 if (arg != args[arg_ct->alias_index]) 2036 goto allocate_in_reg; 2037 } else { 2038 /* if the input is aliased to an output and if it is 2039 not dead after the instruction, we must allocate 2040 a new register and move it */ 2041 if (!IS_DEAD_ARG(i)) { 2042 goto allocate_in_reg; 2043 } 2044 /* check if the current register has already been allocated 2045 for another input aliased to an output */ 2046 int k2, i2; 2047 for (k2 = 0 ; k2 < k ; k2++) { 2048 i2 = def->sorted_args[nb_oargs + k2]; 2049 if ((def->args_ct[i2].ct & TCG_CT_IALIAS) && 2050 (new_args[i2] == ts->reg)) { 2051 goto allocate_in_reg; 2052 } 2053 } 2054 } 2055 } 2056 reg = ts->reg; 2057 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) { 2058 /* nothing to do : the constraint is satisfied */ 2059 } else { 2060 allocate_in_reg: 2061 /* allocate a new register matching the constraint 2062 and move the temporary register into it */ 2063 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2064 tcg_out_mov(s, ts->type, reg, ts->reg); 2065 } 2066 new_args[i] = reg; 2067 const_args[i] = 0; 2068 tcg_regset_set_reg(allocated_regs, reg); 2069 iarg_end: ; 2070 } 2071 2072 /* mark dead temporaries and free the associated registers */ 2073 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 2074 if (IS_DEAD_ARG(i)) { 2075 temp_dead(s, args[i]); 2076 } 2077 } 2078 2079 if (def->flags & TCG_OPF_BB_END) { 2080 tcg_reg_alloc_bb_end(s, allocated_regs); 2081 } else { 2082 if (def->flags & TCG_OPF_CALL_CLOBBER) { 2083 /* XXX: permit generic clobber register list ? */ 2084 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 2085 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { 2086 tcg_reg_free(s, reg); 2087 } 2088 } 2089 } 2090 if (def->flags & TCG_OPF_SIDE_EFFECTS) { 2091 /* sync globals if the op has side effects and might trigger 2092 an exception. */ 2093 sync_globals(s, allocated_regs); 2094 } 2095 2096 /* satisfy the output constraints */ 2097 tcg_regset_set(allocated_regs, s->reserved_regs); 2098 for(k = 0; k < nb_oargs; k++) { 2099 i = def->sorted_args[k]; 2100 arg = args[i]; 2101 arg_ct = &def->args_ct[i]; 2102 ts = &s->temps[arg]; 2103 if (arg_ct->ct & TCG_CT_ALIAS) { 2104 reg = new_args[arg_ct->alias_index]; 2105 } else { 2106 /* if fixed register, we try to use it */ 2107 reg = ts->reg; 2108 if (ts->fixed_reg && 2109 tcg_regset_test_reg(arg_ct->u.regs, reg)) { 2110 goto oarg_end; 2111 } 2112 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2113 } 2114 tcg_regset_set_reg(allocated_regs, reg); 2115 /* if a fixed register is used, then a move will be done afterwards */ 2116 if (!ts->fixed_reg) { 2117 if (ts->val_type == TEMP_VAL_REG) { 2118 s->reg_to_temp[ts->reg] = -1; 2119 } 2120 ts->val_type = TEMP_VAL_REG; 2121 ts->reg = reg; 2122 /* temp value is modified, so the value kept in memory is 2123 potentially not the same */ 2124 ts->mem_coherent = 0; 2125 s->reg_to_temp[reg] = arg; 2126 } 2127 oarg_end: 2128 new_args[i] = reg; 2129 } 2130 } 2131 2132 /* emit instruction */ 2133 tcg_out_op(s, opc, new_args, const_args); 2134 2135 /* move the outputs in the correct register if needed */ 2136 for(i = 0; i < nb_oargs; i++) { 2137 ts = &s->temps[args[i]]; 2138 reg = new_args[i]; 2139 if (ts->fixed_reg && ts->reg != reg) { 2140 tcg_out_mov(s, ts->type, ts->reg, reg); 2141 } 2142 if (NEED_SYNC_ARG(i)) { 2143 tcg_reg_sync(s, reg); 2144 } 2145 if (IS_DEAD_ARG(i)) { 2146 temp_dead(s, args[i]); 2147 } 2148 } 2149 } 2150 2151 #ifdef TCG_TARGET_STACK_GROWSUP 2152 #define STACK_DIR(x) (-(x)) 2153 #else 2154 #define STACK_DIR(x) (x) 2155 #endif 2156 2157 static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs, 2158 const TCGArg * const args, uint16_t dead_args, 2159 uint8_t sync_args) 2160 { 2161 int flags, nb_regs, i, reg; 2162 TCGArg arg; 2163 TCGTemp *ts; 2164 intptr_t stack_offset; 2165 size_t call_stack_size; 2166 tcg_insn_unit *func_addr; 2167 int allocate_args; 2168 TCGRegSet allocated_regs; 2169 2170 func_addr = (tcg_insn_unit *)(intptr_t)args[nb_oargs + nb_iargs]; 2171 flags = args[nb_oargs + nb_iargs + 1]; 2172 2173 nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs); 2174 if (nb_regs > nb_iargs) { 2175 nb_regs = nb_iargs; 2176 } 2177 2178 /* assign stack slots first */ 2179 call_stack_size = (nb_iargs - nb_regs) * sizeof(tcg_target_long); 2180 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) & 2181 ~(TCG_TARGET_STACK_ALIGN - 1); 2182 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE); 2183 if (allocate_args) { 2184 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed, 2185 preallocate call stack */ 2186 tcg_abort(); 2187 } 2188 2189 stack_offset = TCG_TARGET_CALL_STACK_OFFSET; 2190 for(i = nb_regs; i < nb_iargs; i++) { 2191 arg = args[nb_oargs + i]; 2192 #ifdef TCG_TARGET_STACK_GROWSUP 2193 stack_offset -= sizeof(tcg_target_long); 2194 #endif 2195 if (arg != TCG_CALL_DUMMY_ARG) { 2196 ts = &s->temps[arg]; 2197 if (ts->val_type == TEMP_VAL_REG) { 2198 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset); 2199 } else if (ts->val_type == TEMP_VAL_MEM) { 2200 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 2201 s->reserved_regs); 2202 /* XXX: not correct if reading values from the stack */ 2203 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2204 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); 2205 } else if (ts->val_type == TEMP_VAL_CONST) { 2206 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 2207 s->reserved_regs); 2208 /* XXX: sign extend may be needed on some targets */ 2209 tcg_out_movi(s, ts->type, reg, ts->val); 2210 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); 2211 } else { 2212 tcg_abort(); 2213 } 2214 } 2215 #ifndef TCG_TARGET_STACK_GROWSUP 2216 stack_offset += sizeof(tcg_target_long); 2217 #endif 2218 } 2219 2220 /* assign input registers */ 2221 tcg_regset_set(allocated_regs, s->reserved_regs); 2222 for(i = 0; i < nb_regs; i++) { 2223 arg = args[nb_oargs + i]; 2224 if (arg != TCG_CALL_DUMMY_ARG) { 2225 ts = &s->temps[arg]; 2226 reg = tcg_target_call_iarg_regs[i]; 2227 tcg_reg_free(s, reg); 2228 if (ts->val_type == TEMP_VAL_REG) { 2229 if (ts->reg != reg) { 2230 tcg_out_mov(s, ts->type, reg, ts->reg); 2231 } 2232 } else if (ts->val_type == TEMP_VAL_MEM) { 2233 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2234 } else if (ts->val_type == TEMP_VAL_CONST) { 2235 /* XXX: sign extend ? */ 2236 tcg_out_movi(s, ts->type, reg, ts->val); 2237 } else { 2238 tcg_abort(); 2239 } 2240 tcg_regset_set_reg(allocated_regs, reg); 2241 } 2242 } 2243 2244 /* mark dead temporaries and free the associated registers */ 2245 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) { 2246 if (IS_DEAD_ARG(i)) { 2247 temp_dead(s, args[i]); 2248 } 2249 } 2250 2251 /* clobber call registers */ 2252 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 2253 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { 2254 tcg_reg_free(s, reg); 2255 } 2256 } 2257 2258 /* Save globals if they might be written by the helper, sync them if 2259 they might be read. */ 2260 if (flags & TCG_CALL_NO_READ_GLOBALS) { 2261 /* Nothing to do */ 2262 } else if (flags & TCG_CALL_NO_WRITE_GLOBALS) { 2263 sync_globals(s, allocated_regs); 2264 } else { 2265 save_globals(s, allocated_regs); 2266 } 2267 2268 tcg_out_call(s, func_addr); 2269 2270 /* assign output registers and emit moves if needed */ 2271 for(i = 0; i < nb_oargs; i++) { 2272 arg = args[i]; 2273 ts = &s->temps[arg]; 2274 reg = tcg_target_call_oarg_regs[i]; 2275 assert(s->reg_to_temp[reg] == -1); 2276 2277 if (ts->fixed_reg) { 2278 if (ts->reg != reg) { 2279 tcg_out_mov(s, ts->type, ts->reg, reg); 2280 } 2281 } else { 2282 if (ts->val_type == TEMP_VAL_REG) { 2283 s->reg_to_temp[ts->reg] = -1; 2284 } 2285 ts->val_type = TEMP_VAL_REG; 2286 ts->reg = reg; 2287 ts->mem_coherent = 0; 2288 s->reg_to_temp[reg] = arg; 2289 if (NEED_SYNC_ARG(i)) { 2290 tcg_reg_sync(s, reg); 2291 } 2292 if (IS_DEAD_ARG(i)) { 2293 temp_dead(s, args[i]); 2294 } 2295 } 2296 } 2297 } 2298 2299 #ifdef CONFIG_PROFILER 2300 2301 static int64_t tcg_table_op_count[NB_OPS]; 2302 2303 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf) 2304 { 2305 int i; 2306 2307 for (i = 0; i < NB_OPS; i++) { 2308 cpu_fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, 2309 tcg_table_op_count[i]); 2310 } 2311 } 2312 #else 2313 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf) 2314 { 2315 cpu_fprintf(f, "[TCG profiler not compiled]\n"); 2316 } 2317 #endif 2318 2319 2320 int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf) 2321 { 2322 int i, oi, oi_next, num_insns; 2323 2324 #ifdef CONFIG_PROFILER 2325 { 2326 int n; 2327 2328 n = s->gen_last_op_idx + 1; 2329 s->op_count += n; 2330 if (n > s->op_count_max) { 2331 s->op_count_max = n; 2332 } 2333 2334 n = s->nb_temps; 2335 s->temp_count += n; 2336 if (n > s->temp_count_max) { 2337 s->temp_count_max = n; 2338 } 2339 } 2340 #endif 2341 2342 #ifdef DEBUG_DISAS 2343 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { 2344 qemu_log("OP:\n"); 2345 tcg_dump_ops(s); 2346 qemu_log("\n"); 2347 } 2348 #endif 2349 2350 #ifdef CONFIG_PROFILER 2351 s->opt_time -= profile_getclock(); 2352 #endif 2353 2354 #ifdef USE_TCG_OPTIMIZATIONS 2355 tcg_optimize(s); 2356 #endif 2357 2358 #ifdef CONFIG_PROFILER 2359 s->opt_time += profile_getclock(); 2360 s->la_time -= profile_getclock(); 2361 #endif 2362 2363 tcg_liveness_analysis(s); 2364 2365 #ifdef CONFIG_PROFILER 2366 s->la_time += profile_getclock(); 2367 #endif 2368 2369 #ifdef DEBUG_DISAS 2370 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) { 2371 qemu_log("OP after optimization and liveness analysis:\n"); 2372 tcg_dump_ops(s); 2373 qemu_log("\n"); 2374 } 2375 #endif 2376 2377 tcg_reg_alloc_start(s); 2378 2379 s->code_buf = gen_code_buf; 2380 s->code_ptr = gen_code_buf; 2381 2382 tcg_out_tb_init(s); 2383 2384 num_insns = -1; 2385 for (oi = s->gen_first_op_idx; oi >= 0; oi = oi_next) { 2386 TCGOp * const op = &s->gen_op_buf[oi]; 2387 TCGArg * const args = &s->gen_opparam_buf[op->args]; 2388 TCGOpcode opc = op->opc; 2389 const TCGOpDef *def = &tcg_op_defs[opc]; 2390 uint16_t dead_args = s->op_dead_args[oi]; 2391 uint8_t sync_args = s->op_sync_args[oi]; 2392 2393 oi_next = op->next; 2394 #ifdef CONFIG_PROFILER 2395 tcg_table_op_count[opc]++; 2396 #endif 2397 2398 switch (opc) { 2399 case INDEX_op_mov_i32: 2400 case INDEX_op_mov_i64: 2401 tcg_reg_alloc_mov(s, def, args, dead_args, sync_args); 2402 break; 2403 case INDEX_op_movi_i32: 2404 case INDEX_op_movi_i64: 2405 tcg_reg_alloc_movi(s, args, dead_args, sync_args); 2406 break; 2407 case INDEX_op_insn_start: 2408 if (num_insns >= 0) { 2409 s->gen_insn_end_off[num_insns] = tcg_current_code_size(s); 2410 } 2411 num_insns++; 2412 for (i = 0; i < TARGET_INSN_START_WORDS; ++i) { 2413 target_ulong a; 2414 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS 2415 a = ((target_ulong)args[i * 2 + 1] << 32) | args[i * 2]; 2416 #else 2417 a = args[i]; 2418 #endif 2419 s->gen_insn_data[num_insns][i] = a; 2420 } 2421 break; 2422 case INDEX_op_discard: 2423 temp_dead(s, args[0]); 2424 break; 2425 case INDEX_op_set_label: 2426 tcg_reg_alloc_bb_end(s, s->reserved_regs); 2427 tcg_out_label(s, arg_label(args[0]), s->code_ptr); 2428 break; 2429 case INDEX_op_call: 2430 tcg_reg_alloc_call(s, op->callo, op->calli, args, 2431 dead_args, sync_args); 2432 break; 2433 default: 2434 /* Sanity check that we've not introduced any unhandled opcodes. */ 2435 if (def->flags & TCG_OPF_NOT_PRESENT) { 2436 tcg_abort(); 2437 } 2438 /* Note: in order to speed up the code, it would be much 2439 faster to have specialized register allocator functions for 2440 some common argument patterns */ 2441 tcg_reg_alloc_op(s, def, opc, args, dead_args, sync_args); 2442 break; 2443 } 2444 #ifndef NDEBUG 2445 check_regs(s); 2446 #endif 2447 /* Test for (pending) buffer overflow. The assumption is that any 2448 one operation beginning below the high water mark cannot overrun 2449 the buffer completely. Thus we can test for overflow after 2450 generating code without having to check during generation. */ 2451 if (unlikely((void *)s->code_ptr > s->code_gen_highwater)) { 2452 return -1; 2453 } 2454 } 2455 tcg_debug_assert(num_insns >= 0); 2456 s->gen_insn_end_off[num_insns] = tcg_current_code_size(s); 2457 2458 /* Generate TB finalization at the end of block */ 2459 tcg_out_tb_finalize(s); 2460 2461 /* flush instruction cache */ 2462 flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr); 2463 2464 return tcg_current_code_size(s); 2465 } 2466 2467 #ifdef CONFIG_PROFILER 2468 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) 2469 { 2470 TCGContext *s = &tcg_ctx; 2471 int64_t tb_count = s->tb_count; 2472 int64_t tb_div_count = tb_count ? tb_count : 1; 2473 int64_t tot = s->interm_time + s->code_time; 2474 2475 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n", 2476 tot, tot / 2.4e9); 2477 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n", 2478 tb_count, s->tb_count1 - tb_count, 2479 (double)(s->tb_count1 - s->tb_count) 2480 / (s->tb_count1 ? s->tb_count1 : 1) * 100.0); 2481 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n", 2482 (double)s->op_count / tb_div_count, s->op_count_max); 2483 cpu_fprintf(f, "deleted ops/TB %0.2f\n", 2484 (double)s->del_op_count / tb_div_count); 2485 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n", 2486 (double)s->temp_count / tb_div_count, s->temp_count_max); 2487 cpu_fprintf(f, "avg host code/TB %0.1f\n", 2488 (double)s->code_out_len / tb_div_count); 2489 cpu_fprintf(f, "avg search data/TB %0.1f\n", 2490 (double)s->search_out_len / tb_div_count); 2491 2492 cpu_fprintf(f, "cycles/op %0.1f\n", 2493 s->op_count ? (double)tot / s->op_count : 0); 2494 cpu_fprintf(f, "cycles/in byte %0.1f\n", 2495 s->code_in_len ? (double)tot / s->code_in_len : 0); 2496 cpu_fprintf(f, "cycles/out byte %0.1f\n", 2497 s->code_out_len ? (double)tot / s->code_out_len : 0); 2498 cpu_fprintf(f, "cycles/search byte %0.1f\n", 2499 s->search_out_len ? (double)tot / s->search_out_len : 0); 2500 if (tot == 0) { 2501 tot = 1; 2502 } 2503 cpu_fprintf(f, " gen_interm time %0.1f%%\n", 2504 (double)s->interm_time / tot * 100.0); 2505 cpu_fprintf(f, " gen_code time %0.1f%%\n", 2506 (double)s->code_time / tot * 100.0); 2507 cpu_fprintf(f, "optim./code time %0.1f%%\n", 2508 (double)s->opt_time / (s->code_time ? s->code_time : 1) 2509 * 100.0); 2510 cpu_fprintf(f, "liveness/code time %0.1f%%\n", 2511 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0); 2512 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n", 2513 s->restore_count); 2514 cpu_fprintf(f, " avg cycles %0.1f\n", 2515 s->restore_count ? (double)s->restore_time / s->restore_count : 0); 2516 } 2517 #else 2518 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) 2519 { 2520 cpu_fprintf(f, "[TCG profiler not compiled]\n"); 2521 } 2522 #endif 2523 2524 #ifdef ELF_HOST_MACHINE 2525 /* In order to use this feature, the backend needs to do three things: 2526 2527 (1) Define ELF_HOST_MACHINE to indicate both what value to 2528 put into the ELF image and to indicate support for the feature. 2529 2530 (2) Define tcg_register_jit. This should create a buffer containing 2531 the contents of a .debug_frame section that describes the post- 2532 prologue unwind info for the tcg machine. 2533 2534 (3) Call tcg_register_jit_int, with the constructed .debug_frame. 2535 */ 2536 2537 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */ 2538 typedef enum { 2539 JIT_NOACTION = 0, 2540 JIT_REGISTER_FN, 2541 JIT_UNREGISTER_FN 2542 } jit_actions_t; 2543 2544 struct jit_code_entry { 2545 struct jit_code_entry *next_entry; 2546 struct jit_code_entry *prev_entry; 2547 const void *symfile_addr; 2548 uint64_t symfile_size; 2549 }; 2550 2551 struct jit_descriptor { 2552 uint32_t version; 2553 uint32_t action_flag; 2554 struct jit_code_entry *relevant_entry; 2555 struct jit_code_entry *first_entry; 2556 }; 2557 2558 void __jit_debug_register_code(void) __attribute__((noinline)); 2559 void __jit_debug_register_code(void) 2560 { 2561 asm(""); 2562 } 2563 2564 /* Must statically initialize the version, because GDB may check 2565 the version before we can set it. */ 2566 struct jit_descriptor __jit_debug_descriptor = { 1, 0, 0, 0 }; 2567 2568 /* End GDB interface. */ 2569 2570 static int find_string(const char *strtab, const char *str) 2571 { 2572 const char *p = strtab + 1; 2573 2574 while (1) { 2575 if (strcmp(p, str) == 0) { 2576 return p - strtab; 2577 } 2578 p += strlen(p) + 1; 2579 } 2580 } 2581 2582 static void tcg_register_jit_int(void *buf_ptr, size_t buf_size, 2583 const void *debug_frame, 2584 size_t debug_frame_size) 2585 { 2586 struct __attribute__((packed)) DebugInfo { 2587 uint32_t len; 2588 uint16_t version; 2589 uint32_t abbrev; 2590 uint8_t ptr_size; 2591 uint8_t cu_die; 2592 uint16_t cu_lang; 2593 uintptr_t cu_low_pc; 2594 uintptr_t cu_high_pc; 2595 uint8_t fn_die; 2596 char fn_name[16]; 2597 uintptr_t fn_low_pc; 2598 uintptr_t fn_high_pc; 2599 uint8_t cu_eoc; 2600 }; 2601 2602 struct ElfImage { 2603 ElfW(Ehdr) ehdr; 2604 ElfW(Phdr) phdr; 2605 ElfW(Shdr) shdr[7]; 2606 ElfW(Sym) sym[2]; 2607 struct DebugInfo di; 2608 uint8_t da[24]; 2609 char str[80]; 2610 }; 2611 2612 struct ElfImage *img; 2613 2614 static const struct ElfImage img_template = { 2615 .ehdr = { 2616 .e_ident[EI_MAG0] = ELFMAG0, 2617 .e_ident[EI_MAG1] = ELFMAG1, 2618 .e_ident[EI_MAG2] = ELFMAG2, 2619 .e_ident[EI_MAG3] = ELFMAG3, 2620 .e_ident[EI_CLASS] = ELF_CLASS, 2621 .e_ident[EI_DATA] = ELF_DATA, 2622 .e_ident[EI_VERSION] = EV_CURRENT, 2623 .e_type = ET_EXEC, 2624 .e_machine = ELF_HOST_MACHINE, 2625 .e_version = EV_CURRENT, 2626 .e_phoff = offsetof(struct ElfImage, phdr), 2627 .e_shoff = offsetof(struct ElfImage, shdr), 2628 .e_ehsize = sizeof(ElfW(Shdr)), 2629 .e_phentsize = sizeof(ElfW(Phdr)), 2630 .e_phnum = 1, 2631 .e_shentsize = sizeof(ElfW(Shdr)), 2632 .e_shnum = ARRAY_SIZE(img->shdr), 2633 .e_shstrndx = ARRAY_SIZE(img->shdr) - 1, 2634 #ifdef ELF_HOST_FLAGS 2635 .e_flags = ELF_HOST_FLAGS, 2636 #endif 2637 #ifdef ELF_OSABI 2638 .e_ident[EI_OSABI] = ELF_OSABI, 2639 #endif 2640 }, 2641 .phdr = { 2642 .p_type = PT_LOAD, 2643 .p_flags = PF_X, 2644 }, 2645 .shdr = { 2646 [0] = { .sh_type = SHT_NULL }, 2647 /* Trick: The contents of code_gen_buffer are not present in 2648 this fake ELF file; that got allocated elsewhere. Therefore 2649 we mark .text as SHT_NOBITS (similar to .bss) so that readers 2650 will not look for contents. We can record any address. */ 2651 [1] = { /* .text */ 2652 .sh_type = SHT_NOBITS, 2653 .sh_flags = SHF_EXECINSTR | SHF_ALLOC, 2654 }, 2655 [2] = { /* .debug_info */ 2656 .sh_type = SHT_PROGBITS, 2657 .sh_offset = offsetof(struct ElfImage, di), 2658 .sh_size = sizeof(struct DebugInfo), 2659 }, 2660 [3] = { /* .debug_abbrev */ 2661 .sh_type = SHT_PROGBITS, 2662 .sh_offset = offsetof(struct ElfImage, da), 2663 .sh_size = sizeof(img->da), 2664 }, 2665 [4] = { /* .debug_frame */ 2666 .sh_type = SHT_PROGBITS, 2667 .sh_offset = sizeof(struct ElfImage), 2668 }, 2669 [5] = { /* .symtab */ 2670 .sh_type = SHT_SYMTAB, 2671 .sh_offset = offsetof(struct ElfImage, sym), 2672 .sh_size = sizeof(img->sym), 2673 .sh_info = 1, 2674 .sh_link = ARRAY_SIZE(img->shdr) - 1, 2675 .sh_entsize = sizeof(ElfW(Sym)), 2676 }, 2677 [6] = { /* .strtab */ 2678 .sh_type = SHT_STRTAB, 2679 .sh_offset = offsetof(struct ElfImage, str), 2680 .sh_size = sizeof(img->str), 2681 } 2682 }, 2683 .sym = { 2684 [1] = { /* code_gen_buffer */ 2685 .st_info = ELF_ST_INFO(STB_GLOBAL, STT_FUNC), 2686 .st_shndx = 1, 2687 } 2688 }, 2689 .di = { 2690 .len = sizeof(struct DebugInfo) - 4, 2691 .version = 2, 2692 .ptr_size = sizeof(void *), 2693 .cu_die = 1, 2694 .cu_lang = 0x8001, /* DW_LANG_Mips_Assembler */ 2695 .fn_die = 2, 2696 .fn_name = "code_gen_buffer" 2697 }, 2698 .da = { 2699 1, /* abbrev number (the cu) */ 2700 0x11, 1, /* DW_TAG_compile_unit, has children */ 2701 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */ 2702 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ 2703 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ 2704 0, 0, /* end of abbrev */ 2705 2, /* abbrev number (the fn) */ 2706 0x2e, 0, /* DW_TAG_subprogram, no children */ 2707 0x3, 0x8, /* DW_AT_name, DW_FORM_string */ 2708 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ 2709 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ 2710 0, 0, /* end of abbrev */ 2711 0 /* no more abbrev */ 2712 }, 2713 .str = "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0" 2714 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer", 2715 }; 2716 2717 /* We only need a single jit entry; statically allocate it. */ 2718 static struct jit_code_entry one_entry; 2719 2720 uintptr_t buf = (uintptr_t)buf_ptr; 2721 size_t img_size = sizeof(struct ElfImage) + debug_frame_size; 2722 DebugFrameHeader *dfh; 2723 2724 img = g_malloc(img_size); 2725 *img = img_template; 2726 2727 img->phdr.p_vaddr = buf; 2728 img->phdr.p_paddr = buf; 2729 img->phdr.p_memsz = buf_size; 2730 2731 img->shdr[1].sh_name = find_string(img->str, ".text"); 2732 img->shdr[1].sh_addr = buf; 2733 img->shdr[1].sh_size = buf_size; 2734 2735 img->shdr[2].sh_name = find_string(img->str, ".debug_info"); 2736 img->shdr[3].sh_name = find_string(img->str, ".debug_abbrev"); 2737 2738 img->shdr[4].sh_name = find_string(img->str, ".debug_frame"); 2739 img->shdr[4].sh_size = debug_frame_size; 2740 2741 img->shdr[5].sh_name = find_string(img->str, ".symtab"); 2742 img->shdr[6].sh_name = find_string(img->str, ".strtab"); 2743 2744 img->sym[1].st_name = find_string(img->str, "code_gen_buffer"); 2745 img->sym[1].st_value = buf; 2746 img->sym[1].st_size = buf_size; 2747 2748 img->di.cu_low_pc = buf; 2749 img->di.cu_high_pc = buf + buf_size; 2750 img->di.fn_low_pc = buf; 2751 img->di.fn_high_pc = buf + buf_size; 2752 2753 dfh = (DebugFrameHeader *)(img + 1); 2754 memcpy(dfh, debug_frame, debug_frame_size); 2755 dfh->fde.func_start = buf; 2756 dfh->fde.func_len = buf_size; 2757 2758 #ifdef DEBUG_JIT 2759 /* Enable this block to be able to debug the ELF image file creation. 2760 One can use readelf, objdump, or other inspection utilities. */ 2761 { 2762 FILE *f = fopen("/tmp/qemu.jit", "w+b"); 2763 if (f) { 2764 if (fwrite(img, img_size, 1, f) != img_size) { 2765 /* Avoid stupid unused return value warning for fwrite. */ 2766 } 2767 fclose(f); 2768 } 2769 } 2770 #endif 2771 2772 one_entry.symfile_addr = img; 2773 one_entry.symfile_size = img_size; 2774 2775 __jit_debug_descriptor.action_flag = JIT_REGISTER_FN; 2776 __jit_debug_descriptor.relevant_entry = &one_entry; 2777 __jit_debug_descriptor.first_entry = &one_entry; 2778 __jit_debug_register_code(); 2779 } 2780 #else 2781 /* No support for the feature. Provide the entry point expected by exec.c, 2782 and implement the internal function we declared earlier. */ 2783 2784 static void tcg_register_jit_int(void *buf, size_t size, 2785 const void *debug_frame, 2786 size_t debug_frame_size) 2787 { 2788 } 2789 2790 void tcg_register_jit(void *buf, size_t buf_size) 2791 { 2792 } 2793 #endif /* ELF_HOST_MACHINE */ 2794