1 /* 2 * Tiny Code Generator for QEMU 3 * 4 * Copyright (c) 2008 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 /* define it to use liveness analysis (better code) */ 26 #define USE_LIVENESS_ANALYSIS 27 #define USE_TCG_OPTIMIZATIONS 28 29 #include "config.h" 30 31 /* Define to jump the ELF file used to communicate with GDB. */ 32 #undef DEBUG_JIT 33 34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG) 35 /* define it to suppress various consistency checks (faster) */ 36 #define NDEBUG 37 #endif 38 39 #include "qemu-common.h" 40 #include "qemu/host-utils.h" 41 #include "qemu/timer.h" 42 43 /* Note: the long term plan is to reduce the dependencies on the QEMU 44 CPU definitions. Currently they are used for qemu_ld/st 45 instructions */ 46 #define NO_CPU_IO_DEFS 47 #include "cpu.h" 48 49 #include "tcg-op.h" 50 51 #if UINTPTR_MAX == UINT32_MAX 52 # define ELF_CLASS ELFCLASS32 53 #else 54 # define ELF_CLASS ELFCLASS64 55 #endif 56 #ifdef HOST_WORDS_BIGENDIAN 57 # define ELF_DATA ELFDATA2MSB 58 #else 59 # define ELF_DATA ELFDATA2LSB 60 #endif 61 62 #include "elf.h" 63 64 /* Forward declarations for functions declared in tcg-target.c and used here. */ 65 static void tcg_target_init(TCGContext *s); 66 static void tcg_target_qemu_prologue(TCGContext *s); 67 static void patch_reloc(tcg_insn_unit *code_ptr, int type, 68 intptr_t value, intptr_t addend); 69 70 /* The CIE and FDE header definitions will be common to all hosts. */ 71 typedef struct { 72 uint32_t len __attribute__((aligned((sizeof(void *))))); 73 uint32_t id; 74 uint8_t version; 75 char augmentation[1]; 76 uint8_t code_align; 77 uint8_t data_align; 78 uint8_t return_column; 79 } DebugFrameCIE; 80 81 typedef struct QEMU_PACKED { 82 uint32_t len __attribute__((aligned((sizeof(void *))))); 83 uint32_t cie_offset; 84 uintptr_t func_start; 85 uintptr_t func_len; 86 } DebugFrameFDEHeader; 87 88 typedef struct QEMU_PACKED { 89 DebugFrameCIE cie; 90 DebugFrameFDEHeader fde; 91 } DebugFrameHeader; 92 93 static void tcg_register_jit_int(void *buf, size_t size, 94 const void *debug_frame, 95 size_t debug_frame_size) 96 __attribute__((unused)); 97 98 /* Forward declarations for functions declared and used in tcg-target.c. */ 99 static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str); 100 static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, 101 intptr_t arg2); 102 static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg); 103 static void tcg_out_movi(TCGContext *s, TCGType type, 104 TCGReg ret, tcg_target_long arg); 105 static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, 106 const int *const_args); 107 static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1, 108 intptr_t arg2); 109 static void tcg_out_call(TCGContext *s, tcg_insn_unit *target); 110 static int tcg_target_const_match(tcg_target_long val, TCGType type, 111 const TCGArgConstraint *arg_ct); 112 static void tcg_out_tb_init(TCGContext *s); 113 static void tcg_out_tb_finalize(TCGContext *s); 114 115 116 TCGOpDef tcg_op_defs[] = { 117 #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags }, 118 #include "tcg-opc.h" 119 #undef DEF 120 }; 121 const size_t tcg_op_defs_max = ARRAY_SIZE(tcg_op_defs); 122 123 static TCGRegSet tcg_target_available_regs[2]; 124 static TCGRegSet tcg_target_call_clobber_regs; 125 126 #if TCG_TARGET_INSN_UNIT_SIZE == 1 127 static __attribute__((unused)) inline void tcg_out8(TCGContext *s, uint8_t v) 128 { 129 *s->code_ptr++ = v; 130 } 131 132 static __attribute__((unused)) inline void tcg_patch8(tcg_insn_unit *p, 133 uint8_t v) 134 { 135 *p = v; 136 } 137 #endif 138 139 #if TCG_TARGET_INSN_UNIT_SIZE <= 2 140 static __attribute__((unused)) inline void tcg_out16(TCGContext *s, uint16_t v) 141 { 142 if (TCG_TARGET_INSN_UNIT_SIZE == 2) { 143 *s->code_ptr++ = v; 144 } else { 145 tcg_insn_unit *p = s->code_ptr; 146 memcpy(p, &v, sizeof(v)); 147 s->code_ptr = p + (2 / TCG_TARGET_INSN_UNIT_SIZE); 148 } 149 } 150 151 static __attribute__((unused)) inline void tcg_patch16(tcg_insn_unit *p, 152 uint16_t v) 153 { 154 if (TCG_TARGET_INSN_UNIT_SIZE == 2) { 155 *p = v; 156 } else { 157 memcpy(p, &v, sizeof(v)); 158 } 159 } 160 #endif 161 162 #if TCG_TARGET_INSN_UNIT_SIZE <= 4 163 static __attribute__((unused)) inline void tcg_out32(TCGContext *s, uint32_t v) 164 { 165 if (TCG_TARGET_INSN_UNIT_SIZE == 4) { 166 *s->code_ptr++ = v; 167 } else { 168 tcg_insn_unit *p = s->code_ptr; 169 memcpy(p, &v, sizeof(v)); 170 s->code_ptr = p + (4 / TCG_TARGET_INSN_UNIT_SIZE); 171 } 172 } 173 174 static __attribute__((unused)) inline void tcg_patch32(tcg_insn_unit *p, 175 uint32_t v) 176 { 177 if (TCG_TARGET_INSN_UNIT_SIZE == 4) { 178 *p = v; 179 } else { 180 memcpy(p, &v, sizeof(v)); 181 } 182 } 183 #endif 184 185 #if TCG_TARGET_INSN_UNIT_SIZE <= 8 186 static __attribute__((unused)) inline void tcg_out64(TCGContext *s, uint64_t v) 187 { 188 if (TCG_TARGET_INSN_UNIT_SIZE == 8) { 189 *s->code_ptr++ = v; 190 } else { 191 tcg_insn_unit *p = s->code_ptr; 192 memcpy(p, &v, sizeof(v)); 193 s->code_ptr = p + (8 / TCG_TARGET_INSN_UNIT_SIZE); 194 } 195 } 196 197 static __attribute__((unused)) inline void tcg_patch64(tcg_insn_unit *p, 198 uint64_t v) 199 { 200 if (TCG_TARGET_INSN_UNIT_SIZE == 8) { 201 *p = v; 202 } else { 203 memcpy(p, &v, sizeof(v)); 204 } 205 } 206 #endif 207 208 /* label relocation processing */ 209 210 static void tcg_out_reloc(TCGContext *s, tcg_insn_unit *code_ptr, int type, 211 TCGLabel *l, intptr_t addend) 212 { 213 TCGRelocation *r; 214 215 if (l->has_value) { 216 /* FIXME: This may break relocations on RISC targets that 217 modify instruction fields in place. The caller may not have 218 written the initial value. */ 219 patch_reloc(code_ptr, type, l->u.value, addend); 220 } else { 221 /* add a new relocation entry */ 222 r = tcg_malloc(sizeof(TCGRelocation)); 223 r->type = type; 224 r->ptr = code_ptr; 225 r->addend = addend; 226 r->next = l->u.first_reloc; 227 l->u.first_reloc = r; 228 } 229 } 230 231 static void tcg_out_label(TCGContext *s, TCGLabel *l, tcg_insn_unit *ptr) 232 { 233 intptr_t value = (intptr_t)ptr; 234 TCGRelocation *r; 235 236 assert(!l->has_value); 237 238 for (r = l->u.first_reloc; r != NULL; r = r->next) { 239 patch_reloc(r->ptr, r->type, value, r->addend); 240 } 241 242 l->has_value = 1; 243 l->u.value_ptr = ptr; 244 } 245 246 TCGLabel *gen_new_label(void) 247 { 248 TCGContext *s = &tcg_ctx; 249 TCGLabel *l = tcg_malloc(sizeof(TCGLabel)); 250 251 *l = (TCGLabel){ 252 .id = s->nb_labels++ 253 }; 254 255 return l; 256 } 257 258 #include "tcg-target.c" 259 260 /* pool based memory allocation */ 261 void *tcg_malloc_internal(TCGContext *s, int size) 262 { 263 TCGPool *p; 264 int pool_size; 265 266 if (size > TCG_POOL_CHUNK_SIZE) { 267 /* big malloc: insert a new pool (XXX: could optimize) */ 268 p = g_malloc(sizeof(TCGPool) + size); 269 p->size = size; 270 p->next = s->pool_first_large; 271 s->pool_first_large = p; 272 return p->data; 273 } else { 274 p = s->pool_current; 275 if (!p) { 276 p = s->pool_first; 277 if (!p) 278 goto new_pool; 279 } else { 280 if (!p->next) { 281 new_pool: 282 pool_size = TCG_POOL_CHUNK_SIZE; 283 p = g_malloc(sizeof(TCGPool) + pool_size); 284 p->size = pool_size; 285 p->next = NULL; 286 if (s->pool_current) 287 s->pool_current->next = p; 288 else 289 s->pool_first = p; 290 } else { 291 p = p->next; 292 } 293 } 294 } 295 s->pool_current = p; 296 s->pool_cur = p->data + size; 297 s->pool_end = p->data + p->size; 298 return p->data; 299 } 300 301 void tcg_pool_reset(TCGContext *s) 302 { 303 TCGPool *p, *t; 304 for (p = s->pool_first_large; p; p = t) { 305 t = p->next; 306 g_free(p); 307 } 308 s->pool_first_large = NULL; 309 s->pool_cur = s->pool_end = NULL; 310 s->pool_current = NULL; 311 } 312 313 typedef struct TCGHelperInfo { 314 void *func; 315 const char *name; 316 unsigned flags; 317 unsigned sizemask; 318 } TCGHelperInfo; 319 320 #include "exec/helper-proto.h" 321 322 static const TCGHelperInfo all_helpers[] = { 323 #include "exec/helper-tcg.h" 324 }; 325 326 void tcg_context_init(TCGContext *s) 327 { 328 int op, total_args, n, i; 329 TCGOpDef *def; 330 TCGArgConstraint *args_ct; 331 int *sorted_args; 332 GHashTable *helper_table; 333 334 memset(s, 0, sizeof(*s)); 335 s->nb_globals = 0; 336 337 /* Count total number of arguments and allocate the corresponding 338 space */ 339 total_args = 0; 340 for(op = 0; op < NB_OPS; op++) { 341 def = &tcg_op_defs[op]; 342 n = def->nb_iargs + def->nb_oargs; 343 total_args += n; 344 } 345 346 args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args); 347 sorted_args = g_malloc(sizeof(int) * total_args); 348 349 for(op = 0; op < NB_OPS; op++) { 350 def = &tcg_op_defs[op]; 351 def->args_ct = args_ct; 352 def->sorted_args = sorted_args; 353 n = def->nb_iargs + def->nb_oargs; 354 sorted_args += n; 355 args_ct += n; 356 } 357 358 /* Register helpers. */ 359 /* Use g_direct_hash/equal for direct pointer comparisons on func. */ 360 s->helpers = helper_table = g_hash_table_new(NULL, NULL); 361 362 for (i = 0; i < ARRAY_SIZE(all_helpers); ++i) { 363 g_hash_table_insert(helper_table, (gpointer)all_helpers[i].func, 364 (gpointer)&all_helpers[i]); 365 } 366 367 tcg_target_init(s); 368 } 369 370 void tcg_prologue_init(TCGContext *s) 371 { 372 /* init global prologue and epilogue */ 373 s->code_buf = s->code_gen_prologue; 374 s->code_ptr = s->code_buf; 375 tcg_target_qemu_prologue(s); 376 flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr); 377 378 #ifdef DEBUG_DISAS 379 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { 380 size_t size = tcg_current_code_size(s); 381 qemu_log("PROLOGUE: [size=%zu]\n", size); 382 log_disas(s->code_buf, size); 383 qemu_log("\n"); 384 qemu_log_flush(); 385 } 386 #endif 387 } 388 389 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size) 390 { 391 s->frame_start = start; 392 s->frame_end = start + size; 393 s->frame_reg = reg; 394 } 395 396 void tcg_func_start(TCGContext *s) 397 { 398 tcg_pool_reset(s); 399 s->nb_temps = s->nb_globals; 400 401 /* No temps have been previously allocated for size or locality. */ 402 memset(s->free_temps, 0, sizeof(s->free_temps)); 403 404 s->nb_labels = 0; 405 s->current_frame_offset = s->frame_start; 406 407 #ifdef CONFIG_DEBUG_TCG 408 s->goto_tb_issue_mask = 0; 409 #endif 410 411 s->gen_first_op_idx = 0; 412 s->gen_last_op_idx = -1; 413 s->gen_next_op_idx = 0; 414 s->gen_next_parm_idx = 0; 415 416 s->be = tcg_malloc(sizeof(TCGBackendData)); 417 } 418 419 static inline void tcg_temp_alloc(TCGContext *s, int n) 420 { 421 if (n > TCG_MAX_TEMPS) 422 tcg_abort(); 423 } 424 425 static inline int tcg_global_reg_new_internal(TCGType type, int reg, 426 const char *name) 427 { 428 TCGContext *s = &tcg_ctx; 429 TCGTemp *ts; 430 int idx; 431 432 #if TCG_TARGET_REG_BITS == 32 433 if (type != TCG_TYPE_I32) 434 tcg_abort(); 435 #endif 436 if (tcg_regset_test_reg(s->reserved_regs, reg)) 437 tcg_abort(); 438 idx = s->nb_globals; 439 tcg_temp_alloc(s, s->nb_globals + 1); 440 ts = &s->temps[s->nb_globals]; 441 ts->base_type = type; 442 ts->type = type; 443 ts->fixed_reg = 1; 444 ts->reg = reg; 445 ts->name = name; 446 s->nb_globals++; 447 tcg_regset_set_reg(s->reserved_regs, reg); 448 return idx; 449 } 450 451 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name) 452 { 453 int idx; 454 455 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name); 456 return MAKE_TCGV_I32(idx); 457 } 458 459 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name) 460 { 461 int idx; 462 463 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name); 464 return MAKE_TCGV_I64(idx); 465 } 466 467 static inline int tcg_global_mem_new_internal(TCGType type, int reg, 468 intptr_t offset, 469 const char *name) 470 { 471 TCGContext *s = &tcg_ctx; 472 TCGTemp *ts; 473 int idx; 474 475 idx = s->nb_globals; 476 #if TCG_TARGET_REG_BITS == 32 477 if (type == TCG_TYPE_I64) { 478 char buf[64]; 479 tcg_temp_alloc(s, s->nb_globals + 2); 480 ts = &s->temps[s->nb_globals]; 481 ts->base_type = type; 482 ts->type = TCG_TYPE_I32; 483 ts->fixed_reg = 0; 484 ts->mem_allocated = 1; 485 ts->mem_reg = reg; 486 #ifdef HOST_WORDS_BIGENDIAN 487 ts->mem_offset = offset + 4; 488 #else 489 ts->mem_offset = offset; 490 #endif 491 pstrcpy(buf, sizeof(buf), name); 492 pstrcat(buf, sizeof(buf), "_0"); 493 ts->name = strdup(buf); 494 ts++; 495 496 ts->base_type = type; 497 ts->type = TCG_TYPE_I32; 498 ts->fixed_reg = 0; 499 ts->mem_allocated = 1; 500 ts->mem_reg = reg; 501 #ifdef HOST_WORDS_BIGENDIAN 502 ts->mem_offset = offset; 503 #else 504 ts->mem_offset = offset + 4; 505 #endif 506 pstrcpy(buf, sizeof(buf), name); 507 pstrcat(buf, sizeof(buf), "_1"); 508 ts->name = strdup(buf); 509 510 s->nb_globals += 2; 511 } else 512 #endif 513 { 514 tcg_temp_alloc(s, s->nb_globals + 1); 515 ts = &s->temps[s->nb_globals]; 516 ts->base_type = type; 517 ts->type = type; 518 ts->fixed_reg = 0; 519 ts->mem_allocated = 1; 520 ts->mem_reg = reg; 521 ts->mem_offset = offset; 522 ts->name = name; 523 s->nb_globals++; 524 } 525 return idx; 526 } 527 528 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name) 529 { 530 int idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name); 531 return MAKE_TCGV_I32(idx); 532 } 533 534 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name) 535 { 536 int idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name); 537 return MAKE_TCGV_I64(idx); 538 } 539 540 static inline int tcg_temp_new_internal(TCGType type, int temp_local) 541 { 542 TCGContext *s = &tcg_ctx; 543 TCGTemp *ts; 544 int idx, k; 545 546 k = type + (temp_local ? TCG_TYPE_COUNT : 0); 547 idx = find_first_bit(s->free_temps[k].l, TCG_MAX_TEMPS); 548 if (idx < TCG_MAX_TEMPS) { 549 /* There is already an available temp with the right type. */ 550 clear_bit(idx, s->free_temps[k].l); 551 552 ts = &s->temps[idx]; 553 ts->temp_allocated = 1; 554 assert(ts->base_type == type); 555 assert(ts->temp_local == temp_local); 556 } else { 557 idx = s->nb_temps; 558 #if TCG_TARGET_REG_BITS == 32 559 if (type == TCG_TYPE_I64) { 560 tcg_temp_alloc(s, s->nb_temps + 2); 561 ts = &s->temps[s->nb_temps]; 562 ts->base_type = type; 563 ts->type = TCG_TYPE_I32; 564 ts->temp_allocated = 1; 565 ts->temp_local = temp_local; 566 ts->name = NULL; 567 ts++; 568 ts->base_type = type; 569 ts->type = TCG_TYPE_I32; 570 ts->temp_allocated = 1; 571 ts->temp_local = temp_local; 572 ts->name = NULL; 573 s->nb_temps += 2; 574 } else 575 #endif 576 { 577 tcg_temp_alloc(s, s->nb_temps + 1); 578 ts = &s->temps[s->nb_temps]; 579 ts->base_type = type; 580 ts->type = type; 581 ts->temp_allocated = 1; 582 ts->temp_local = temp_local; 583 ts->name = NULL; 584 s->nb_temps++; 585 } 586 } 587 588 #if defined(CONFIG_DEBUG_TCG) 589 s->temps_in_use++; 590 #endif 591 return idx; 592 } 593 594 TCGv_i32 tcg_temp_new_internal_i32(int temp_local) 595 { 596 int idx; 597 598 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local); 599 return MAKE_TCGV_I32(idx); 600 } 601 602 TCGv_i64 tcg_temp_new_internal_i64(int temp_local) 603 { 604 int idx; 605 606 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local); 607 return MAKE_TCGV_I64(idx); 608 } 609 610 static void tcg_temp_free_internal(int idx) 611 { 612 TCGContext *s = &tcg_ctx; 613 TCGTemp *ts; 614 int k; 615 616 #if defined(CONFIG_DEBUG_TCG) 617 s->temps_in_use--; 618 if (s->temps_in_use < 0) { 619 fprintf(stderr, "More temporaries freed than allocated!\n"); 620 } 621 #endif 622 623 assert(idx >= s->nb_globals && idx < s->nb_temps); 624 ts = &s->temps[idx]; 625 assert(ts->temp_allocated != 0); 626 ts->temp_allocated = 0; 627 628 k = ts->base_type + (ts->temp_local ? TCG_TYPE_COUNT : 0); 629 set_bit(idx, s->free_temps[k].l); 630 } 631 632 void tcg_temp_free_i32(TCGv_i32 arg) 633 { 634 tcg_temp_free_internal(GET_TCGV_I32(arg)); 635 } 636 637 void tcg_temp_free_i64(TCGv_i64 arg) 638 { 639 tcg_temp_free_internal(GET_TCGV_I64(arg)); 640 } 641 642 TCGv_i32 tcg_const_i32(int32_t val) 643 { 644 TCGv_i32 t0; 645 t0 = tcg_temp_new_i32(); 646 tcg_gen_movi_i32(t0, val); 647 return t0; 648 } 649 650 TCGv_i64 tcg_const_i64(int64_t val) 651 { 652 TCGv_i64 t0; 653 t0 = tcg_temp_new_i64(); 654 tcg_gen_movi_i64(t0, val); 655 return t0; 656 } 657 658 TCGv_i32 tcg_const_local_i32(int32_t val) 659 { 660 TCGv_i32 t0; 661 t0 = tcg_temp_local_new_i32(); 662 tcg_gen_movi_i32(t0, val); 663 return t0; 664 } 665 666 TCGv_i64 tcg_const_local_i64(int64_t val) 667 { 668 TCGv_i64 t0; 669 t0 = tcg_temp_local_new_i64(); 670 tcg_gen_movi_i64(t0, val); 671 return t0; 672 } 673 674 #if defined(CONFIG_DEBUG_TCG) 675 void tcg_clear_temp_count(void) 676 { 677 TCGContext *s = &tcg_ctx; 678 s->temps_in_use = 0; 679 } 680 681 int tcg_check_temp_count(void) 682 { 683 TCGContext *s = &tcg_ctx; 684 if (s->temps_in_use) { 685 /* Clear the count so that we don't give another 686 * warning immediately next time around. 687 */ 688 s->temps_in_use = 0; 689 return 1; 690 } 691 return 0; 692 } 693 #endif 694 695 /* Note: we convert the 64 bit args to 32 bit and do some alignment 696 and endian swap. Maybe it would be better to do the alignment 697 and endian swap in tcg_reg_alloc_call(). */ 698 void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret, 699 int nargs, TCGArg *args) 700 { 701 int i, real_args, nb_rets, pi, pi_first; 702 unsigned sizemask, flags; 703 TCGHelperInfo *info; 704 705 info = g_hash_table_lookup(s->helpers, (gpointer)func); 706 flags = info->flags; 707 sizemask = info->sizemask; 708 709 #if defined(__sparc__) && !defined(__arch64__) \ 710 && !defined(CONFIG_TCG_INTERPRETER) 711 /* We have 64-bit values in one register, but need to pass as two 712 separate parameters. Split them. */ 713 int orig_sizemask = sizemask; 714 int orig_nargs = nargs; 715 TCGv_i64 retl, reth; 716 717 TCGV_UNUSED_I64(retl); 718 TCGV_UNUSED_I64(reth); 719 if (sizemask != 0) { 720 TCGArg *split_args = __builtin_alloca(sizeof(TCGArg) * nargs * 2); 721 for (i = real_args = 0; i < nargs; ++i) { 722 int is_64bit = sizemask & (1 << (i+1)*2); 723 if (is_64bit) { 724 TCGv_i64 orig = MAKE_TCGV_I64(args[i]); 725 TCGv_i32 h = tcg_temp_new_i32(); 726 TCGv_i32 l = tcg_temp_new_i32(); 727 tcg_gen_extr_i64_i32(l, h, orig); 728 split_args[real_args++] = GET_TCGV_I32(h); 729 split_args[real_args++] = GET_TCGV_I32(l); 730 } else { 731 split_args[real_args++] = args[i]; 732 } 733 } 734 nargs = real_args; 735 args = split_args; 736 sizemask = 0; 737 } 738 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 739 for (i = 0; i < nargs; ++i) { 740 int is_64bit = sizemask & (1 << (i+1)*2); 741 int is_signed = sizemask & (2 << (i+1)*2); 742 if (!is_64bit) { 743 TCGv_i64 temp = tcg_temp_new_i64(); 744 TCGv_i64 orig = MAKE_TCGV_I64(args[i]); 745 if (is_signed) { 746 tcg_gen_ext32s_i64(temp, orig); 747 } else { 748 tcg_gen_ext32u_i64(temp, orig); 749 } 750 args[i] = GET_TCGV_I64(temp); 751 } 752 } 753 #endif /* TCG_TARGET_EXTEND_ARGS */ 754 755 pi_first = pi = s->gen_next_parm_idx; 756 if (ret != TCG_CALL_DUMMY_ARG) { 757 #if defined(__sparc__) && !defined(__arch64__) \ 758 && !defined(CONFIG_TCG_INTERPRETER) 759 if (orig_sizemask & 1) { 760 /* The 32-bit ABI is going to return the 64-bit value in 761 the %o0/%o1 register pair. Prepare for this by using 762 two return temporaries, and reassemble below. */ 763 retl = tcg_temp_new_i64(); 764 reth = tcg_temp_new_i64(); 765 s->gen_opparam_buf[pi++] = GET_TCGV_I64(reth); 766 s->gen_opparam_buf[pi++] = GET_TCGV_I64(retl); 767 nb_rets = 2; 768 } else { 769 s->gen_opparam_buf[pi++] = ret; 770 nb_rets = 1; 771 } 772 #else 773 if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) { 774 #ifdef HOST_WORDS_BIGENDIAN 775 s->gen_opparam_buf[pi++] = ret + 1; 776 s->gen_opparam_buf[pi++] = ret; 777 #else 778 s->gen_opparam_buf[pi++] = ret; 779 s->gen_opparam_buf[pi++] = ret + 1; 780 #endif 781 nb_rets = 2; 782 } else { 783 s->gen_opparam_buf[pi++] = ret; 784 nb_rets = 1; 785 } 786 #endif 787 } else { 788 nb_rets = 0; 789 } 790 real_args = 0; 791 for (i = 0; i < nargs; i++) { 792 int is_64bit = sizemask & (1 << (i+1)*2); 793 if (TCG_TARGET_REG_BITS < 64 && is_64bit) { 794 #ifdef TCG_TARGET_CALL_ALIGN_ARGS 795 /* some targets want aligned 64 bit args */ 796 if (real_args & 1) { 797 s->gen_opparam_buf[pi++] = TCG_CALL_DUMMY_ARG; 798 real_args++; 799 } 800 #endif 801 /* If stack grows up, then we will be placing successive 802 arguments at lower addresses, which means we need to 803 reverse the order compared to how we would normally 804 treat either big or little-endian. For those arguments 805 that will wind up in registers, this still works for 806 HPPA (the only current STACK_GROWSUP target) since the 807 argument registers are *also* allocated in decreasing 808 order. If another such target is added, this logic may 809 have to get more complicated to differentiate between 810 stack arguments and register arguments. */ 811 #if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP) 812 s->gen_opparam_buf[pi++] = args[i] + 1; 813 s->gen_opparam_buf[pi++] = args[i]; 814 #else 815 s->gen_opparam_buf[pi++] = args[i]; 816 s->gen_opparam_buf[pi++] = args[i] + 1; 817 #endif 818 real_args += 2; 819 continue; 820 } 821 822 s->gen_opparam_buf[pi++] = args[i]; 823 real_args++; 824 } 825 s->gen_opparam_buf[pi++] = (uintptr_t)func; 826 s->gen_opparam_buf[pi++] = flags; 827 828 i = s->gen_next_op_idx; 829 tcg_debug_assert(i < OPC_BUF_SIZE); 830 tcg_debug_assert(pi <= OPPARAM_BUF_SIZE); 831 832 /* Set links for sequential allocation during translation. */ 833 s->gen_op_buf[i] = (TCGOp){ 834 .opc = INDEX_op_call, 835 .callo = nb_rets, 836 .calli = real_args, 837 .args = pi_first, 838 .prev = i - 1, 839 .next = i + 1 840 }; 841 842 /* Make sure the calli field didn't overflow. */ 843 tcg_debug_assert(s->gen_op_buf[i].calli == real_args); 844 845 s->gen_last_op_idx = i; 846 s->gen_next_op_idx = i + 1; 847 s->gen_next_parm_idx = pi; 848 849 #if defined(__sparc__) && !defined(__arch64__) \ 850 && !defined(CONFIG_TCG_INTERPRETER) 851 /* Free all of the parts we allocated above. */ 852 for (i = real_args = 0; i < orig_nargs; ++i) { 853 int is_64bit = orig_sizemask & (1 << (i+1)*2); 854 if (is_64bit) { 855 TCGv_i32 h = MAKE_TCGV_I32(args[real_args++]); 856 TCGv_i32 l = MAKE_TCGV_I32(args[real_args++]); 857 tcg_temp_free_i32(h); 858 tcg_temp_free_i32(l); 859 } else { 860 real_args++; 861 } 862 } 863 if (orig_sizemask & 1) { 864 /* The 32-bit ABI returned two 32-bit pieces. Re-assemble them. 865 Note that describing these as TCGv_i64 eliminates an unnecessary 866 zero-extension that tcg_gen_concat_i32_i64 would create. */ 867 tcg_gen_concat32_i64(MAKE_TCGV_I64(ret), retl, reth); 868 tcg_temp_free_i64(retl); 869 tcg_temp_free_i64(reth); 870 } 871 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 872 for (i = 0; i < nargs; ++i) { 873 int is_64bit = sizemask & (1 << (i+1)*2); 874 if (!is_64bit) { 875 TCGv_i64 temp = MAKE_TCGV_I64(args[i]); 876 tcg_temp_free_i64(temp); 877 } 878 } 879 #endif /* TCG_TARGET_EXTEND_ARGS */ 880 } 881 882 static void tcg_reg_alloc_start(TCGContext *s) 883 { 884 int i; 885 TCGTemp *ts; 886 for(i = 0; i < s->nb_globals; i++) { 887 ts = &s->temps[i]; 888 if (ts->fixed_reg) { 889 ts->val_type = TEMP_VAL_REG; 890 } else { 891 ts->val_type = TEMP_VAL_MEM; 892 } 893 } 894 for(i = s->nb_globals; i < s->nb_temps; i++) { 895 ts = &s->temps[i]; 896 if (ts->temp_local) { 897 ts->val_type = TEMP_VAL_MEM; 898 } else { 899 ts->val_type = TEMP_VAL_DEAD; 900 } 901 ts->mem_allocated = 0; 902 ts->fixed_reg = 0; 903 } 904 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 905 s->reg_to_temp[i] = -1; 906 } 907 } 908 909 static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size, 910 int idx) 911 { 912 TCGTemp *ts; 913 914 assert(idx >= 0 && idx < s->nb_temps); 915 ts = &s->temps[idx]; 916 if (idx < s->nb_globals) { 917 pstrcpy(buf, buf_size, ts->name); 918 } else { 919 if (ts->temp_local) 920 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals); 921 else 922 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals); 923 } 924 return buf; 925 } 926 927 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg) 928 { 929 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg)); 930 } 931 932 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg) 933 { 934 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg)); 935 } 936 937 /* Find helper name. */ 938 static inline const char *tcg_find_helper(TCGContext *s, uintptr_t val) 939 { 940 const char *ret = NULL; 941 if (s->helpers) { 942 TCGHelperInfo *info = g_hash_table_lookup(s->helpers, (gpointer)val); 943 if (info) { 944 ret = info->name; 945 } 946 } 947 return ret; 948 } 949 950 static const char * const cond_name[] = 951 { 952 [TCG_COND_NEVER] = "never", 953 [TCG_COND_ALWAYS] = "always", 954 [TCG_COND_EQ] = "eq", 955 [TCG_COND_NE] = "ne", 956 [TCG_COND_LT] = "lt", 957 [TCG_COND_GE] = "ge", 958 [TCG_COND_LE] = "le", 959 [TCG_COND_GT] = "gt", 960 [TCG_COND_LTU] = "ltu", 961 [TCG_COND_GEU] = "geu", 962 [TCG_COND_LEU] = "leu", 963 [TCG_COND_GTU] = "gtu" 964 }; 965 966 static const char * const ldst_name[] = 967 { 968 [MO_UB] = "ub", 969 [MO_SB] = "sb", 970 [MO_LEUW] = "leuw", 971 [MO_LESW] = "lesw", 972 [MO_LEUL] = "leul", 973 [MO_LESL] = "lesl", 974 [MO_LEQ] = "leq", 975 [MO_BEUW] = "beuw", 976 [MO_BESW] = "besw", 977 [MO_BEUL] = "beul", 978 [MO_BESL] = "besl", 979 [MO_BEQ] = "beq", 980 }; 981 982 void tcg_dump_ops(TCGContext *s) 983 { 984 char buf[128]; 985 TCGOp *op; 986 int oi; 987 988 for (oi = s->gen_first_op_idx; oi >= 0; oi = op->next) { 989 int i, k, nb_oargs, nb_iargs, nb_cargs; 990 const TCGOpDef *def; 991 const TCGArg *args; 992 TCGOpcode c; 993 994 op = &s->gen_op_buf[oi]; 995 c = op->opc; 996 def = &tcg_op_defs[c]; 997 args = &s->gen_opparam_buf[op->args]; 998 999 if (c == INDEX_op_debug_insn_start) { 1000 uint64_t pc; 1001 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS 1002 pc = ((uint64_t)args[1] << 32) | args[0]; 1003 #else 1004 pc = args[0]; 1005 #endif 1006 if (oi != s->gen_first_op_idx) { 1007 qemu_log("\n"); 1008 } 1009 qemu_log(" ---- 0x%" PRIx64, pc); 1010 } else if (c == INDEX_op_call) { 1011 /* variable number of arguments */ 1012 nb_oargs = op->callo; 1013 nb_iargs = op->calli; 1014 nb_cargs = def->nb_cargs; 1015 1016 /* function name, flags, out args */ 1017 qemu_log(" %s %s,$0x%" TCG_PRIlx ",$%d", def->name, 1018 tcg_find_helper(s, args[nb_oargs + nb_iargs]), 1019 args[nb_oargs + nb_iargs + 1], nb_oargs); 1020 for (i = 0; i < nb_oargs; i++) { 1021 qemu_log(",%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1022 args[i])); 1023 } 1024 for (i = 0; i < nb_iargs; i++) { 1025 TCGArg arg = args[nb_oargs + i]; 1026 const char *t = "<dummy>"; 1027 if (arg != TCG_CALL_DUMMY_ARG) { 1028 t = tcg_get_arg_str_idx(s, buf, sizeof(buf), arg); 1029 } 1030 qemu_log(",%s", t); 1031 } 1032 } else { 1033 qemu_log(" %s ", def->name); 1034 1035 nb_oargs = def->nb_oargs; 1036 nb_iargs = def->nb_iargs; 1037 nb_cargs = def->nb_cargs; 1038 1039 k = 0; 1040 for (i = 0; i < nb_oargs; i++) { 1041 if (k != 0) { 1042 qemu_log(","); 1043 } 1044 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1045 args[k++])); 1046 } 1047 for (i = 0; i < nb_iargs; i++) { 1048 if (k != 0) { 1049 qemu_log(","); 1050 } 1051 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1052 args[k++])); 1053 } 1054 switch (c) { 1055 case INDEX_op_brcond_i32: 1056 case INDEX_op_setcond_i32: 1057 case INDEX_op_movcond_i32: 1058 case INDEX_op_brcond2_i32: 1059 case INDEX_op_setcond2_i32: 1060 case INDEX_op_brcond_i64: 1061 case INDEX_op_setcond_i64: 1062 case INDEX_op_movcond_i64: 1063 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) { 1064 qemu_log(",%s", cond_name[args[k++]]); 1065 } else { 1066 qemu_log(",$0x%" TCG_PRIlx, args[k++]); 1067 } 1068 i = 1; 1069 break; 1070 case INDEX_op_qemu_ld_i32: 1071 case INDEX_op_qemu_st_i32: 1072 case INDEX_op_qemu_ld_i64: 1073 case INDEX_op_qemu_st_i64: 1074 { 1075 TCGMemOpIdx oi = args[k++]; 1076 TCGMemOp op = get_memop(oi); 1077 unsigned ix = get_mmuidx(oi); 1078 1079 if (op & ~(MO_AMASK | MO_BSWAP | MO_SSIZE)) { 1080 qemu_log(",$0x%x,%u", op, ix); 1081 } else { 1082 const char *s_al = "", *s_op; 1083 if (op & MO_AMASK) { 1084 if ((op & MO_AMASK) == MO_ALIGN) { 1085 s_al = "al+"; 1086 } else { 1087 s_al = "un+"; 1088 } 1089 } 1090 s_op = ldst_name[op & (MO_BSWAP | MO_SSIZE)]; 1091 qemu_log(",%s%s,%u", s_al, s_op, ix); 1092 } 1093 i = 1; 1094 } 1095 break; 1096 default: 1097 i = 0; 1098 break; 1099 } 1100 switch (c) { 1101 case INDEX_op_set_label: 1102 case INDEX_op_br: 1103 case INDEX_op_brcond_i32: 1104 case INDEX_op_brcond_i64: 1105 case INDEX_op_brcond2_i32: 1106 qemu_log("%s$L%d", k ? "," : "", arg_label(args[k])->id); 1107 i++, k++; 1108 break; 1109 default: 1110 break; 1111 } 1112 for (; i < nb_cargs; i++, k++) { 1113 qemu_log("%s$0x%" TCG_PRIlx, k ? "," : "", args[k]); 1114 } 1115 } 1116 qemu_log("\n"); 1117 } 1118 } 1119 1120 /* we give more priority to constraints with less registers */ 1121 static int get_constraint_priority(const TCGOpDef *def, int k) 1122 { 1123 const TCGArgConstraint *arg_ct; 1124 1125 int i, n; 1126 arg_ct = &def->args_ct[k]; 1127 if (arg_ct->ct & TCG_CT_ALIAS) { 1128 /* an alias is equivalent to a single register */ 1129 n = 1; 1130 } else { 1131 if (!(arg_ct->ct & TCG_CT_REG)) 1132 return 0; 1133 n = 0; 1134 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 1135 if (tcg_regset_test_reg(arg_ct->u.regs, i)) 1136 n++; 1137 } 1138 } 1139 return TCG_TARGET_NB_REGS - n + 1; 1140 } 1141 1142 /* sort from highest priority to lowest */ 1143 static void sort_constraints(TCGOpDef *def, int start, int n) 1144 { 1145 int i, j, p1, p2, tmp; 1146 1147 for(i = 0; i < n; i++) 1148 def->sorted_args[start + i] = start + i; 1149 if (n <= 1) 1150 return; 1151 for(i = 0; i < n - 1; i++) { 1152 for(j = i + 1; j < n; j++) { 1153 p1 = get_constraint_priority(def, def->sorted_args[start + i]); 1154 p2 = get_constraint_priority(def, def->sorted_args[start + j]); 1155 if (p1 < p2) { 1156 tmp = def->sorted_args[start + i]; 1157 def->sorted_args[start + i] = def->sorted_args[start + j]; 1158 def->sorted_args[start + j] = tmp; 1159 } 1160 } 1161 } 1162 } 1163 1164 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs) 1165 { 1166 TCGOpcode op; 1167 TCGOpDef *def; 1168 const char *ct_str; 1169 int i, nb_args; 1170 1171 for(;;) { 1172 if (tdefs->op == (TCGOpcode)-1) 1173 break; 1174 op = tdefs->op; 1175 assert((unsigned)op < NB_OPS); 1176 def = &tcg_op_defs[op]; 1177 #if defined(CONFIG_DEBUG_TCG) 1178 /* Duplicate entry in op definitions? */ 1179 assert(!def->used); 1180 def->used = 1; 1181 #endif 1182 nb_args = def->nb_iargs + def->nb_oargs; 1183 for(i = 0; i < nb_args; i++) { 1184 ct_str = tdefs->args_ct_str[i]; 1185 /* Incomplete TCGTargetOpDef entry? */ 1186 assert(ct_str != NULL); 1187 tcg_regset_clear(def->args_ct[i].u.regs); 1188 def->args_ct[i].ct = 0; 1189 if (ct_str[0] >= '0' && ct_str[0] <= '9') { 1190 int oarg; 1191 oarg = ct_str[0] - '0'; 1192 assert(oarg < def->nb_oargs); 1193 assert(def->args_ct[oarg].ct & TCG_CT_REG); 1194 /* TCG_CT_ALIAS is for the output arguments. The input 1195 argument is tagged with TCG_CT_IALIAS. */ 1196 def->args_ct[i] = def->args_ct[oarg]; 1197 def->args_ct[oarg].ct = TCG_CT_ALIAS; 1198 def->args_ct[oarg].alias_index = i; 1199 def->args_ct[i].ct |= TCG_CT_IALIAS; 1200 def->args_ct[i].alias_index = oarg; 1201 } else { 1202 for(;;) { 1203 if (*ct_str == '\0') 1204 break; 1205 switch(*ct_str) { 1206 case 'i': 1207 def->args_ct[i].ct |= TCG_CT_CONST; 1208 ct_str++; 1209 break; 1210 default: 1211 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) { 1212 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n", 1213 ct_str, i, def->name); 1214 exit(1); 1215 } 1216 } 1217 } 1218 } 1219 } 1220 1221 /* TCGTargetOpDef entry with too much information? */ 1222 assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL); 1223 1224 /* sort the constraints (XXX: this is just an heuristic) */ 1225 sort_constraints(def, 0, def->nb_oargs); 1226 sort_constraints(def, def->nb_oargs, def->nb_iargs); 1227 1228 #if 0 1229 { 1230 int i; 1231 1232 printf("%s: sorted=", def->name); 1233 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++) 1234 printf(" %d", def->sorted_args[i]); 1235 printf("\n"); 1236 } 1237 #endif 1238 tdefs++; 1239 } 1240 1241 #if defined(CONFIG_DEBUG_TCG) 1242 i = 0; 1243 for (op = 0; op < ARRAY_SIZE(tcg_op_defs); op++) { 1244 const TCGOpDef *def = &tcg_op_defs[op]; 1245 if (def->flags & TCG_OPF_NOT_PRESENT) { 1246 /* Wrong entry in op definitions? */ 1247 if (def->used) { 1248 fprintf(stderr, "Invalid op definition for %s\n", def->name); 1249 i = 1; 1250 } 1251 } else { 1252 /* Missing entry in op definitions? */ 1253 if (!def->used) { 1254 fprintf(stderr, "Missing op definition for %s\n", def->name); 1255 i = 1; 1256 } 1257 } 1258 } 1259 if (i == 1) { 1260 tcg_abort(); 1261 } 1262 #endif 1263 } 1264 1265 void tcg_op_remove(TCGContext *s, TCGOp *op) 1266 { 1267 int next = op->next; 1268 int prev = op->prev; 1269 1270 if (next >= 0) { 1271 s->gen_op_buf[next].prev = prev; 1272 } else { 1273 s->gen_last_op_idx = prev; 1274 } 1275 if (prev >= 0) { 1276 s->gen_op_buf[prev].next = next; 1277 } else { 1278 s->gen_first_op_idx = next; 1279 } 1280 1281 memset(op, -1, sizeof(*op)); 1282 1283 #ifdef CONFIG_PROFILER 1284 s->del_op_count++; 1285 #endif 1286 } 1287 1288 #ifdef USE_LIVENESS_ANALYSIS 1289 /* liveness analysis: end of function: all temps are dead, and globals 1290 should be in memory. */ 1291 static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps, 1292 uint8_t *mem_temps) 1293 { 1294 memset(dead_temps, 1, s->nb_temps); 1295 memset(mem_temps, 1, s->nb_globals); 1296 memset(mem_temps + s->nb_globals, 0, s->nb_temps - s->nb_globals); 1297 } 1298 1299 /* liveness analysis: end of basic block: all temps are dead, globals 1300 and local temps should be in memory. */ 1301 static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps, 1302 uint8_t *mem_temps) 1303 { 1304 int i; 1305 1306 memset(dead_temps, 1, s->nb_temps); 1307 memset(mem_temps, 1, s->nb_globals); 1308 for(i = s->nb_globals; i < s->nb_temps; i++) { 1309 mem_temps[i] = s->temps[i].temp_local; 1310 } 1311 } 1312 1313 /* Liveness analysis : update the opc_dead_args array to tell if a 1314 given input arguments is dead. Instructions updating dead 1315 temporaries are removed. */ 1316 static void tcg_liveness_analysis(TCGContext *s) 1317 { 1318 uint8_t *dead_temps, *mem_temps; 1319 int oi, oi_prev, nb_ops; 1320 1321 nb_ops = s->gen_next_op_idx; 1322 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); 1323 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); 1324 1325 dead_temps = tcg_malloc(s->nb_temps); 1326 mem_temps = tcg_malloc(s->nb_temps); 1327 tcg_la_func_end(s, dead_temps, mem_temps); 1328 1329 for (oi = s->gen_last_op_idx; oi >= 0; oi = oi_prev) { 1330 int i, nb_iargs, nb_oargs; 1331 TCGOpcode opc_new, opc_new2; 1332 bool have_opc_new2; 1333 uint16_t dead_args; 1334 uint8_t sync_args; 1335 TCGArg arg; 1336 1337 TCGOp * const op = &s->gen_op_buf[oi]; 1338 TCGArg * const args = &s->gen_opparam_buf[op->args]; 1339 TCGOpcode opc = op->opc; 1340 const TCGOpDef *def = &tcg_op_defs[opc]; 1341 1342 oi_prev = op->prev; 1343 1344 switch (opc) { 1345 case INDEX_op_call: 1346 { 1347 int call_flags; 1348 1349 nb_oargs = op->callo; 1350 nb_iargs = op->calli; 1351 call_flags = args[nb_oargs + nb_iargs + 1]; 1352 1353 /* pure functions can be removed if their result is unused */ 1354 if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) { 1355 for (i = 0; i < nb_oargs; i++) { 1356 arg = args[i]; 1357 if (!dead_temps[arg] || mem_temps[arg]) { 1358 goto do_not_remove_call; 1359 } 1360 } 1361 goto do_remove; 1362 } else { 1363 do_not_remove_call: 1364 1365 /* output args are dead */ 1366 dead_args = 0; 1367 sync_args = 0; 1368 for (i = 0; i < nb_oargs; i++) { 1369 arg = args[i]; 1370 if (dead_temps[arg]) { 1371 dead_args |= (1 << i); 1372 } 1373 if (mem_temps[arg]) { 1374 sync_args |= (1 << i); 1375 } 1376 dead_temps[arg] = 1; 1377 mem_temps[arg] = 0; 1378 } 1379 1380 if (!(call_flags & TCG_CALL_NO_READ_GLOBALS)) { 1381 /* globals should be synced to memory */ 1382 memset(mem_temps, 1, s->nb_globals); 1383 } 1384 if (!(call_flags & (TCG_CALL_NO_WRITE_GLOBALS | 1385 TCG_CALL_NO_READ_GLOBALS))) { 1386 /* globals should go back to memory */ 1387 memset(dead_temps, 1, s->nb_globals); 1388 } 1389 1390 /* record arguments that die in this helper */ 1391 for (i = nb_oargs; i < nb_iargs + nb_oargs; i++) { 1392 arg = args[i]; 1393 if (arg != TCG_CALL_DUMMY_ARG) { 1394 if (dead_temps[arg]) { 1395 dead_args |= (1 << i); 1396 } 1397 } 1398 } 1399 /* input arguments are live for preceding opcodes */ 1400 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 1401 arg = args[i]; 1402 dead_temps[arg] = 0; 1403 } 1404 s->op_dead_args[oi] = dead_args; 1405 s->op_sync_args[oi] = sync_args; 1406 } 1407 } 1408 break; 1409 case INDEX_op_debug_insn_start: 1410 break; 1411 case INDEX_op_discard: 1412 /* mark the temporary as dead */ 1413 dead_temps[args[0]] = 1; 1414 mem_temps[args[0]] = 0; 1415 break; 1416 1417 case INDEX_op_add2_i32: 1418 opc_new = INDEX_op_add_i32; 1419 goto do_addsub2; 1420 case INDEX_op_sub2_i32: 1421 opc_new = INDEX_op_sub_i32; 1422 goto do_addsub2; 1423 case INDEX_op_add2_i64: 1424 opc_new = INDEX_op_add_i64; 1425 goto do_addsub2; 1426 case INDEX_op_sub2_i64: 1427 opc_new = INDEX_op_sub_i64; 1428 do_addsub2: 1429 nb_iargs = 4; 1430 nb_oargs = 2; 1431 /* Test if the high part of the operation is dead, but not 1432 the low part. The result can be optimized to a simple 1433 add or sub. This happens often for x86_64 guest when the 1434 cpu mode is set to 32 bit. */ 1435 if (dead_temps[args[1]] && !mem_temps[args[1]]) { 1436 if (dead_temps[args[0]] && !mem_temps[args[0]]) { 1437 goto do_remove; 1438 } 1439 /* Replace the opcode and adjust the args in place, 1440 leaving 3 unused args at the end. */ 1441 op->opc = opc = opc_new; 1442 args[1] = args[2]; 1443 args[2] = args[4]; 1444 /* Fall through and mark the single-word operation live. */ 1445 nb_iargs = 2; 1446 nb_oargs = 1; 1447 } 1448 goto do_not_remove; 1449 1450 case INDEX_op_mulu2_i32: 1451 opc_new = INDEX_op_mul_i32; 1452 opc_new2 = INDEX_op_muluh_i32; 1453 have_opc_new2 = TCG_TARGET_HAS_muluh_i32; 1454 goto do_mul2; 1455 case INDEX_op_muls2_i32: 1456 opc_new = INDEX_op_mul_i32; 1457 opc_new2 = INDEX_op_mulsh_i32; 1458 have_opc_new2 = TCG_TARGET_HAS_mulsh_i32; 1459 goto do_mul2; 1460 case INDEX_op_mulu2_i64: 1461 opc_new = INDEX_op_mul_i64; 1462 opc_new2 = INDEX_op_muluh_i64; 1463 have_opc_new2 = TCG_TARGET_HAS_muluh_i64; 1464 goto do_mul2; 1465 case INDEX_op_muls2_i64: 1466 opc_new = INDEX_op_mul_i64; 1467 opc_new2 = INDEX_op_mulsh_i64; 1468 have_opc_new2 = TCG_TARGET_HAS_mulsh_i64; 1469 goto do_mul2; 1470 do_mul2: 1471 nb_iargs = 2; 1472 nb_oargs = 2; 1473 if (dead_temps[args[1]] && !mem_temps[args[1]]) { 1474 if (dead_temps[args[0]] && !mem_temps[args[0]]) { 1475 /* Both parts of the operation are dead. */ 1476 goto do_remove; 1477 } 1478 /* The high part of the operation is dead; generate the low. */ 1479 op->opc = opc = opc_new; 1480 args[1] = args[2]; 1481 args[2] = args[3]; 1482 } else if (have_opc_new2 && dead_temps[args[0]] 1483 && !mem_temps[args[0]]) { 1484 /* The low part of the operation is dead; generate the high. */ 1485 op->opc = opc = opc_new2; 1486 args[0] = args[1]; 1487 args[1] = args[2]; 1488 args[2] = args[3]; 1489 } else { 1490 goto do_not_remove; 1491 } 1492 /* Mark the single-word operation live. */ 1493 nb_oargs = 1; 1494 goto do_not_remove; 1495 1496 default: 1497 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */ 1498 nb_iargs = def->nb_iargs; 1499 nb_oargs = def->nb_oargs; 1500 1501 /* Test if the operation can be removed because all 1502 its outputs are dead. We assume that nb_oargs == 0 1503 implies side effects */ 1504 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) { 1505 for (i = 0; i < nb_oargs; i++) { 1506 arg = args[i]; 1507 if (!dead_temps[arg] || mem_temps[arg]) { 1508 goto do_not_remove; 1509 } 1510 } 1511 do_remove: 1512 tcg_op_remove(s, op); 1513 } else { 1514 do_not_remove: 1515 /* output args are dead */ 1516 dead_args = 0; 1517 sync_args = 0; 1518 for (i = 0; i < nb_oargs; i++) { 1519 arg = args[i]; 1520 if (dead_temps[arg]) { 1521 dead_args |= (1 << i); 1522 } 1523 if (mem_temps[arg]) { 1524 sync_args |= (1 << i); 1525 } 1526 dead_temps[arg] = 1; 1527 mem_temps[arg] = 0; 1528 } 1529 1530 /* if end of basic block, update */ 1531 if (def->flags & TCG_OPF_BB_END) { 1532 tcg_la_bb_end(s, dead_temps, mem_temps); 1533 } else if (def->flags & TCG_OPF_SIDE_EFFECTS) { 1534 /* globals should be synced to memory */ 1535 memset(mem_temps, 1, s->nb_globals); 1536 } 1537 1538 /* record arguments that die in this opcode */ 1539 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 1540 arg = args[i]; 1541 if (dead_temps[arg]) { 1542 dead_args |= (1 << i); 1543 } 1544 } 1545 /* input arguments are live for preceding opcodes */ 1546 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 1547 arg = args[i]; 1548 dead_temps[arg] = 0; 1549 } 1550 s->op_dead_args[oi] = dead_args; 1551 s->op_sync_args[oi] = sync_args; 1552 } 1553 break; 1554 } 1555 } 1556 } 1557 #else 1558 /* dummy liveness analysis */ 1559 static void tcg_liveness_analysis(TCGContext *s) 1560 { 1561 int nb_ops; 1562 nb_ops = s->gen_opc_ptr - s->gen_opc_buf; 1563 1564 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); 1565 memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t)); 1566 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); 1567 memset(s->op_sync_args, 0, nb_ops * sizeof(uint8_t)); 1568 } 1569 #endif 1570 1571 #ifndef NDEBUG 1572 static void dump_regs(TCGContext *s) 1573 { 1574 TCGTemp *ts; 1575 int i; 1576 char buf[64]; 1577 1578 for(i = 0; i < s->nb_temps; i++) { 1579 ts = &s->temps[i]; 1580 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i)); 1581 switch(ts->val_type) { 1582 case TEMP_VAL_REG: 1583 printf("%s", tcg_target_reg_names[ts->reg]); 1584 break; 1585 case TEMP_VAL_MEM: 1586 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]); 1587 break; 1588 case TEMP_VAL_CONST: 1589 printf("$0x%" TCG_PRIlx, ts->val); 1590 break; 1591 case TEMP_VAL_DEAD: 1592 printf("D"); 1593 break; 1594 default: 1595 printf("???"); 1596 break; 1597 } 1598 printf("\n"); 1599 } 1600 1601 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 1602 if (s->reg_to_temp[i] >= 0) { 1603 printf("%s: %s\n", 1604 tcg_target_reg_names[i], 1605 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i])); 1606 } 1607 } 1608 } 1609 1610 static void check_regs(TCGContext *s) 1611 { 1612 int reg, k; 1613 TCGTemp *ts; 1614 char buf[64]; 1615 1616 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 1617 k = s->reg_to_temp[reg]; 1618 if (k >= 0) { 1619 ts = &s->temps[k]; 1620 if (ts->val_type != TEMP_VAL_REG || 1621 ts->reg != reg) { 1622 printf("Inconsistency for register %s:\n", 1623 tcg_target_reg_names[reg]); 1624 goto fail; 1625 } 1626 } 1627 } 1628 for(k = 0; k < s->nb_temps; k++) { 1629 ts = &s->temps[k]; 1630 if (ts->val_type == TEMP_VAL_REG && 1631 !ts->fixed_reg && 1632 s->reg_to_temp[ts->reg] != k) { 1633 printf("Inconsistency for temp %s:\n", 1634 tcg_get_arg_str_idx(s, buf, sizeof(buf), k)); 1635 fail: 1636 printf("reg state:\n"); 1637 dump_regs(s); 1638 tcg_abort(); 1639 } 1640 } 1641 } 1642 #endif 1643 1644 static void temp_allocate_frame(TCGContext *s, int temp) 1645 { 1646 TCGTemp *ts; 1647 ts = &s->temps[temp]; 1648 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64) 1649 /* Sparc64 stack is accessed with offset of 2047 */ 1650 s->current_frame_offset = (s->current_frame_offset + 1651 (tcg_target_long)sizeof(tcg_target_long) - 1) & 1652 ~(sizeof(tcg_target_long) - 1); 1653 #endif 1654 if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) > 1655 s->frame_end) { 1656 tcg_abort(); 1657 } 1658 ts->mem_offset = s->current_frame_offset; 1659 ts->mem_reg = s->frame_reg; 1660 ts->mem_allocated = 1; 1661 s->current_frame_offset += sizeof(tcg_target_long); 1662 } 1663 1664 /* sync register 'reg' by saving it to the corresponding temporary */ 1665 static inline void tcg_reg_sync(TCGContext *s, int reg) 1666 { 1667 TCGTemp *ts; 1668 int temp; 1669 1670 temp = s->reg_to_temp[reg]; 1671 ts = &s->temps[temp]; 1672 assert(ts->val_type == TEMP_VAL_REG); 1673 if (!ts->mem_coherent && !ts->fixed_reg) { 1674 if (!ts->mem_allocated) { 1675 temp_allocate_frame(s, temp); 1676 } 1677 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 1678 } 1679 ts->mem_coherent = 1; 1680 } 1681 1682 /* free register 'reg' by spilling the corresponding temporary if necessary */ 1683 static void tcg_reg_free(TCGContext *s, int reg) 1684 { 1685 int temp; 1686 1687 temp = s->reg_to_temp[reg]; 1688 if (temp != -1) { 1689 tcg_reg_sync(s, reg); 1690 s->temps[temp].val_type = TEMP_VAL_MEM; 1691 s->reg_to_temp[reg] = -1; 1692 } 1693 } 1694 1695 /* Allocate a register belonging to reg1 & ~reg2 */ 1696 static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2) 1697 { 1698 int i, reg; 1699 TCGRegSet reg_ct; 1700 1701 tcg_regset_andnot(reg_ct, reg1, reg2); 1702 1703 /* first try free registers */ 1704 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { 1705 reg = tcg_target_reg_alloc_order[i]; 1706 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1) 1707 return reg; 1708 } 1709 1710 /* XXX: do better spill choice */ 1711 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { 1712 reg = tcg_target_reg_alloc_order[i]; 1713 if (tcg_regset_test_reg(reg_ct, reg)) { 1714 tcg_reg_free(s, reg); 1715 return reg; 1716 } 1717 } 1718 1719 tcg_abort(); 1720 } 1721 1722 /* mark a temporary as dead. */ 1723 static inline void temp_dead(TCGContext *s, int temp) 1724 { 1725 TCGTemp *ts; 1726 1727 ts = &s->temps[temp]; 1728 if (!ts->fixed_reg) { 1729 if (ts->val_type == TEMP_VAL_REG) { 1730 s->reg_to_temp[ts->reg] = -1; 1731 } 1732 if (temp < s->nb_globals || ts->temp_local) { 1733 ts->val_type = TEMP_VAL_MEM; 1734 } else { 1735 ts->val_type = TEMP_VAL_DEAD; 1736 } 1737 } 1738 } 1739 1740 /* sync a temporary to memory. 'allocated_regs' is used in case a 1741 temporary registers needs to be allocated to store a constant. */ 1742 static inline void temp_sync(TCGContext *s, int temp, TCGRegSet allocated_regs) 1743 { 1744 TCGTemp *ts; 1745 1746 ts = &s->temps[temp]; 1747 if (!ts->fixed_reg) { 1748 switch(ts->val_type) { 1749 case TEMP_VAL_CONST: 1750 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 1751 allocated_regs); 1752 ts->val_type = TEMP_VAL_REG; 1753 s->reg_to_temp[ts->reg] = temp; 1754 ts->mem_coherent = 0; 1755 tcg_out_movi(s, ts->type, ts->reg, ts->val); 1756 /* fallthrough*/ 1757 case TEMP_VAL_REG: 1758 tcg_reg_sync(s, ts->reg); 1759 break; 1760 case TEMP_VAL_DEAD: 1761 case TEMP_VAL_MEM: 1762 break; 1763 default: 1764 tcg_abort(); 1765 } 1766 } 1767 } 1768 1769 /* save a temporary to memory. 'allocated_regs' is used in case a 1770 temporary registers needs to be allocated to store a constant. */ 1771 static inline void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs) 1772 { 1773 #ifdef USE_LIVENESS_ANALYSIS 1774 /* The liveness analysis already ensures that globals are back 1775 in memory. Keep an assert for safety. */ 1776 assert(s->temps[temp].val_type == TEMP_VAL_MEM || s->temps[temp].fixed_reg); 1777 #else 1778 temp_sync(s, temp, allocated_regs); 1779 temp_dead(s, temp); 1780 #endif 1781 } 1782 1783 /* save globals to their canonical location and assume they can be 1784 modified be the following code. 'allocated_regs' is used in case a 1785 temporary registers needs to be allocated to store a constant. */ 1786 static void save_globals(TCGContext *s, TCGRegSet allocated_regs) 1787 { 1788 int i; 1789 1790 for(i = 0; i < s->nb_globals; i++) { 1791 temp_save(s, i, allocated_regs); 1792 } 1793 } 1794 1795 /* sync globals to their canonical location and assume they can be 1796 read by the following code. 'allocated_regs' is used in case a 1797 temporary registers needs to be allocated to store a constant. */ 1798 static void sync_globals(TCGContext *s, TCGRegSet allocated_regs) 1799 { 1800 int i; 1801 1802 for (i = 0; i < s->nb_globals; i++) { 1803 #ifdef USE_LIVENESS_ANALYSIS 1804 assert(s->temps[i].val_type != TEMP_VAL_REG || s->temps[i].fixed_reg || 1805 s->temps[i].mem_coherent); 1806 #else 1807 temp_sync(s, i, allocated_regs); 1808 #endif 1809 } 1810 } 1811 1812 /* at the end of a basic block, we assume all temporaries are dead and 1813 all globals are stored at their canonical location. */ 1814 static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs) 1815 { 1816 TCGTemp *ts; 1817 int i; 1818 1819 for(i = s->nb_globals; i < s->nb_temps; i++) { 1820 ts = &s->temps[i]; 1821 if (ts->temp_local) { 1822 temp_save(s, i, allocated_regs); 1823 } else { 1824 #ifdef USE_LIVENESS_ANALYSIS 1825 /* The liveness analysis already ensures that temps are dead. 1826 Keep an assert for safety. */ 1827 assert(ts->val_type == TEMP_VAL_DEAD); 1828 #else 1829 temp_dead(s, i); 1830 #endif 1831 } 1832 } 1833 1834 save_globals(s, allocated_regs); 1835 } 1836 1837 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1) 1838 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1) 1839 1840 static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args, 1841 uint16_t dead_args, uint8_t sync_args) 1842 { 1843 TCGTemp *ots; 1844 tcg_target_ulong val; 1845 1846 ots = &s->temps[args[0]]; 1847 val = args[1]; 1848 1849 if (ots->fixed_reg) { 1850 /* for fixed registers, we do not do any constant 1851 propagation */ 1852 tcg_out_movi(s, ots->type, ots->reg, val); 1853 } else { 1854 /* The movi is not explicitly generated here */ 1855 if (ots->val_type == TEMP_VAL_REG) 1856 s->reg_to_temp[ots->reg] = -1; 1857 ots->val_type = TEMP_VAL_CONST; 1858 ots->val = val; 1859 } 1860 if (NEED_SYNC_ARG(0)) { 1861 temp_sync(s, args[0], s->reserved_regs); 1862 } 1863 if (IS_DEAD_ARG(0)) { 1864 temp_dead(s, args[0]); 1865 } 1866 } 1867 1868 static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def, 1869 const TCGArg *args, uint16_t dead_args, 1870 uint8_t sync_args) 1871 { 1872 TCGRegSet allocated_regs; 1873 TCGTemp *ts, *ots; 1874 TCGType otype, itype; 1875 1876 tcg_regset_set(allocated_regs, s->reserved_regs); 1877 ots = &s->temps[args[0]]; 1878 ts = &s->temps[args[1]]; 1879 1880 /* Note that otype != itype for no-op truncation. */ 1881 otype = ots->type; 1882 itype = ts->type; 1883 1884 /* If the source value is not in a register, and we're going to be 1885 forced to have it in a register in order to perform the copy, 1886 then copy the SOURCE value into its own register first. That way 1887 we don't have to reload SOURCE the next time it is used. */ 1888 if (((NEED_SYNC_ARG(0) || ots->fixed_reg) && ts->val_type != TEMP_VAL_REG) 1889 || ts->val_type == TEMP_VAL_MEM) { 1890 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[itype], 1891 allocated_regs); 1892 if (ts->val_type == TEMP_VAL_MEM) { 1893 tcg_out_ld(s, itype, ts->reg, ts->mem_reg, ts->mem_offset); 1894 ts->mem_coherent = 1; 1895 } else if (ts->val_type == TEMP_VAL_CONST) { 1896 tcg_out_movi(s, itype, ts->reg, ts->val); 1897 ts->mem_coherent = 0; 1898 } 1899 s->reg_to_temp[ts->reg] = args[1]; 1900 ts->val_type = TEMP_VAL_REG; 1901 } 1902 1903 if (IS_DEAD_ARG(0) && !ots->fixed_reg) { 1904 /* mov to a non-saved dead register makes no sense (even with 1905 liveness analysis disabled). */ 1906 assert(NEED_SYNC_ARG(0)); 1907 /* The code above should have moved the temp to a register. */ 1908 assert(ts->val_type == TEMP_VAL_REG); 1909 if (!ots->mem_allocated) { 1910 temp_allocate_frame(s, args[0]); 1911 } 1912 tcg_out_st(s, otype, ts->reg, ots->mem_reg, ots->mem_offset); 1913 if (IS_DEAD_ARG(1)) { 1914 temp_dead(s, args[1]); 1915 } 1916 temp_dead(s, args[0]); 1917 } else if (ts->val_type == TEMP_VAL_CONST) { 1918 /* propagate constant */ 1919 if (ots->val_type == TEMP_VAL_REG) { 1920 s->reg_to_temp[ots->reg] = -1; 1921 } 1922 ots->val_type = TEMP_VAL_CONST; 1923 ots->val = ts->val; 1924 if (IS_DEAD_ARG(1)) { 1925 temp_dead(s, args[1]); 1926 } 1927 } else { 1928 /* The code in the first if block should have moved the 1929 temp to a register. */ 1930 assert(ts->val_type == TEMP_VAL_REG); 1931 if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) { 1932 /* the mov can be suppressed */ 1933 if (ots->val_type == TEMP_VAL_REG) { 1934 s->reg_to_temp[ots->reg] = -1; 1935 } 1936 ots->reg = ts->reg; 1937 temp_dead(s, args[1]); 1938 } else { 1939 if (ots->val_type != TEMP_VAL_REG) { 1940 /* When allocating a new register, make sure to not spill the 1941 input one. */ 1942 tcg_regset_set_reg(allocated_regs, ts->reg); 1943 ots->reg = tcg_reg_alloc(s, tcg_target_available_regs[otype], 1944 allocated_regs); 1945 } 1946 tcg_out_mov(s, otype, ots->reg, ts->reg); 1947 } 1948 ots->val_type = TEMP_VAL_REG; 1949 ots->mem_coherent = 0; 1950 s->reg_to_temp[ots->reg] = args[0]; 1951 if (NEED_SYNC_ARG(0)) { 1952 tcg_reg_sync(s, ots->reg); 1953 } 1954 } 1955 } 1956 1957 static void tcg_reg_alloc_op(TCGContext *s, 1958 const TCGOpDef *def, TCGOpcode opc, 1959 const TCGArg *args, uint16_t dead_args, 1960 uint8_t sync_args) 1961 { 1962 TCGRegSet allocated_regs; 1963 int i, k, nb_iargs, nb_oargs, reg; 1964 TCGArg arg; 1965 const TCGArgConstraint *arg_ct; 1966 TCGTemp *ts; 1967 TCGArg new_args[TCG_MAX_OP_ARGS]; 1968 int const_args[TCG_MAX_OP_ARGS]; 1969 1970 nb_oargs = def->nb_oargs; 1971 nb_iargs = def->nb_iargs; 1972 1973 /* copy constants */ 1974 memcpy(new_args + nb_oargs + nb_iargs, 1975 args + nb_oargs + nb_iargs, 1976 sizeof(TCGArg) * def->nb_cargs); 1977 1978 /* satisfy input constraints */ 1979 tcg_regset_set(allocated_regs, s->reserved_regs); 1980 for(k = 0; k < nb_iargs; k++) { 1981 i = def->sorted_args[nb_oargs + k]; 1982 arg = args[i]; 1983 arg_ct = &def->args_ct[i]; 1984 ts = &s->temps[arg]; 1985 if (ts->val_type == TEMP_VAL_MEM) { 1986 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 1987 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 1988 ts->val_type = TEMP_VAL_REG; 1989 ts->reg = reg; 1990 ts->mem_coherent = 1; 1991 s->reg_to_temp[reg] = arg; 1992 } else if (ts->val_type == TEMP_VAL_CONST) { 1993 if (tcg_target_const_match(ts->val, ts->type, arg_ct)) { 1994 /* constant is OK for instruction */ 1995 const_args[i] = 1; 1996 new_args[i] = ts->val; 1997 goto iarg_end; 1998 } else { 1999 /* need to move to a register */ 2000 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2001 tcg_out_movi(s, ts->type, reg, ts->val); 2002 ts->val_type = TEMP_VAL_REG; 2003 ts->reg = reg; 2004 ts->mem_coherent = 0; 2005 s->reg_to_temp[reg] = arg; 2006 } 2007 } 2008 assert(ts->val_type == TEMP_VAL_REG); 2009 if (arg_ct->ct & TCG_CT_IALIAS) { 2010 if (ts->fixed_reg) { 2011 /* if fixed register, we must allocate a new register 2012 if the alias is not the same register */ 2013 if (arg != args[arg_ct->alias_index]) 2014 goto allocate_in_reg; 2015 } else { 2016 /* if the input is aliased to an output and if it is 2017 not dead after the instruction, we must allocate 2018 a new register and move it */ 2019 if (!IS_DEAD_ARG(i)) { 2020 goto allocate_in_reg; 2021 } 2022 /* check if the current register has already been allocated 2023 for another input aliased to an output */ 2024 int k2, i2; 2025 for (k2 = 0 ; k2 < k ; k2++) { 2026 i2 = def->sorted_args[nb_oargs + k2]; 2027 if ((def->args_ct[i2].ct & TCG_CT_IALIAS) && 2028 (new_args[i2] == ts->reg)) { 2029 goto allocate_in_reg; 2030 } 2031 } 2032 } 2033 } 2034 reg = ts->reg; 2035 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) { 2036 /* nothing to do : the constraint is satisfied */ 2037 } else { 2038 allocate_in_reg: 2039 /* allocate a new register matching the constraint 2040 and move the temporary register into it */ 2041 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2042 tcg_out_mov(s, ts->type, reg, ts->reg); 2043 } 2044 new_args[i] = reg; 2045 const_args[i] = 0; 2046 tcg_regset_set_reg(allocated_regs, reg); 2047 iarg_end: ; 2048 } 2049 2050 /* mark dead temporaries and free the associated registers */ 2051 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 2052 if (IS_DEAD_ARG(i)) { 2053 temp_dead(s, args[i]); 2054 } 2055 } 2056 2057 if (def->flags & TCG_OPF_BB_END) { 2058 tcg_reg_alloc_bb_end(s, allocated_regs); 2059 } else { 2060 if (def->flags & TCG_OPF_CALL_CLOBBER) { 2061 /* XXX: permit generic clobber register list ? */ 2062 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 2063 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { 2064 tcg_reg_free(s, reg); 2065 } 2066 } 2067 } 2068 if (def->flags & TCG_OPF_SIDE_EFFECTS) { 2069 /* sync globals if the op has side effects and might trigger 2070 an exception. */ 2071 sync_globals(s, allocated_regs); 2072 } 2073 2074 /* satisfy the output constraints */ 2075 tcg_regset_set(allocated_regs, s->reserved_regs); 2076 for(k = 0; k < nb_oargs; k++) { 2077 i = def->sorted_args[k]; 2078 arg = args[i]; 2079 arg_ct = &def->args_ct[i]; 2080 ts = &s->temps[arg]; 2081 if (arg_ct->ct & TCG_CT_ALIAS) { 2082 reg = new_args[arg_ct->alias_index]; 2083 } else { 2084 /* if fixed register, we try to use it */ 2085 reg = ts->reg; 2086 if (ts->fixed_reg && 2087 tcg_regset_test_reg(arg_ct->u.regs, reg)) { 2088 goto oarg_end; 2089 } 2090 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2091 } 2092 tcg_regset_set_reg(allocated_regs, reg); 2093 /* if a fixed register is used, then a move will be done afterwards */ 2094 if (!ts->fixed_reg) { 2095 if (ts->val_type == TEMP_VAL_REG) { 2096 s->reg_to_temp[ts->reg] = -1; 2097 } 2098 ts->val_type = TEMP_VAL_REG; 2099 ts->reg = reg; 2100 /* temp value is modified, so the value kept in memory is 2101 potentially not the same */ 2102 ts->mem_coherent = 0; 2103 s->reg_to_temp[reg] = arg; 2104 } 2105 oarg_end: 2106 new_args[i] = reg; 2107 } 2108 } 2109 2110 /* emit instruction */ 2111 tcg_out_op(s, opc, new_args, const_args); 2112 2113 /* move the outputs in the correct register if needed */ 2114 for(i = 0; i < nb_oargs; i++) { 2115 ts = &s->temps[args[i]]; 2116 reg = new_args[i]; 2117 if (ts->fixed_reg && ts->reg != reg) { 2118 tcg_out_mov(s, ts->type, ts->reg, reg); 2119 } 2120 if (NEED_SYNC_ARG(i)) { 2121 tcg_reg_sync(s, reg); 2122 } 2123 if (IS_DEAD_ARG(i)) { 2124 temp_dead(s, args[i]); 2125 } 2126 } 2127 } 2128 2129 #ifdef TCG_TARGET_STACK_GROWSUP 2130 #define STACK_DIR(x) (-(x)) 2131 #else 2132 #define STACK_DIR(x) (x) 2133 #endif 2134 2135 static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs, 2136 const TCGArg * const args, uint16_t dead_args, 2137 uint8_t sync_args) 2138 { 2139 int flags, nb_regs, i, reg; 2140 TCGArg arg; 2141 TCGTemp *ts; 2142 intptr_t stack_offset; 2143 size_t call_stack_size; 2144 tcg_insn_unit *func_addr; 2145 int allocate_args; 2146 TCGRegSet allocated_regs; 2147 2148 func_addr = (tcg_insn_unit *)(intptr_t)args[nb_oargs + nb_iargs]; 2149 flags = args[nb_oargs + nb_iargs + 1]; 2150 2151 nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs); 2152 if (nb_regs > nb_iargs) { 2153 nb_regs = nb_iargs; 2154 } 2155 2156 /* assign stack slots first */ 2157 call_stack_size = (nb_iargs - nb_regs) * sizeof(tcg_target_long); 2158 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) & 2159 ~(TCG_TARGET_STACK_ALIGN - 1); 2160 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE); 2161 if (allocate_args) { 2162 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed, 2163 preallocate call stack */ 2164 tcg_abort(); 2165 } 2166 2167 stack_offset = TCG_TARGET_CALL_STACK_OFFSET; 2168 for(i = nb_regs; i < nb_iargs; i++) { 2169 arg = args[nb_oargs + i]; 2170 #ifdef TCG_TARGET_STACK_GROWSUP 2171 stack_offset -= sizeof(tcg_target_long); 2172 #endif 2173 if (arg != TCG_CALL_DUMMY_ARG) { 2174 ts = &s->temps[arg]; 2175 if (ts->val_type == TEMP_VAL_REG) { 2176 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset); 2177 } else if (ts->val_type == TEMP_VAL_MEM) { 2178 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 2179 s->reserved_regs); 2180 /* XXX: not correct if reading values from the stack */ 2181 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2182 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); 2183 } else if (ts->val_type == TEMP_VAL_CONST) { 2184 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 2185 s->reserved_regs); 2186 /* XXX: sign extend may be needed on some targets */ 2187 tcg_out_movi(s, ts->type, reg, ts->val); 2188 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); 2189 } else { 2190 tcg_abort(); 2191 } 2192 } 2193 #ifndef TCG_TARGET_STACK_GROWSUP 2194 stack_offset += sizeof(tcg_target_long); 2195 #endif 2196 } 2197 2198 /* assign input registers */ 2199 tcg_regset_set(allocated_regs, s->reserved_regs); 2200 for(i = 0; i < nb_regs; i++) { 2201 arg = args[nb_oargs + i]; 2202 if (arg != TCG_CALL_DUMMY_ARG) { 2203 ts = &s->temps[arg]; 2204 reg = tcg_target_call_iarg_regs[i]; 2205 tcg_reg_free(s, reg); 2206 if (ts->val_type == TEMP_VAL_REG) { 2207 if (ts->reg != reg) { 2208 tcg_out_mov(s, ts->type, reg, ts->reg); 2209 } 2210 } else if (ts->val_type == TEMP_VAL_MEM) { 2211 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2212 } else if (ts->val_type == TEMP_VAL_CONST) { 2213 /* XXX: sign extend ? */ 2214 tcg_out_movi(s, ts->type, reg, ts->val); 2215 } else { 2216 tcg_abort(); 2217 } 2218 tcg_regset_set_reg(allocated_regs, reg); 2219 } 2220 } 2221 2222 /* mark dead temporaries and free the associated registers */ 2223 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) { 2224 if (IS_DEAD_ARG(i)) { 2225 temp_dead(s, args[i]); 2226 } 2227 } 2228 2229 /* clobber call registers */ 2230 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 2231 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { 2232 tcg_reg_free(s, reg); 2233 } 2234 } 2235 2236 /* Save globals if they might be written by the helper, sync them if 2237 they might be read. */ 2238 if (flags & TCG_CALL_NO_READ_GLOBALS) { 2239 /* Nothing to do */ 2240 } else if (flags & TCG_CALL_NO_WRITE_GLOBALS) { 2241 sync_globals(s, allocated_regs); 2242 } else { 2243 save_globals(s, allocated_regs); 2244 } 2245 2246 tcg_out_call(s, func_addr); 2247 2248 /* assign output registers and emit moves if needed */ 2249 for(i = 0; i < nb_oargs; i++) { 2250 arg = args[i]; 2251 ts = &s->temps[arg]; 2252 reg = tcg_target_call_oarg_regs[i]; 2253 assert(s->reg_to_temp[reg] == -1); 2254 2255 if (ts->fixed_reg) { 2256 if (ts->reg != reg) { 2257 tcg_out_mov(s, ts->type, ts->reg, reg); 2258 } 2259 } else { 2260 if (ts->val_type == TEMP_VAL_REG) { 2261 s->reg_to_temp[ts->reg] = -1; 2262 } 2263 ts->val_type = TEMP_VAL_REG; 2264 ts->reg = reg; 2265 ts->mem_coherent = 0; 2266 s->reg_to_temp[reg] = arg; 2267 if (NEED_SYNC_ARG(i)) { 2268 tcg_reg_sync(s, reg); 2269 } 2270 if (IS_DEAD_ARG(i)) { 2271 temp_dead(s, args[i]); 2272 } 2273 } 2274 } 2275 } 2276 2277 #ifdef CONFIG_PROFILER 2278 2279 static int64_t tcg_table_op_count[NB_OPS]; 2280 2281 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf) 2282 { 2283 int i; 2284 2285 for (i = 0; i < NB_OPS; i++) { 2286 cpu_fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, 2287 tcg_table_op_count[i]); 2288 } 2289 } 2290 #else 2291 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf) 2292 { 2293 cpu_fprintf(f, "[TCG profiler not compiled]\n"); 2294 } 2295 #endif 2296 2297 2298 static inline int tcg_gen_code_common(TCGContext *s, 2299 tcg_insn_unit *gen_code_buf, 2300 long search_pc) 2301 { 2302 int oi, oi_next; 2303 2304 #ifdef DEBUG_DISAS 2305 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { 2306 qemu_log("OP:\n"); 2307 tcg_dump_ops(s); 2308 qemu_log("\n"); 2309 } 2310 #endif 2311 2312 #ifdef CONFIG_PROFILER 2313 s->opt_time -= profile_getclock(); 2314 #endif 2315 2316 #ifdef USE_TCG_OPTIMIZATIONS 2317 tcg_optimize(s); 2318 #endif 2319 2320 #ifdef CONFIG_PROFILER 2321 s->opt_time += profile_getclock(); 2322 s->la_time -= profile_getclock(); 2323 #endif 2324 2325 tcg_liveness_analysis(s); 2326 2327 #ifdef CONFIG_PROFILER 2328 s->la_time += profile_getclock(); 2329 #endif 2330 2331 #ifdef DEBUG_DISAS 2332 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) { 2333 qemu_log("OP after optimization and liveness analysis:\n"); 2334 tcg_dump_ops(s); 2335 qemu_log("\n"); 2336 } 2337 #endif 2338 2339 tcg_reg_alloc_start(s); 2340 2341 s->code_buf = gen_code_buf; 2342 s->code_ptr = gen_code_buf; 2343 2344 tcg_out_tb_init(s); 2345 2346 for (oi = s->gen_first_op_idx; oi >= 0; oi = oi_next) { 2347 TCGOp * const op = &s->gen_op_buf[oi]; 2348 TCGArg * const args = &s->gen_opparam_buf[op->args]; 2349 TCGOpcode opc = op->opc; 2350 const TCGOpDef *def = &tcg_op_defs[opc]; 2351 uint16_t dead_args = s->op_dead_args[oi]; 2352 uint8_t sync_args = s->op_sync_args[oi]; 2353 2354 oi_next = op->next; 2355 #ifdef CONFIG_PROFILER 2356 tcg_table_op_count[opc]++; 2357 #endif 2358 2359 switch (opc) { 2360 case INDEX_op_mov_i32: 2361 case INDEX_op_mov_i64: 2362 tcg_reg_alloc_mov(s, def, args, dead_args, sync_args); 2363 break; 2364 case INDEX_op_movi_i32: 2365 case INDEX_op_movi_i64: 2366 tcg_reg_alloc_movi(s, args, dead_args, sync_args); 2367 break; 2368 case INDEX_op_debug_insn_start: 2369 break; 2370 case INDEX_op_discard: 2371 temp_dead(s, args[0]); 2372 break; 2373 case INDEX_op_set_label: 2374 tcg_reg_alloc_bb_end(s, s->reserved_regs); 2375 tcg_out_label(s, arg_label(args[0]), s->code_ptr); 2376 break; 2377 case INDEX_op_call: 2378 tcg_reg_alloc_call(s, op->callo, op->calli, args, 2379 dead_args, sync_args); 2380 break; 2381 default: 2382 /* Sanity check that we've not introduced any unhandled opcodes. */ 2383 if (def->flags & TCG_OPF_NOT_PRESENT) { 2384 tcg_abort(); 2385 } 2386 /* Note: in order to speed up the code, it would be much 2387 faster to have specialized register allocator functions for 2388 some common argument patterns */ 2389 tcg_reg_alloc_op(s, def, opc, args, dead_args, sync_args); 2390 break; 2391 } 2392 if (search_pc >= 0 && search_pc < tcg_current_code_size(s)) { 2393 return oi; 2394 } 2395 #ifndef NDEBUG 2396 check_regs(s); 2397 #endif 2398 } 2399 2400 /* Generate TB finalization at the end of block */ 2401 tcg_out_tb_finalize(s); 2402 return -1; 2403 } 2404 2405 int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf) 2406 { 2407 #ifdef CONFIG_PROFILER 2408 { 2409 int n; 2410 2411 n = s->gen_last_op_idx + 1; 2412 s->op_count += n; 2413 if (n > s->op_count_max) { 2414 s->op_count_max = n; 2415 } 2416 2417 n = s->nb_temps; 2418 s->temp_count += n; 2419 if (n > s->temp_count_max) { 2420 s->temp_count_max = n; 2421 } 2422 } 2423 #endif 2424 2425 tcg_gen_code_common(s, gen_code_buf, -1); 2426 2427 /* flush instruction cache */ 2428 flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr); 2429 2430 return tcg_current_code_size(s); 2431 } 2432 2433 /* Return the index of the micro operation such as the pc after is < 2434 offset bytes from the start of the TB. The contents of gen_code_buf must 2435 not be changed, though writing the same values is ok. 2436 Return -1 if not found. */ 2437 int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf, 2438 long offset) 2439 { 2440 return tcg_gen_code_common(s, gen_code_buf, offset); 2441 } 2442 2443 #ifdef CONFIG_PROFILER 2444 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) 2445 { 2446 TCGContext *s = &tcg_ctx; 2447 int64_t tot; 2448 2449 tot = s->interm_time + s->code_time; 2450 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n", 2451 tot, tot / 2.4e9); 2452 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n", 2453 s->tb_count, 2454 s->tb_count1 - s->tb_count, 2455 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0); 2456 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n", 2457 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max); 2458 cpu_fprintf(f, "deleted ops/TB %0.2f\n", 2459 s->tb_count ? 2460 (double)s->del_op_count / s->tb_count : 0); 2461 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n", 2462 s->tb_count ? 2463 (double)s->temp_count / s->tb_count : 0, 2464 s->temp_count_max); 2465 2466 cpu_fprintf(f, "cycles/op %0.1f\n", 2467 s->op_count ? (double)tot / s->op_count : 0); 2468 cpu_fprintf(f, "cycles/in byte %0.1f\n", 2469 s->code_in_len ? (double)tot / s->code_in_len : 0); 2470 cpu_fprintf(f, "cycles/out byte %0.1f\n", 2471 s->code_out_len ? (double)tot / s->code_out_len : 0); 2472 if (tot == 0) 2473 tot = 1; 2474 cpu_fprintf(f, " gen_interm time %0.1f%%\n", 2475 (double)s->interm_time / tot * 100.0); 2476 cpu_fprintf(f, " gen_code time %0.1f%%\n", 2477 (double)s->code_time / tot * 100.0); 2478 cpu_fprintf(f, "optim./code time %0.1f%%\n", 2479 (double)s->opt_time / (s->code_time ? s->code_time : 1) 2480 * 100.0); 2481 cpu_fprintf(f, "liveness/code time %0.1f%%\n", 2482 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0); 2483 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n", 2484 s->restore_count); 2485 cpu_fprintf(f, " avg cycles %0.1f\n", 2486 s->restore_count ? (double)s->restore_time / s->restore_count : 0); 2487 } 2488 #else 2489 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) 2490 { 2491 cpu_fprintf(f, "[TCG profiler not compiled]\n"); 2492 } 2493 #endif 2494 2495 #ifdef ELF_HOST_MACHINE 2496 /* In order to use this feature, the backend needs to do three things: 2497 2498 (1) Define ELF_HOST_MACHINE to indicate both what value to 2499 put into the ELF image and to indicate support for the feature. 2500 2501 (2) Define tcg_register_jit. This should create a buffer containing 2502 the contents of a .debug_frame section that describes the post- 2503 prologue unwind info for the tcg machine. 2504 2505 (3) Call tcg_register_jit_int, with the constructed .debug_frame. 2506 */ 2507 2508 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */ 2509 typedef enum { 2510 JIT_NOACTION = 0, 2511 JIT_REGISTER_FN, 2512 JIT_UNREGISTER_FN 2513 } jit_actions_t; 2514 2515 struct jit_code_entry { 2516 struct jit_code_entry *next_entry; 2517 struct jit_code_entry *prev_entry; 2518 const void *symfile_addr; 2519 uint64_t symfile_size; 2520 }; 2521 2522 struct jit_descriptor { 2523 uint32_t version; 2524 uint32_t action_flag; 2525 struct jit_code_entry *relevant_entry; 2526 struct jit_code_entry *first_entry; 2527 }; 2528 2529 void __jit_debug_register_code(void) __attribute__((noinline)); 2530 void __jit_debug_register_code(void) 2531 { 2532 asm(""); 2533 } 2534 2535 /* Must statically initialize the version, because GDB may check 2536 the version before we can set it. */ 2537 struct jit_descriptor __jit_debug_descriptor = { 1, 0, 0, 0 }; 2538 2539 /* End GDB interface. */ 2540 2541 static int find_string(const char *strtab, const char *str) 2542 { 2543 const char *p = strtab + 1; 2544 2545 while (1) { 2546 if (strcmp(p, str) == 0) { 2547 return p - strtab; 2548 } 2549 p += strlen(p) + 1; 2550 } 2551 } 2552 2553 static void tcg_register_jit_int(void *buf_ptr, size_t buf_size, 2554 const void *debug_frame, 2555 size_t debug_frame_size) 2556 { 2557 struct __attribute__((packed)) DebugInfo { 2558 uint32_t len; 2559 uint16_t version; 2560 uint32_t abbrev; 2561 uint8_t ptr_size; 2562 uint8_t cu_die; 2563 uint16_t cu_lang; 2564 uintptr_t cu_low_pc; 2565 uintptr_t cu_high_pc; 2566 uint8_t fn_die; 2567 char fn_name[16]; 2568 uintptr_t fn_low_pc; 2569 uintptr_t fn_high_pc; 2570 uint8_t cu_eoc; 2571 }; 2572 2573 struct ElfImage { 2574 ElfW(Ehdr) ehdr; 2575 ElfW(Phdr) phdr; 2576 ElfW(Shdr) shdr[7]; 2577 ElfW(Sym) sym[2]; 2578 struct DebugInfo di; 2579 uint8_t da[24]; 2580 char str[80]; 2581 }; 2582 2583 struct ElfImage *img; 2584 2585 static const struct ElfImage img_template = { 2586 .ehdr = { 2587 .e_ident[EI_MAG0] = ELFMAG0, 2588 .e_ident[EI_MAG1] = ELFMAG1, 2589 .e_ident[EI_MAG2] = ELFMAG2, 2590 .e_ident[EI_MAG3] = ELFMAG3, 2591 .e_ident[EI_CLASS] = ELF_CLASS, 2592 .e_ident[EI_DATA] = ELF_DATA, 2593 .e_ident[EI_VERSION] = EV_CURRENT, 2594 .e_type = ET_EXEC, 2595 .e_machine = ELF_HOST_MACHINE, 2596 .e_version = EV_CURRENT, 2597 .e_phoff = offsetof(struct ElfImage, phdr), 2598 .e_shoff = offsetof(struct ElfImage, shdr), 2599 .e_ehsize = sizeof(ElfW(Shdr)), 2600 .e_phentsize = sizeof(ElfW(Phdr)), 2601 .e_phnum = 1, 2602 .e_shentsize = sizeof(ElfW(Shdr)), 2603 .e_shnum = ARRAY_SIZE(img->shdr), 2604 .e_shstrndx = ARRAY_SIZE(img->shdr) - 1, 2605 #ifdef ELF_HOST_FLAGS 2606 .e_flags = ELF_HOST_FLAGS, 2607 #endif 2608 #ifdef ELF_OSABI 2609 .e_ident[EI_OSABI] = ELF_OSABI, 2610 #endif 2611 }, 2612 .phdr = { 2613 .p_type = PT_LOAD, 2614 .p_flags = PF_X, 2615 }, 2616 .shdr = { 2617 [0] = { .sh_type = SHT_NULL }, 2618 /* Trick: The contents of code_gen_buffer are not present in 2619 this fake ELF file; that got allocated elsewhere. Therefore 2620 we mark .text as SHT_NOBITS (similar to .bss) so that readers 2621 will not look for contents. We can record any address. */ 2622 [1] = { /* .text */ 2623 .sh_type = SHT_NOBITS, 2624 .sh_flags = SHF_EXECINSTR | SHF_ALLOC, 2625 }, 2626 [2] = { /* .debug_info */ 2627 .sh_type = SHT_PROGBITS, 2628 .sh_offset = offsetof(struct ElfImage, di), 2629 .sh_size = sizeof(struct DebugInfo), 2630 }, 2631 [3] = { /* .debug_abbrev */ 2632 .sh_type = SHT_PROGBITS, 2633 .sh_offset = offsetof(struct ElfImage, da), 2634 .sh_size = sizeof(img->da), 2635 }, 2636 [4] = { /* .debug_frame */ 2637 .sh_type = SHT_PROGBITS, 2638 .sh_offset = sizeof(struct ElfImage), 2639 }, 2640 [5] = { /* .symtab */ 2641 .sh_type = SHT_SYMTAB, 2642 .sh_offset = offsetof(struct ElfImage, sym), 2643 .sh_size = sizeof(img->sym), 2644 .sh_info = 1, 2645 .sh_link = ARRAY_SIZE(img->shdr) - 1, 2646 .sh_entsize = sizeof(ElfW(Sym)), 2647 }, 2648 [6] = { /* .strtab */ 2649 .sh_type = SHT_STRTAB, 2650 .sh_offset = offsetof(struct ElfImage, str), 2651 .sh_size = sizeof(img->str), 2652 } 2653 }, 2654 .sym = { 2655 [1] = { /* code_gen_buffer */ 2656 .st_info = ELF_ST_INFO(STB_GLOBAL, STT_FUNC), 2657 .st_shndx = 1, 2658 } 2659 }, 2660 .di = { 2661 .len = sizeof(struct DebugInfo) - 4, 2662 .version = 2, 2663 .ptr_size = sizeof(void *), 2664 .cu_die = 1, 2665 .cu_lang = 0x8001, /* DW_LANG_Mips_Assembler */ 2666 .fn_die = 2, 2667 .fn_name = "code_gen_buffer" 2668 }, 2669 .da = { 2670 1, /* abbrev number (the cu) */ 2671 0x11, 1, /* DW_TAG_compile_unit, has children */ 2672 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */ 2673 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ 2674 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ 2675 0, 0, /* end of abbrev */ 2676 2, /* abbrev number (the fn) */ 2677 0x2e, 0, /* DW_TAG_subprogram, no children */ 2678 0x3, 0x8, /* DW_AT_name, DW_FORM_string */ 2679 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ 2680 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ 2681 0, 0, /* end of abbrev */ 2682 0 /* no more abbrev */ 2683 }, 2684 .str = "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0" 2685 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer", 2686 }; 2687 2688 /* We only need a single jit entry; statically allocate it. */ 2689 static struct jit_code_entry one_entry; 2690 2691 uintptr_t buf = (uintptr_t)buf_ptr; 2692 size_t img_size = sizeof(struct ElfImage) + debug_frame_size; 2693 DebugFrameHeader *dfh; 2694 2695 img = g_malloc(img_size); 2696 *img = img_template; 2697 2698 img->phdr.p_vaddr = buf; 2699 img->phdr.p_paddr = buf; 2700 img->phdr.p_memsz = buf_size; 2701 2702 img->shdr[1].sh_name = find_string(img->str, ".text"); 2703 img->shdr[1].sh_addr = buf; 2704 img->shdr[1].sh_size = buf_size; 2705 2706 img->shdr[2].sh_name = find_string(img->str, ".debug_info"); 2707 img->shdr[3].sh_name = find_string(img->str, ".debug_abbrev"); 2708 2709 img->shdr[4].sh_name = find_string(img->str, ".debug_frame"); 2710 img->shdr[4].sh_size = debug_frame_size; 2711 2712 img->shdr[5].sh_name = find_string(img->str, ".symtab"); 2713 img->shdr[6].sh_name = find_string(img->str, ".strtab"); 2714 2715 img->sym[1].st_name = find_string(img->str, "code_gen_buffer"); 2716 img->sym[1].st_value = buf; 2717 img->sym[1].st_size = buf_size; 2718 2719 img->di.cu_low_pc = buf; 2720 img->di.cu_high_pc = buf + buf_size; 2721 img->di.fn_low_pc = buf; 2722 img->di.fn_high_pc = buf + buf_size; 2723 2724 dfh = (DebugFrameHeader *)(img + 1); 2725 memcpy(dfh, debug_frame, debug_frame_size); 2726 dfh->fde.func_start = buf; 2727 dfh->fde.func_len = buf_size; 2728 2729 #ifdef DEBUG_JIT 2730 /* Enable this block to be able to debug the ELF image file creation. 2731 One can use readelf, objdump, or other inspection utilities. */ 2732 { 2733 FILE *f = fopen("/tmp/qemu.jit", "w+b"); 2734 if (f) { 2735 if (fwrite(img, img_size, 1, f) != img_size) { 2736 /* Avoid stupid unused return value warning for fwrite. */ 2737 } 2738 fclose(f); 2739 } 2740 } 2741 #endif 2742 2743 one_entry.symfile_addr = img; 2744 one_entry.symfile_size = img_size; 2745 2746 __jit_debug_descriptor.action_flag = JIT_REGISTER_FN; 2747 __jit_debug_descriptor.relevant_entry = &one_entry; 2748 __jit_debug_descriptor.first_entry = &one_entry; 2749 __jit_debug_register_code(); 2750 } 2751 #else 2752 /* No support for the feature. Provide the entry point expected by exec.c, 2753 and implement the internal function we declared earlier. */ 2754 2755 static void tcg_register_jit_int(void *buf, size_t size, 2756 const void *debug_frame, 2757 size_t debug_frame_size) 2758 { 2759 } 2760 2761 void tcg_register_jit(void *buf, size_t buf_size) 2762 { 2763 } 2764 #endif /* ELF_HOST_MACHINE */ 2765