1 /* 2 * Tiny Code Generator for QEMU 3 * 4 * Copyright (c) 2008 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 /* define it to use liveness analysis (better code) */ 26 #define USE_LIVENESS_ANALYSIS 27 #define USE_TCG_OPTIMIZATIONS 28 29 #include "config.h" 30 31 /* Define to jump the ELF file used to communicate with GDB. */ 32 #undef DEBUG_JIT 33 34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG) 35 /* define it to suppress various consistency checks (faster) */ 36 #define NDEBUG 37 #endif 38 39 #include "qemu-common.h" 40 #include "qemu/host-utils.h" 41 #include "qemu/timer.h" 42 43 /* Note: the long term plan is to reduce the dependencies on the QEMU 44 CPU definitions. Currently they are used for qemu_ld/st 45 instructions */ 46 #define NO_CPU_IO_DEFS 47 #include "cpu.h" 48 49 #include "tcg-op.h" 50 51 #if UINTPTR_MAX == UINT32_MAX 52 # define ELF_CLASS ELFCLASS32 53 #else 54 # define ELF_CLASS ELFCLASS64 55 #endif 56 #ifdef HOST_WORDS_BIGENDIAN 57 # define ELF_DATA ELFDATA2MSB 58 #else 59 # define ELF_DATA ELFDATA2LSB 60 #endif 61 62 #include "elf.h" 63 64 /* Forward declarations for functions declared in tcg-target.c and used here. */ 65 static void tcg_target_init(TCGContext *s); 66 static void tcg_target_qemu_prologue(TCGContext *s); 67 static void patch_reloc(tcg_insn_unit *code_ptr, int type, 68 intptr_t value, intptr_t addend); 69 70 /* The CIE and FDE header definitions will be common to all hosts. */ 71 typedef struct { 72 uint32_t len __attribute__((aligned((sizeof(void *))))); 73 uint32_t id; 74 uint8_t version; 75 char augmentation[1]; 76 uint8_t code_align; 77 uint8_t data_align; 78 uint8_t return_column; 79 } DebugFrameCIE; 80 81 typedef struct QEMU_PACKED { 82 uint32_t len __attribute__((aligned((sizeof(void *))))); 83 uint32_t cie_offset; 84 uintptr_t func_start; 85 uintptr_t func_len; 86 } DebugFrameFDEHeader; 87 88 typedef struct QEMU_PACKED { 89 DebugFrameCIE cie; 90 DebugFrameFDEHeader fde; 91 } DebugFrameHeader; 92 93 static void tcg_register_jit_int(void *buf, size_t size, 94 const void *debug_frame, 95 size_t debug_frame_size) 96 __attribute__((unused)); 97 98 /* Forward declarations for functions declared and used in tcg-target.c. */ 99 static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str); 100 static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, 101 intptr_t arg2); 102 static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg); 103 static void tcg_out_movi(TCGContext *s, TCGType type, 104 TCGReg ret, tcg_target_long arg); 105 static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, 106 const int *const_args); 107 static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1, 108 intptr_t arg2); 109 static void tcg_out_call(TCGContext *s, tcg_insn_unit *target); 110 static int tcg_target_const_match(tcg_target_long val, TCGType type, 111 const TCGArgConstraint *arg_ct); 112 static void tcg_out_tb_init(TCGContext *s); 113 static void tcg_out_tb_finalize(TCGContext *s); 114 115 116 TCGOpDef tcg_op_defs[] = { 117 #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags }, 118 #include "tcg-opc.h" 119 #undef DEF 120 }; 121 const size_t tcg_op_defs_max = ARRAY_SIZE(tcg_op_defs); 122 123 static TCGRegSet tcg_target_available_regs[2]; 124 static TCGRegSet tcg_target_call_clobber_regs; 125 126 #if TCG_TARGET_INSN_UNIT_SIZE == 1 127 static __attribute__((unused)) inline void tcg_out8(TCGContext *s, uint8_t v) 128 { 129 *s->code_ptr++ = v; 130 } 131 132 static __attribute__((unused)) inline void tcg_patch8(tcg_insn_unit *p, 133 uint8_t v) 134 { 135 *p = v; 136 } 137 #endif 138 139 #if TCG_TARGET_INSN_UNIT_SIZE <= 2 140 static __attribute__((unused)) inline void tcg_out16(TCGContext *s, uint16_t v) 141 { 142 if (TCG_TARGET_INSN_UNIT_SIZE == 2) { 143 *s->code_ptr++ = v; 144 } else { 145 tcg_insn_unit *p = s->code_ptr; 146 memcpy(p, &v, sizeof(v)); 147 s->code_ptr = p + (2 / TCG_TARGET_INSN_UNIT_SIZE); 148 } 149 } 150 151 static __attribute__((unused)) inline void tcg_patch16(tcg_insn_unit *p, 152 uint16_t v) 153 { 154 if (TCG_TARGET_INSN_UNIT_SIZE == 2) { 155 *p = v; 156 } else { 157 memcpy(p, &v, sizeof(v)); 158 } 159 } 160 #endif 161 162 #if TCG_TARGET_INSN_UNIT_SIZE <= 4 163 static __attribute__((unused)) inline void tcg_out32(TCGContext *s, uint32_t v) 164 { 165 if (TCG_TARGET_INSN_UNIT_SIZE == 4) { 166 *s->code_ptr++ = v; 167 } else { 168 tcg_insn_unit *p = s->code_ptr; 169 memcpy(p, &v, sizeof(v)); 170 s->code_ptr = p + (4 / TCG_TARGET_INSN_UNIT_SIZE); 171 } 172 } 173 174 static __attribute__((unused)) inline void tcg_patch32(tcg_insn_unit *p, 175 uint32_t v) 176 { 177 if (TCG_TARGET_INSN_UNIT_SIZE == 4) { 178 *p = v; 179 } else { 180 memcpy(p, &v, sizeof(v)); 181 } 182 } 183 #endif 184 185 #if TCG_TARGET_INSN_UNIT_SIZE <= 8 186 static __attribute__((unused)) inline void tcg_out64(TCGContext *s, uint64_t v) 187 { 188 if (TCG_TARGET_INSN_UNIT_SIZE == 8) { 189 *s->code_ptr++ = v; 190 } else { 191 tcg_insn_unit *p = s->code_ptr; 192 memcpy(p, &v, sizeof(v)); 193 s->code_ptr = p + (8 / TCG_TARGET_INSN_UNIT_SIZE); 194 } 195 } 196 197 static __attribute__((unused)) inline void tcg_patch64(tcg_insn_unit *p, 198 uint64_t v) 199 { 200 if (TCG_TARGET_INSN_UNIT_SIZE == 8) { 201 *p = v; 202 } else { 203 memcpy(p, &v, sizeof(v)); 204 } 205 } 206 #endif 207 208 /* label relocation processing */ 209 210 static void tcg_out_reloc(TCGContext *s, tcg_insn_unit *code_ptr, int type, 211 TCGLabel *l, intptr_t addend) 212 { 213 TCGRelocation *r; 214 215 if (l->has_value) { 216 /* FIXME: This may break relocations on RISC targets that 217 modify instruction fields in place. The caller may not have 218 written the initial value. */ 219 patch_reloc(code_ptr, type, l->u.value, addend); 220 } else { 221 /* add a new relocation entry */ 222 r = tcg_malloc(sizeof(TCGRelocation)); 223 r->type = type; 224 r->ptr = code_ptr; 225 r->addend = addend; 226 r->next = l->u.first_reloc; 227 l->u.first_reloc = r; 228 } 229 } 230 231 static void tcg_out_label(TCGContext *s, TCGLabel *l, tcg_insn_unit *ptr) 232 { 233 intptr_t value = (intptr_t)ptr; 234 TCGRelocation *r; 235 236 assert(!l->has_value); 237 238 for (r = l->u.first_reloc; r != NULL; r = r->next) { 239 patch_reloc(r->ptr, r->type, value, r->addend); 240 } 241 242 l->has_value = 1; 243 l->u.value_ptr = ptr; 244 } 245 246 TCGLabel *gen_new_label(void) 247 { 248 TCGContext *s = &tcg_ctx; 249 TCGLabel *l = tcg_malloc(sizeof(TCGLabel)); 250 251 *l = (TCGLabel){ 252 .id = s->nb_labels++ 253 }; 254 255 return l; 256 } 257 258 #include "tcg-target.c" 259 260 /* pool based memory allocation */ 261 void *tcg_malloc_internal(TCGContext *s, int size) 262 { 263 TCGPool *p; 264 int pool_size; 265 266 if (size > TCG_POOL_CHUNK_SIZE) { 267 /* big malloc: insert a new pool (XXX: could optimize) */ 268 p = g_malloc(sizeof(TCGPool) + size); 269 p->size = size; 270 p->next = s->pool_first_large; 271 s->pool_first_large = p; 272 return p->data; 273 } else { 274 p = s->pool_current; 275 if (!p) { 276 p = s->pool_first; 277 if (!p) 278 goto new_pool; 279 } else { 280 if (!p->next) { 281 new_pool: 282 pool_size = TCG_POOL_CHUNK_SIZE; 283 p = g_malloc(sizeof(TCGPool) + pool_size); 284 p->size = pool_size; 285 p->next = NULL; 286 if (s->pool_current) 287 s->pool_current->next = p; 288 else 289 s->pool_first = p; 290 } else { 291 p = p->next; 292 } 293 } 294 } 295 s->pool_current = p; 296 s->pool_cur = p->data + size; 297 s->pool_end = p->data + p->size; 298 return p->data; 299 } 300 301 void tcg_pool_reset(TCGContext *s) 302 { 303 TCGPool *p, *t; 304 for (p = s->pool_first_large; p; p = t) { 305 t = p->next; 306 g_free(p); 307 } 308 s->pool_first_large = NULL; 309 s->pool_cur = s->pool_end = NULL; 310 s->pool_current = NULL; 311 } 312 313 typedef struct TCGHelperInfo { 314 void *func; 315 const char *name; 316 unsigned flags; 317 unsigned sizemask; 318 } TCGHelperInfo; 319 320 #include "exec/helper-proto.h" 321 322 static const TCGHelperInfo all_helpers[] = { 323 #include "exec/helper-tcg.h" 324 }; 325 326 void tcg_context_init(TCGContext *s) 327 { 328 int op, total_args, n, i; 329 TCGOpDef *def; 330 TCGArgConstraint *args_ct; 331 int *sorted_args; 332 GHashTable *helper_table; 333 334 memset(s, 0, sizeof(*s)); 335 s->nb_globals = 0; 336 337 /* Count total number of arguments and allocate the corresponding 338 space */ 339 total_args = 0; 340 for(op = 0; op < NB_OPS; op++) { 341 def = &tcg_op_defs[op]; 342 n = def->nb_iargs + def->nb_oargs; 343 total_args += n; 344 } 345 346 args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args); 347 sorted_args = g_malloc(sizeof(int) * total_args); 348 349 for(op = 0; op < NB_OPS; op++) { 350 def = &tcg_op_defs[op]; 351 def->args_ct = args_ct; 352 def->sorted_args = sorted_args; 353 n = def->nb_iargs + def->nb_oargs; 354 sorted_args += n; 355 args_ct += n; 356 } 357 358 /* Register helpers. */ 359 /* Use g_direct_hash/equal for direct pointer comparisons on func. */ 360 s->helpers = helper_table = g_hash_table_new(NULL, NULL); 361 362 for (i = 0; i < ARRAY_SIZE(all_helpers); ++i) { 363 g_hash_table_insert(helper_table, (gpointer)all_helpers[i].func, 364 (gpointer)&all_helpers[i]); 365 } 366 367 tcg_target_init(s); 368 } 369 370 void tcg_prologue_init(TCGContext *s) 371 { 372 /* init global prologue and epilogue */ 373 s->code_buf = s->code_gen_prologue; 374 s->code_ptr = s->code_buf; 375 tcg_target_qemu_prologue(s); 376 flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr); 377 378 #ifdef DEBUG_DISAS 379 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { 380 size_t size = tcg_current_code_size(s); 381 qemu_log("PROLOGUE: [size=%zu]\n", size); 382 log_disas(s->code_buf, size); 383 qemu_log("\n"); 384 qemu_log_flush(); 385 } 386 #endif 387 } 388 389 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size) 390 { 391 s->frame_start = start; 392 s->frame_end = start + size; 393 s->frame_reg = reg; 394 } 395 396 void tcg_func_start(TCGContext *s) 397 { 398 tcg_pool_reset(s); 399 s->nb_temps = s->nb_globals; 400 401 /* No temps have been previously allocated for size or locality. */ 402 memset(s->free_temps, 0, sizeof(s->free_temps)); 403 404 s->nb_labels = 0; 405 s->current_frame_offset = s->frame_start; 406 407 #ifdef CONFIG_DEBUG_TCG 408 s->goto_tb_issue_mask = 0; 409 #endif 410 411 s->gen_first_op_idx = 0; 412 s->gen_last_op_idx = -1; 413 s->gen_next_op_idx = 0; 414 s->gen_next_parm_idx = 0; 415 416 s->be = tcg_malloc(sizeof(TCGBackendData)); 417 } 418 419 static inline void tcg_temp_alloc(TCGContext *s, int n) 420 { 421 if (n > TCG_MAX_TEMPS) 422 tcg_abort(); 423 } 424 425 static inline int tcg_global_reg_new_internal(TCGType type, int reg, 426 const char *name) 427 { 428 TCGContext *s = &tcg_ctx; 429 TCGTemp *ts; 430 int idx; 431 432 #if TCG_TARGET_REG_BITS == 32 433 if (type != TCG_TYPE_I32) 434 tcg_abort(); 435 #endif 436 if (tcg_regset_test_reg(s->reserved_regs, reg)) 437 tcg_abort(); 438 idx = s->nb_globals; 439 tcg_temp_alloc(s, s->nb_globals + 1); 440 ts = &s->temps[s->nb_globals]; 441 ts->base_type = type; 442 ts->type = type; 443 ts->fixed_reg = 1; 444 ts->reg = reg; 445 ts->name = name; 446 s->nb_globals++; 447 tcg_regset_set_reg(s->reserved_regs, reg); 448 return idx; 449 } 450 451 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name) 452 { 453 int idx; 454 455 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name); 456 return MAKE_TCGV_I32(idx); 457 } 458 459 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name) 460 { 461 int idx; 462 463 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name); 464 return MAKE_TCGV_I64(idx); 465 } 466 467 static inline int tcg_global_mem_new_internal(TCGType type, int reg, 468 intptr_t offset, 469 const char *name) 470 { 471 TCGContext *s = &tcg_ctx; 472 TCGTemp *ts; 473 int idx; 474 475 idx = s->nb_globals; 476 #if TCG_TARGET_REG_BITS == 32 477 if (type == TCG_TYPE_I64) { 478 char buf[64]; 479 tcg_temp_alloc(s, s->nb_globals + 2); 480 ts = &s->temps[s->nb_globals]; 481 ts->base_type = type; 482 ts->type = TCG_TYPE_I32; 483 ts->fixed_reg = 0; 484 ts->mem_allocated = 1; 485 ts->mem_reg = reg; 486 #ifdef HOST_WORDS_BIGENDIAN 487 ts->mem_offset = offset + 4; 488 #else 489 ts->mem_offset = offset; 490 #endif 491 pstrcpy(buf, sizeof(buf), name); 492 pstrcat(buf, sizeof(buf), "_0"); 493 ts->name = strdup(buf); 494 ts++; 495 496 ts->base_type = type; 497 ts->type = TCG_TYPE_I32; 498 ts->fixed_reg = 0; 499 ts->mem_allocated = 1; 500 ts->mem_reg = reg; 501 #ifdef HOST_WORDS_BIGENDIAN 502 ts->mem_offset = offset; 503 #else 504 ts->mem_offset = offset + 4; 505 #endif 506 pstrcpy(buf, sizeof(buf), name); 507 pstrcat(buf, sizeof(buf), "_1"); 508 ts->name = strdup(buf); 509 510 s->nb_globals += 2; 511 } else 512 #endif 513 { 514 tcg_temp_alloc(s, s->nb_globals + 1); 515 ts = &s->temps[s->nb_globals]; 516 ts->base_type = type; 517 ts->type = type; 518 ts->fixed_reg = 0; 519 ts->mem_allocated = 1; 520 ts->mem_reg = reg; 521 ts->mem_offset = offset; 522 ts->name = name; 523 s->nb_globals++; 524 } 525 return idx; 526 } 527 528 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name) 529 { 530 int idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name); 531 return MAKE_TCGV_I32(idx); 532 } 533 534 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name) 535 { 536 int idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name); 537 return MAKE_TCGV_I64(idx); 538 } 539 540 static inline int tcg_temp_new_internal(TCGType type, int temp_local) 541 { 542 TCGContext *s = &tcg_ctx; 543 TCGTemp *ts; 544 int idx, k; 545 546 k = type + (temp_local ? TCG_TYPE_COUNT : 0); 547 idx = find_first_bit(s->free_temps[k].l, TCG_MAX_TEMPS); 548 if (idx < TCG_MAX_TEMPS) { 549 /* There is already an available temp with the right type. */ 550 clear_bit(idx, s->free_temps[k].l); 551 552 ts = &s->temps[idx]; 553 ts->temp_allocated = 1; 554 assert(ts->base_type == type); 555 assert(ts->temp_local == temp_local); 556 } else { 557 idx = s->nb_temps; 558 #if TCG_TARGET_REG_BITS == 32 559 if (type == TCG_TYPE_I64) { 560 tcg_temp_alloc(s, s->nb_temps + 2); 561 ts = &s->temps[s->nb_temps]; 562 ts->base_type = type; 563 ts->type = TCG_TYPE_I32; 564 ts->temp_allocated = 1; 565 ts->temp_local = temp_local; 566 ts->name = NULL; 567 ts++; 568 ts->base_type = type; 569 ts->type = TCG_TYPE_I32; 570 ts->temp_allocated = 1; 571 ts->temp_local = temp_local; 572 ts->name = NULL; 573 s->nb_temps += 2; 574 } else 575 #endif 576 { 577 tcg_temp_alloc(s, s->nb_temps + 1); 578 ts = &s->temps[s->nb_temps]; 579 ts->base_type = type; 580 ts->type = type; 581 ts->temp_allocated = 1; 582 ts->temp_local = temp_local; 583 ts->name = NULL; 584 s->nb_temps++; 585 } 586 } 587 588 #if defined(CONFIG_DEBUG_TCG) 589 s->temps_in_use++; 590 #endif 591 return idx; 592 } 593 594 TCGv_i32 tcg_temp_new_internal_i32(int temp_local) 595 { 596 int idx; 597 598 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local); 599 return MAKE_TCGV_I32(idx); 600 } 601 602 TCGv_i64 tcg_temp_new_internal_i64(int temp_local) 603 { 604 int idx; 605 606 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local); 607 return MAKE_TCGV_I64(idx); 608 } 609 610 static void tcg_temp_free_internal(int idx) 611 { 612 TCGContext *s = &tcg_ctx; 613 TCGTemp *ts; 614 int k; 615 616 #if defined(CONFIG_DEBUG_TCG) 617 s->temps_in_use--; 618 if (s->temps_in_use < 0) { 619 fprintf(stderr, "More temporaries freed than allocated!\n"); 620 } 621 #endif 622 623 assert(idx >= s->nb_globals && idx < s->nb_temps); 624 ts = &s->temps[idx]; 625 assert(ts->temp_allocated != 0); 626 ts->temp_allocated = 0; 627 628 k = ts->base_type + (ts->temp_local ? TCG_TYPE_COUNT : 0); 629 set_bit(idx, s->free_temps[k].l); 630 } 631 632 void tcg_temp_free_i32(TCGv_i32 arg) 633 { 634 tcg_temp_free_internal(GET_TCGV_I32(arg)); 635 } 636 637 void tcg_temp_free_i64(TCGv_i64 arg) 638 { 639 tcg_temp_free_internal(GET_TCGV_I64(arg)); 640 } 641 642 TCGv_i32 tcg_const_i32(int32_t val) 643 { 644 TCGv_i32 t0; 645 t0 = tcg_temp_new_i32(); 646 tcg_gen_movi_i32(t0, val); 647 return t0; 648 } 649 650 TCGv_i64 tcg_const_i64(int64_t val) 651 { 652 TCGv_i64 t0; 653 t0 = tcg_temp_new_i64(); 654 tcg_gen_movi_i64(t0, val); 655 return t0; 656 } 657 658 TCGv_i32 tcg_const_local_i32(int32_t val) 659 { 660 TCGv_i32 t0; 661 t0 = tcg_temp_local_new_i32(); 662 tcg_gen_movi_i32(t0, val); 663 return t0; 664 } 665 666 TCGv_i64 tcg_const_local_i64(int64_t val) 667 { 668 TCGv_i64 t0; 669 t0 = tcg_temp_local_new_i64(); 670 tcg_gen_movi_i64(t0, val); 671 return t0; 672 } 673 674 #if defined(CONFIG_DEBUG_TCG) 675 void tcg_clear_temp_count(void) 676 { 677 TCGContext *s = &tcg_ctx; 678 s->temps_in_use = 0; 679 } 680 681 int tcg_check_temp_count(void) 682 { 683 TCGContext *s = &tcg_ctx; 684 if (s->temps_in_use) { 685 /* Clear the count so that we don't give another 686 * warning immediately next time around. 687 */ 688 s->temps_in_use = 0; 689 return 1; 690 } 691 return 0; 692 } 693 #endif 694 695 /* Note: we convert the 64 bit args to 32 bit and do some alignment 696 and endian swap. Maybe it would be better to do the alignment 697 and endian swap in tcg_reg_alloc_call(). */ 698 void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret, 699 int nargs, TCGArg *args) 700 { 701 int i, real_args, nb_rets, pi, pi_first; 702 unsigned sizemask, flags; 703 TCGHelperInfo *info; 704 705 info = g_hash_table_lookup(s->helpers, (gpointer)func); 706 flags = info->flags; 707 sizemask = info->sizemask; 708 709 #if defined(__sparc__) && !defined(__arch64__) \ 710 && !defined(CONFIG_TCG_INTERPRETER) 711 /* We have 64-bit values in one register, but need to pass as two 712 separate parameters. Split them. */ 713 int orig_sizemask = sizemask; 714 int orig_nargs = nargs; 715 TCGv_i64 retl, reth; 716 717 TCGV_UNUSED_I64(retl); 718 TCGV_UNUSED_I64(reth); 719 if (sizemask != 0) { 720 TCGArg *split_args = __builtin_alloca(sizeof(TCGArg) * nargs * 2); 721 for (i = real_args = 0; i < nargs; ++i) { 722 int is_64bit = sizemask & (1 << (i+1)*2); 723 if (is_64bit) { 724 TCGv_i64 orig = MAKE_TCGV_I64(args[i]); 725 TCGv_i32 h = tcg_temp_new_i32(); 726 TCGv_i32 l = tcg_temp_new_i32(); 727 tcg_gen_extr_i64_i32(l, h, orig); 728 split_args[real_args++] = GET_TCGV_I32(h); 729 split_args[real_args++] = GET_TCGV_I32(l); 730 } else { 731 split_args[real_args++] = args[i]; 732 } 733 } 734 nargs = real_args; 735 args = split_args; 736 sizemask = 0; 737 } 738 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 739 for (i = 0; i < nargs; ++i) { 740 int is_64bit = sizemask & (1 << (i+1)*2); 741 int is_signed = sizemask & (2 << (i+1)*2); 742 if (!is_64bit) { 743 TCGv_i64 temp = tcg_temp_new_i64(); 744 TCGv_i64 orig = MAKE_TCGV_I64(args[i]); 745 if (is_signed) { 746 tcg_gen_ext32s_i64(temp, orig); 747 } else { 748 tcg_gen_ext32u_i64(temp, orig); 749 } 750 args[i] = GET_TCGV_I64(temp); 751 } 752 } 753 #endif /* TCG_TARGET_EXTEND_ARGS */ 754 755 pi_first = pi = s->gen_next_parm_idx; 756 if (ret != TCG_CALL_DUMMY_ARG) { 757 #if defined(__sparc__) && !defined(__arch64__) \ 758 && !defined(CONFIG_TCG_INTERPRETER) 759 if (orig_sizemask & 1) { 760 /* The 32-bit ABI is going to return the 64-bit value in 761 the %o0/%o1 register pair. Prepare for this by using 762 two return temporaries, and reassemble below. */ 763 retl = tcg_temp_new_i64(); 764 reth = tcg_temp_new_i64(); 765 s->gen_opparam_buf[pi++] = GET_TCGV_I64(reth); 766 s->gen_opparam_buf[pi++] = GET_TCGV_I64(retl); 767 nb_rets = 2; 768 } else { 769 s->gen_opparam_buf[pi++] = ret; 770 nb_rets = 1; 771 } 772 #else 773 if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) { 774 #ifdef HOST_WORDS_BIGENDIAN 775 s->gen_opparam_buf[pi++] = ret + 1; 776 s->gen_opparam_buf[pi++] = ret; 777 #else 778 s->gen_opparam_buf[pi++] = ret; 779 s->gen_opparam_buf[pi++] = ret + 1; 780 #endif 781 nb_rets = 2; 782 } else { 783 s->gen_opparam_buf[pi++] = ret; 784 nb_rets = 1; 785 } 786 #endif 787 } else { 788 nb_rets = 0; 789 } 790 real_args = 0; 791 for (i = 0; i < nargs; i++) { 792 int is_64bit = sizemask & (1 << (i+1)*2); 793 if (TCG_TARGET_REG_BITS < 64 && is_64bit) { 794 #ifdef TCG_TARGET_CALL_ALIGN_ARGS 795 /* some targets want aligned 64 bit args */ 796 if (real_args & 1) { 797 s->gen_opparam_buf[pi++] = TCG_CALL_DUMMY_ARG; 798 real_args++; 799 } 800 #endif 801 /* If stack grows up, then we will be placing successive 802 arguments at lower addresses, which means we need to 803 reverse the order compared to how we would normally 804 treat either big or little-endian. For those arguments 805 that will wind up in registers, this still works for 806 HPPA (the only current STACK_GROWSUP target) since the 807 argument registers are *also* allocated in decreasing 808 order. If another such target is added, this logic may 809 have to get more complicated to differentiate between 810 stack arguments and register arguments. */ 811 #if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP) 812 s->gen_opparam_buf[pi++] = args[i] + 1; 813 s->gen_opparam_buf[pi++] = args[i]; 814 #else 815 s->gen_opparam_buf[pi++] = args[i]; 816 s->gen_opparam_buf[pi++] = args[i] + 1; 817 #endif 818 real_args += 2; 819 continue; 820 } 821 822 s->gen_opparam_buf[pi++] = args[i]; 823 real_args++; 824 } 825 s->gen_opparam_buf[pi++] = (uintptr_t)func; 826 s->gen_opparam_buf[pi++] = flags; 827 828 i = s->gen_next_op_idx; 829 tcg_debug_assert(i < OPC_BUF_SIZE); 830 tcg_debug_assert(pi <= OPPARAM_BUF_SIZE); 831 832 /* Set links for sequential allocation during translation. */ 833 s->gen_op_buf[i] = (TCGOp){ 834 .opc = INDEX_op_call, 835 .callo = nb_rets, 836 .calli = real_args, 837 .args = pi_first, 838 .prev = i - 1, 839 .next = i + 1 840 }; 841 842 /* Make sure the calli field didn't overflow. */ 843 tcg_debug_assert(s->gen_op_buf[i].calli == real_args); 844 845 s->gen_last_op_idx = i; 846 s->gen_next_op_idx = i + 1; 847 s->gen_next_parm_idx = pi; 848 849 #if defined(__sparc__) && !defined(__arch64__) \ 850 && !defined(CONFIG_TCG_INTERPRETER) 851 /* Free all of the parts we allocated above. */ 852 for (i = real_args = 0; i < orig_nargs; ++i) { 853 int is_64bit = orig_sizemask & (1 << (i+1)*2); 854 if (is_64bit) { 855 TCGv_i32 h = MAKE_TCGV_I32(args[real_args++]); 856 TCGv_i32 l = MAKE_TCGV_I32(args[real_args++]); 857 tcg_temp_free_i32(h); 858 tcg_temp_free_i32(l); 859 } else { 860 real_args++; 861 } 862 } 863 if (orig_sizemask & 1) { 864 /* The 32-bit ABI returned two 32-bit pieces. Re-assemble them. 865 Note that describing these as TCGv_i64 eliminates an unnecessary 866 zero-extension that tcg_gen_concat_i32_i64 would create. */ 867 tcg_gen_concat32_i64(MAKE_TCGV_I64(ret), retl, reth); 868 tcg_temp_free_i64(retl); 869 tcg_temp_free_i64(reth); 870 } 871 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 872 for (i = 0; i < nargs; ++i) { 873 int is_64bit = sizemask & (1 << (i+1)*2); 874 if (!is_64bit) { 875 TCGv_i64 temp = MAKE_TCGV_I64(args[i]); 876 tcg_temp_free_i64(temp); 877 } 878 } 879 #endif /* TCG_TARGET_EXTEND_ARGS */ 880 } 881 882 static void tcg_reg_alloc_start(TCGContext *s) 883 { 884 int i; 885 TCGTemp *ts; 886 for(i = 0; i < s->nb_globals; i++) { 887 ts = &s->temps[i]; 888 if (ts->fixed_reg) { 889 ts->val_type = TEMP_VAL_REG; 890 } else { 891 ts->val_type = TEMP_VAL_MEM; 892 } 893 } 894 for(i = s->nb_globals; i < s->nb_temps; i++) { 895 ts = &s->temps[i]; 896 if (ts->temp_local) { 897 ts->val_type = TEMP_VAL_MEM; 898 } else { 899 ts->val_type = TEMP_VAL_DEAD; 900 } 901 ts->mem_allocated = 0; 902 ts->fixed_reg = 0; 903 } 904 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 905 s->reg_to_temp[i] = -1; 906 } 907 } 908 909 static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size, 910 int idx) 911 { 912 TCGTemp *ts; 913 914 assert(idx >= 0 && idx < s->nb_temps); 915 ts = &s->temps[idx]; 916 if (idx < s->nb_globals) { 917 pstrcpy(buf, buf_size, ts->name); 918 } else { 919 if (ts->temp_local) 920 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals); 921 else 922 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals); 923 } 924 return buf; 925 } 926 927 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg) 928 { 929 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg)); 930 } 931 932 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg) 933 { 934 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg)); 935 } 936 937 /* Find helper name. */ 938 static inline const char *tcg_find_helper(TCGContext *s, uintptr_t val) 939 { 940 const char *ret = NULL; 941 if (s->helpers) { 942 TCGHelperInfo *info = g_hash_table_lookup(s->helpers, (gpointer)val); 943 if (info) { 944 ret = info->name; 945 } 946 } 947 return ret; 948 } 949 950 static const char * const cond_name[] = 951 { 952 [TCG_COND_NEVER] = "never", 953 [TCG_COND_ALWAYS] = "always", 954 [TCG_COND_EQ] = "eq", 955 [TCG_COND_NE] = "ne", 956 [TCG_COND_LT] = "lt", 957 [TCG_COND_GE] = "ge", 958 [TCG_COND_LE] = "le", 959 [TCG_COND_GT] = "gt", 960 [TCG_COND_LTU] = "ltu", 961 [TCG_COND_GEU] = "geu", 962 [TCG_COND_LEU] = "leu", 963 [TCG_COND_GTU] = "gtu" 964 }; 965 966 static const char * const ldst_name[] = 967 { 968 [MO_UB] = "ub", 969 [MO_SB] = "sb", 970 [MO_LEUW] = "leuw", 971 [MO_LESW] = "lesw", 972 [MO_LEUL] = "leul", 973 [MO_LESL] = "lesl", 974 [MO_LEQ] = "leq", 975 [MO_BEUW] = "beuw", 976 [MO_BESW] = "besw", 977 [MO_BEUL] = "beul", 978 [MO_BESL] = "besl", 979 [MO_BEQ] = "beq", 980 }; 981 982 void tcg_dump_ops(TCGContext *s) 983 { 984 char buf[128]; 985 TCGOp *op; 986 int oi; 987 988 for (oi = s->gen_first_op_idx; oi >= 0; oi = op->next) { 989 int i, k, nb_oargs, nb_iargs, nb_cargs; 990 const TCGOpDef *def; 991 const TCGArg *args; 992 TCGOpcode c; 993 994 op = &s->gen_op_buf[oi]; 995 c = op->opc; 996 def = &tcg_op_defs[c]; 997 args = &s->gen_opparam_buf[op->args]; 998 999 if (c == INDEX_op_debug_insn_start) { 1000 uint64_t pc; 1001 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS 1002 pc = ((uint64_t)args[1] << 32) | args[0]; 1003 #else 1004 pc = args[0]; 1005 #endif 1006 if (oi != s->gen_first_op_idx) { 1007 qemu_log("\n"); 1008 } 1009 qemu_log(" ---- 0x%" PRIx64, pc); 1010 } else if (c == INDEX_op_call) { 1011 /* variable number of arguments */ 1012 nb_oargs = op->callo; 1013 nb_iargs = op->calli; 1014 nb_cargs = def->nb_cargs; 1015 1016 /* function name, flags, out args */ 1017 qemu_log(" %s %s,$0x%" TCG_PRIlx ",$%d", def->name, 1018 tcg_find_helper(s, args[nb_oargs + nb_iargs]), 1019 args[nb_oargs + nb_iargs + 1], nb_oargs); 1020 for (i = 0; i < nb_oargs; i++) { 1021 qemu_log(",%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1022 args[i])); 1023 } 1024 for (i = 0; i < nb_iargs; i++) { 1025 TCGArg arg = args[nb_oargs + i]; 1026 const char *t = "<dummy>"; 1027 if (arg != TCG_CALL_DUMMY_ARG) { 1028 t = tcg_get_arg_str_idx(s, buf, sizeof(buf), arg); 1029 } 1030 qemu_log(",%s", t); 1031 } 1032 } else { 1033 qemu_log(" %s ", def->name); 1034 1035 nb_oargs = def->nb_oargs; 1036 nb_iargs = def->nb_iargs; 1037 nb_cargs = def->nb_cargs; 1038 1039 k = 0; 1040 for (i = 0; i < nb_oargs; i++) { 1041 if (k != 0) { 1042 qemu_log(","); 1043 } 1044 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1045 args[k++])); 1046 } 1047 for (i = 0; i < nb_iargs; i++) { 1048 if (k != 0) { 1049 qemu_log(","); 1050 } 1051 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1052 args[k++])); 1053 } 1054 switch (c) { 1055 case INDEX_op_brcond_i32: 1056 case INDEX_op_setcond_i32: 1057 case INDEX_op_movcond_i32: 1058 case INDEX_op_brcond2_i32: 1059 case INDEX_op_setcond2_i32: 1060 case INDEX_op_brcond_i64: 1061 case INDEX_op_setcond_i64: 1062 case INDEX_op_movcond_i64: 1063 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) { 1064 qemu_log(",%s", cond_name[args[k++]]); 1065 } else { 1066 qemu_log(",$0x%" TCG_PRIlx, args[k++]); 1067 } 1068 i = 1; 1069 break; 1070 case INDEX_op_qemu_ld_i32: 1071 case INDEX_op_qemu_st_i32: 1072 case INDEX_op_qemu_ld_i64: 1073 case INDEX_op_qemu_st_i64: 1074 if (args[k] < ARRAY_SIZE(ldst_name) && ldst_name[args[k]]) { 1075 qemu_log(",%s", ldst_name[args[k++]]); 1076 } else { 1077 qemu_log(",$0x%" TCG_PRIlx, args[k++]); 1078 } 1079 i = 1; 1080 break; 1081 default: 1082 i = 0; 1083 break; 1084 } 1085 switch (c) { 1086 case INDEX_op_set_label: 1087 case INDEX_op_br: 1088 case INDEX_op_brcond_i32: 1089 case INDEX_op_brcond_i64: 1090 case INDEX_op_brcond2_i32: 1091 qemu_log("%s$L%d", k ? "," : "", arg_label(args[k])->id); 1092 i++, k++; 1093 break; 1094 default: 1095 break; 1096 } 1097 for (; i < nb_cargs; i++, k++) { 1098 qemu_log("%s$0x%" TCG_PRIlx, k ? "," : "", args[k]); 1099 } 1100 } 1101 qemu_log("\n"); 1102 } 1103 } 1104 1105 /* we give more priority to constraints with less registers */ 1106 static int get_constraint_priority(const TCGOpDef *def, int k) 1107 { 1108 const TCGArgConstraint *arg_ct; 1109 1110 int i, n; 1111 arg_ct = &def->args_ct[k]; 1112 if (arg_ct->ct & TCG_CT_ALIAS) { 1113 /* an alias is equivalent to a single register */ 1114 n = 1; 1115 } else { 1116 if (!(arg_ct->ct & TCG_CT_REG)) 1117 return 0; 1118 n = 0; 1119 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 1120 if (tcg_regset_test_reg(arg_ct->u.regs, i)) 1121 n++; 1122 } 1123 } 1124 return TCG_TARGET_NB_REGS - n + 1; 1125 } 1126 1127 /* sort from highest priority to lowest */ 1128 static void sort_constraints(TCGOpDef *def, int start, int n) 1129 { 1130 int i, j, p1, p2, tmp; 1131 1132 for(i = 0; i < n; i++) 1133 def->sorted_args[start + i] = start + i; 1134 if (n <= 1) 1135 return; 1136 for(i = 0; i < n - 1; i++) { 1137 for(j = i + 1; j < n; j++) { 1138 p1 = get_constraint_priority(def, def->sorted_args[start + i]); 1139 p2 = get_constraint_priority(def, def->sorted_args[start + j]); 1140 if (p1 < p2) { 1141 tmp = def->sorted_args[start + i]; 1142 def->sorted_args[start + i] = def->sorted_args[start + j]; 1143 def->sorted_args[start + j] = tmp; 1144 } 1145 } 1146 } 1147 } 1148 1149 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs) 1150 { 1151 TCGOpcode op; 1152 TCGOpDef *def; 1153 const char *ct_str; 1154 int i, nb_args; 1155 1156 for(;;) { 1157 if (tdefs->op == (TCGOpcode)-1) 1158 break; 1159 op = tdefs->op; 1160 assert((unsigned)op < NB_OPS); 1161 def = &tcg_op_defs[op]; 1162 #if defined(CONFIG_DEBUG_TCG) 1163 /* Duplicate entry in op definitions? */ 1164 assert(!def->used); 1165 def->used = 1; 1166 #endif 1167 nb_args = def->nb_iargs + def->nb_oargs; 1168 for(i = 0; i < nb_args; i++) { 1169 ct_str = tdefs->args_ct_str[i]; 1170 /* Incomplete TCGTargetOpDef entry? */ 1171 assert(ct_str != NULL); 1172 tcg_regset_clear(def->args_ct[i].u.regs); 1173 def->args_ct[i].ct = 0; 1174 if (ct_str[0] >= '0' && ct_str[0] <= '9') { 1175 int oarg; 1176 oarg = ct_str[0] - '0'; 1177 assert(oarg < def->nb_oargs); 1178 assert(def->args_ct[oarg].ct & TCG_CT_REG); 1179 /* TCG_CT_ALIAS is for the output arguments. The input 1180 argument is tagged with TCG_CT_IALIAS. */ 1181 def->args_ct[i] = def->args_ct[oarg]; 1182 def->args_ct[oarg].ct = TCG_CT_ALIAS; 1183 def->args_ct[oarg].alias_index = i; 1184 def->args_ct[i].ct |= TCG_CT_IALIAS; 1185 def->args_ct[i].alias_index = oarg; 1186 } else { 1187 for(;;) { 1188 if (*ct_str == '\0') 1189 break; 1190 switch(*ct_str) { 1191 case 'i': 1192 def->args_ct[i].ct |= TCG_CT_CONST; 1193 ct_str++; 1194 break; 1195 default: 1196 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) { 1197 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n", 1198 ct_str, i, def->name); 1199 exit(1); 1200 } 1201 } 1202 } 1203 } 1204 } 1205 1206 /* TCGTargetOpDef entry with too much information? */ 1207 assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL); 1208 1209 /* sort the constraints (XXX: this is just an heuristic) */ 1210 sort_constraints(def, 0, def->nb_oargs); 1211 sort_constraints(def, def->nb_oargs, def->nb_iargs); 1212 1213 #if 0 1214 { 1215 int i; 1216 1217 printf("%s: sorted=", def->name); 1218 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++) 1219 printf(" %d", def->sorted_args[i]); 1220 printf("\n"); 1221 } 1222 #endif 1223 tdefs++; 1224 } 1225 1226 #if defined(CONFIG_DEBUG_TCG) 1227 i = 0; 1228 for (op = 0; op < ARRAY_SIZE(tcg_op_defs); op++) { 1229 const TCGOpDef *def = &tcg_op_defs[op]; 1230 if (def->flags & TCG_OPF_NOT_PRESENT) { 1231 /* Wrong entry in op definitions? */ 1232 if (def->used) { 1233 fprintf(stderr, "Invalid op definition for %s\n", def->name); 1234 i = 1; 1235 } 1236 } else { 1237 /* Missing entry in op definitions? */ 1238 if (!def->used) { 1239 fprintf(stderr, "Missing op definition for %s\n", def->name); 1240 i = 1; 1241 } 1242 } 1243 } 1244 if (i == 1) { 1245 tcg_abort(); 1246 } 1247 #endif 1248 } 1249 1250 void tcg_op_remove(TCGContext *s, TCGOp *op) 1251 { 1252 int next = op->next; 1253 int prev = op->prev; 1254 1255 if (next >= 0) { 1256 s->gen_op_buf[next].prev = prev; 1257 } else { 1258 s->gen_last_op_idx = prev; 1259 } 1260 if (prev >= 0) { 1261 s->gen_op_buf[prev].next = next; 1262 } else { 1263 s->gen_first_op_idx = next; 1264 } 1265 1266 memset(op, -1, sizeof(*op)); 1267 1268 #ifdef CONFIG_PROFILER 1269 s->del_op_count++; 1270 #endif 1271 } 1272 1273 #ifdef USE_LIVENESS_ANALYSIS 1274 /* liveness analysis: end of function: all temps are dead, and globals 1275 should be in memory. */ 1276 static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps, 1277 uint8_t *mem_temps) 1278 { 1279 memset(dead_temps, 1, s->nb_temps); 1280 memset(mem_temps, 1, s->nb_globals); 1281 memset(mem_temps + s->nb_globals, 0, s->nb_temps - s->nb_globals); 1282 } 1283 1284 /* liveness analysis: end of basic block: all temps are dead, globals 1285 and local temps should be in memory. */ 1286 static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps, 1287 uint8_t *mem_temps) 1288 { 1289 int i; 1290 1291 memset(dead_temps, 1, s->nb_temps); 1292 memset(mem_temps, 1, s->nb_globals); 1293 for(i = s->nb_globals; i < s->nb_temps; i++) { 1294 mem_temps[i] = s->temps[i].temp_local; 1295 } 1296 } 1297 1298 /* Liveness analysis : update the opc_dead_args array to tell if a 1299 given input arguments is dead. Instructions updating dead 1300 temporaries are removed. */ 1301 static void tcg_liveness_analysis(TCGContext *s) 1302 { 1303 uint8_t *dead_temps, *mem_temps; 1304 int oi, oi_prev, nb_ops; 1305 1306 nb_ops = s->gen_next_op_idx; 1307 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); 1308 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); 1309 1310 dead_temps = tcg_malloc(s->nb_temps); 1311 mem_temps = tcg_malloc(s->nb_temps); 1312 tcg_la_func_end(s, dead_temps, mem_temps); 1313 1314 for (oi = s->gen_last_op_idx; oi >= 0; oi = oi_prev) { 1315 int i, nb_iargs, nb_oargs; 1316 TCGOpcode opc_new, opc_new2; 1317 bool have_opc_new2; 1318 uint16_t dead_args; 1319 uint8_t sync_args; 1320 TCGArg arg; 1321 1322 TCGOp * const op = &s->gen_op_buf[oi]; 1323 TCGArg * const args = &s->gen_opparam_buf[op->args]; 1324 TCGOpcode opc = op->opc; 1325 const TCGOpDef *def = &tcg_op_defs[opc]; 1326 1327 oi_prev = op->prev; 1328 1329 switch (opc) { 1330 case INDEX_op_call: 1331 { 1332 int call_flags; 1333 1334 nb_oargs = op->callo; 1335 nb_iargs = op->calli; 1336 call_flags = args[nb_oargs + nb_iargs + 1]; 1337 1338 /* pure functions can be removed if their result is unused */ 1339 if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) { 1340 for (i = 0; i < nb_oargs; i++) { 1341 arg = args[i]; 1342 if (!dead_temps[arg] || mem_temps[arg]) { 1343 goto do_not_remove_call; 1344 } 1345 } 1346 goto do_remove; 1347 } else { 1348 do_not_remove_call: 1349 1350 /* output args are dead */ 1351 dead_args = 0; 1352 sync_args = 0; 1353 for (i = 0; i < nb_oargs; i++) { 1354 arg = args[i]; 1355 if (dead_temps[arg]) { 1356 dead_args |= (1 << i); 1357 } 1358 if (mem_temps[arg]) { 1359 sync_args |= (1 << i); 1360 } 1361 dead_temps[arg] = 1; 1362 mem_temps[arg] = 0; 1363 } 1364 1365 if (!(call_flags & TCG_CALL_NO_READ_GLOBALS)) { 1366 /* globals should be synced to memory */ 1367 memset(mem_temps, 1, s->nb_globals); 1368 } 1369 if (!(call_flags & (TCG_CALL_NO_WRITE_GLOBALS | 1370 TCG_CALL_NO_READ_GLOBALS))) { 1371 /* globals should go back to memory */ 1372 memset(dead_temps, 1, s->nb_globals); 1373 } 1374 1375 /* input args are live */ 1376 for (i = nb_oargs; i < nb_iargs + nb_oargs; i++) { 1377 arg = args[i]; 1378 if (arg != TCG_CALL_DUMMY_ARG) { 1379 if (dead_temps[arg]) { 1380 dead_args |= (1 << i); 1381 } 1382 dead_temps[arg] = 0; 1383 } 1384 } 1385 s->op_dead_args[oi] = dead_args; 1386 s->op_sync_args[oi] = sync_args; 1387 } 1388 } 1389 break; 1390 case INDEX_op_debug_insn_start: 1391 break; 1392 case INDEX_op_discard: 1393 /* mark the temporary as dead */ 1394 dead_temps[args[0]] = 1; 1395 mem_temps[args[0]] = 0; 1396 break; 1397 1398 case INDEX_op_add2_i32: 1399 opc_new = INDEX_op_add_i32; 1400 goto do_addsub2; 1401 case INDEX_op_sub2_i32: 1402 opc_new = INDEX_op_sub_i32; 1403 goto do_addsub2; 1404 case INDEX_op_add2_i64: 1405 opc_new = INDEX_op_add_i64; 1406 goto do_addsub2; 1407 case INDEX_op_sub2_i64: 1408 opc_new = INDEX_op_sub_i64; 1409 do_addsub2: 1410 nb_iargs = 4; 1411 nb_oargs = 2; 1412 /* Test if the high part of the operation is dead, but not 1413 the low part. The result can be optimized to a simple 1414 add or sub. This happens often for x86_64 guest when the 1415 cpu mode is set to 32 bit. */ 1416 if (dead_temps[args[1]] && !mem_temps[args[1]]) { 1417 if (dead_temps[args[0]] && !mem_temps[args[0]]) { 1418 goto do_remove; 1419 } 1420 /* Replace the opcode and adjust the args in place, 1421 leaving 3 unused args at the end. */ 1422 op->opc = opc = opc_new; 1423 args[1] = args[2]; 1424 args[2] = args[4]; 1425 /* Fall through and mark the single-word operation live. */ 1426 nb_iargs = 2; 1427 nb_oargs = 1; 1428 } 1429 goto do_not_remove; 1430 1431 case INDEX_op_mulu2_i32: 1432 opc_new = INDEX_op_mul_i32; 1433 opc_new2 = INDEX_op_muluh_i32; 1434 have_opc_new2 = TCG_TARGET_HAS_muluh_i32; 1435 goto do_mul2; 1436 case INDEX_op_muls2_i32: 1437 opc_new = INDEX_op_mul_i32; 1438 opc_new2 = INDEX_op_mulsh_i32; 1439 have_opc_new2 = TCG_TARGET_HAS_mulsh_i32; 1440 goto do_mul2; 1441 case INDEX_op_mulu2_i64: 1442 opc_new = INDEX_op_mul_i64; 1443 opc_new2 = INDEX_op_muluh_i64; 1444 have_opc_new2 = TCG_TARGET_HAS_muluh_i64; 1445 goto do_mul2; 1446 case INDEX_op_muls2_i64: 1447 opc_new = INDEX_op_mul_i64; 1448 opc_new2 = INDEX_op_mulsh_i64; 1449 have_opc_new2 = TCG_TARGET_HAS_mulsh_i64; 1450 goto do_mul2; 1451 do_mul2: 1452 nb_iargs = 2; 1453 nb_oargs = 2; 1454 if (dead_temps[args[1]] && !mem_temps[args[1]]) { 1455 if (dead_temps[args[0]] && !mem_temps[args[0]]) { 1456 /* Both parts of the operation are dead. */ 1457 goto do_remove; 1458 } 1459 /* The high part of the operation is dead; generate the low. */ 1460 op->opc = opc = opc_new; 1461 args[1] = args[2]; 1462 args[2] = args[3]; 1463 } else if (have_opc_new2 && dead_temps[args[0]] 1464 && !mem_temps[args[0]]) { 1465 /* The low part of the operation is dead; generate the high. */ 1466 op->opc = opc = opc_new2; 1467 args[0] = args[1]; 1468 args[1] = args[2]; 1469 args[2] = args[3]; 1470 } else { 1471 goto do_not_remove; 1472 } 1473 /* Mark the single-word operation live. */ 1474 nb_oargs = 1; 1475 goto do_not_remove; 1476 1477 default: 1478 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */ 1479 nb_iargs = def->nb_iargs; 1480 nb_oargs = def->nb_oargs; 1481 1482 /* Test if the operation can be removed because all 1483 its outputs are dead. We assume that nb_oargs == 0 1484 implies side effects */ 1485 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) { 1486 for (i = 0; i < nb_oargs; i++) { 1487 arg = args[i]; 1488 if (!dead_temps[arg] || mem_temps[arg]) { 1489 goto do_not_remove; 1490 } 1491 } 1492 do_remove: 1493 tcg_op_remove(s, op); 1494 } else { 1495 do_not_remove: 1496 /* output args are dead */ 1497 dead_args = 0; 1498 sync_args = 0; 1499 for (i = 0; i < nb_oargs; i++) { 1500 arg = args[i]; 1501 if (dead_temps[arg]) { 1502 dead_args |= (1 << i); 1503 } 1504 if (mem_temps[arg]) { 1505 sync_args |= (1 << i); 1506 } 1507 dead_temps[arg] = 1; 1508 mem_temps[arg] = 0; 1509 } 1510 1511 /* if end of basic block, update */ 1512 if (def->flags & TCG_OPF_BB_END) { 1513 tcg_la_bb_end(s, dead_temps, mem_temps); 1514 } else if (def->flags & TCG_OPF_SIDE_EFFECTS) { 1515 /* globals should be synced to memory */ 1516 memset(mem_temps, 1, s->nb_globals); 1517 } 1518 1519 /* input args are live */ 1520 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 1521 arg = args[i]; 1522 if (dead_temps[arg]) { 1523 dead_args |= (1 << i); 1524 } 1525 dead_temps[arg] = 0; 1526 } 1527 s->op_dead_args[oi] = dead_args; 1528 s->op_sync_args[oi] = sync_args; 1529 } 1530 break; 1531 } 1532 } 1533 } 1534 #else 1535 /* dummy liveness analysis */ 1536 static void tcg_liveness_analysis(TCGContext *s) 1537 { 1538 int nb_ops; 1539 nb_ops = s->gen_opc_ptr - s->gen_opc_buf; 1540 1541 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); 1542 memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t)); 1543 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); 1544 memset(s->op_sync_args, 0, nb_ops * sizeof(uint8_t)); 1545 } 1546 #endif 1547 1548 #ifndef NDEBUG 1549 static void dump_regs(TCGContext *s) 1550 { 1551 TCGTemp *ts; 1552 int i; 1553 char buf[64]; 1554 1555 for(i = 0; i < s->nb_temps; i++) { 1556 ts = &s->temps[i]; 1557 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i)); 1558 switch(ts->val_type) { 1559 case TEMP_VAL_REG: 1560 printf("%s", tcg_target_reg_names[ts->reg]); 1561 break; 1562 case TEMP_VAL_MEM: 1563 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]); 1564 break; 1565 case TEMP_VAL_CONST: 1566 printf("$0x%" TCG_PRIlx, ts->val); 1567 break; 1568 case TEMP_VAL_DEAD: 1569 printf("D"); 1570 break; 1571 default: 1572 printf("???"); 1573 break; 1574 } 1575 printf("\n"); 1576 } 1577 1578 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 1579 if (s->reg_to_temp[i] >= 0) { 1580 printf("%s: %s\n", 1581 tcg_target_reg_names[i], 1582 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i])); 1583 } 1584 } 1585 } 1586 1587 static void check_regs(TCGContext *s) 1588 { 1589 int reg, k; 1590 TCGTemp *ts; 1591 char buf[64]; 1592 1593 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 1594 k = s->reg_to_temp[reg]; 1595 if (k >= 0) { 1596 ts = &s->temps[k]; 1597 if (ts->val_type != TEMP_VAL_REG || 1598 ts->reg != reg) { 1599 printf("Inconsistency for register %s:\n", 1600 tcg_target_reg_names[reg]); 1601 goto fail; 1602 } 1603 } 1604 } 1605 for(k = 0; k < s->nb_temps; k++) { 1606 ts = &s->temps[k]; 1607 if (ts->val_type == TEMP_VAL_REG && 1608 !ts->fixed_reg && 1609 s->reg_to_temp[ts->reg] != k) { 1610 printf("Inconsistency for temp %s:\n", 1611 tcg_get_arg_str_idx(s, buf, sizeof(buf), k)); 1612 fail: 1613 printf("reg state:\n"); 1614 dump_regs(s); 1615 tcg_abort(); 1616 } 1617 } 1618 } 1619 #endif 1620 1621 static void temp_allocate_frame(TCGContext *s, int temp) 1622 { 1623 TCGTemp *ts; 1624 ts = &s->temps[temp]; 1625 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64) 1626 /* Sparc64 stack is accessed with offset of 2047 */ 1627 s->current_frame_offset = (s->current_frame_offset + 1628 (tcg_target_long)sizeof(tcg_target_long) - 1) & 1629 ~(sizeof(tcg_target_long) - 1); 1630 #endif 1631 if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) > 1632 s->frame_end) { 1633 tcg_abort(); 1634 } 1635 ts->mem_offset = s->current_frame_offset; 1636 ts->mem_reg = s->frame_reg; 1637 ts->mem_allocated = 1; 1638 s->current_frame_offset += sizeof(tcg_target_long); 1639 } 1640 1641 /* sync register 'reg' by saving it to the corresponding temporary */ 1642 static inline void tcg_reg_sync(TCGContext *s, int reg) 1643 { 1644 TCGTemp *ts; 1645 int temp; 1646 1647 temp = s->reg_to_temp[reg]; 1648 ts = &s->temps[temp]; 1649 assert(ts->val_type == TEMP_VAL_REG); 1650 if (!ts->mem_coherent && !ts->fixed_reg) { 1651 if (!ts->mem_allocated) { 1652 temp_allocate_frame(s, temp); 1653 } 1654 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 1655 } 1656 ts->mem_coherent = 1; 1657 } 1658 1659 /* free register 'reg' by spilling the corresponding temporary if necessary */ 1660 static void tcg_reg_free(TCGContext *s, int reg) 1661 { 1662 int temp; 1663 1664 temp = s->reg_to_temp[reg]; 1665 if (temp != -1) { 1666 tcg_reg_sync(s, reg); 1667 s->temps[temp].val_type = TEMP_VAL_MEM; 1668 s->reg_to_temp[reg] = -1; 1669 } 1670 } 1671 1672 /* Allocate a register belonging to reg1 & ~reg2 */ 1673 static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2) 1674 { 1675 int i, reg; 1676 TCGRegSet reg_ct; 1677 1678 tcg_regset_andnot(reg_ct, reg1, reg2); 1679 1680 /* first try free registers */ 1681 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { 1682 reg = tcg_target_reg_alloc_order[i]; 1683 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1) 1684 return reg; 1685 } 1686 1687 /* XXX: do better spill choice */ 1688 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { 1689 reg = tcg_target_reg_alloc_order[i]; 1690 if (tcg_regset_test_reg(reg_ct, reg)) { 1691 tcg_reg_free(s, reg); 1692 return reg; 1693 } 1694 } 1695 1696 tcg_abort(); 1697 } 1698 1699 /* mark a temporary as dead. */ 1700 static inline void temp_dead(TCGContext *s, int temp) 1701 { 1702 TCGTemp *ts; 1703 1704 ts = &s->temps[temp]; 1705 if (!ts->fixed_reg) { 1706 if (ts->val_type == TEMP_VAL_REG) { 1707 s->reg_to_temp[ts->reg] = -1; 1708 } 1709 if (temp < s->nb_globals || ts->temp_local) { 1710 ts->val_type = TEMP_VAL_MEM; 1711 } else { 1712 ts->val_type = TEMP_VAL_DEAD; 1713 } 1714 } 1715 } 1716 1717 /* sync a temporary to memory. 'allocated_regs' is used in case a 1718 temporary registers needs to be allocated to store a constant. */ 1719 static inline void temp_sync(TCGContext *s, int temp, TCGRegSet allocated_regs) 1720 { 1721 TCGTemp *ts; 1722 1723 ts = &s->temps[temp]; 1724 if (!ts->fixed_reg) { 1725 switch(ts->val_type) { 1726 case TEMP_VAL_CONST: 1727 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 1728 allocated_regs); 1729 ts->val_type = TEMP_VAL_REG; 1730 s->reg_to_temp[ts->reg] = temp; 1731 ts->mem_coherent = 0; 1732 tcg_out_movi(s, ts->type, ts->reg, ts->val); 1733 /* fallthrough*/ 1734 case TEMP_VAL_REG: 1735 tcg_reg_sync(s, ts->reg); 1736 break; 1737 case TEMP_VAL_DEAD: 1738 case TEMP_VAL_MEM: 1739 break; 1740 default: 1741 tcg_abort(); 1742 } 1743 } 1744 } 1745 1746 /* save a temporary to memory. 'allocated_regs' is used in case a 1747 temporary registers needs to be allocated to store a constant. */ 1748 static inline void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs) 1749 { 1750 #ifdef USE_LIVENESS_ANALYSIS 1751 /* The liveness analysis already ensures that globals are back 1752 in memory. Keep an assert for safety. */ 1753 assert(s->temps[temp].val_type == TEMP_VAL_MEM || s->temps[temp].fixed_reg); 1754 #else 1755 temp_sync(s, temp, allocated_regs); 1756 temp_dead(s, temp); 1757 #endif 1758 } 1759 1760 /* save globals to their canonical location and assume they can be 1761 modified be the following code. 'allocated_regs' is used in case a 1762 temporary registers needs to be allocated to store a constant. */ 1763 static void save_globals(TCGContext *s, TCGRegSet allocated_regs) 1764 { 1765 int i; 1766 1767 for(i = 0; i < s->nb_globals; i++) { 1768 temp_save(s, i, allocated_regs); 1769 } 1770 } 1771 1772 /* sync globals to their canonical location and assume they can be 1773 read by the following code. 'allocated_regs' is used in case a 1774 temporary registers needs to be allocated to store a constant. */ 1775 static void sync_globals(TCGContext *s, TCGRegSet allocated_regs) 1776 { 1777 int i; 1778 1779 for (i = 0; i < s->nb_globals; i++) { 1780 #ifdef USE_LIVENESS_ANALYSIS 1781 assert(s->temps[i].val_type != TEMP_VAL_REG || s->temps[i].fixed_reg || 1782 s->temps[i].mem_coherent); 1783 #else 1784 temp_sync(s, i, allocated_regs); 1785 #endif 1786 } 1787 } 1788 1789 /* at the end of a basic block, we assume all temporaries are dead and 1790 all globals are stored at their canonical location. */ 1791 static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs) 1792 { 1793 TCGTemp *ts; 1794 int i; 1795 1796 for(i = s->nb_globals; i < s->nb_temps; i++) { 1797 ts = &s->temps[i]; 1798 if (ts->temp_local) { 1799 temp_save(s, i, allocated_regs); 1800 } else { 1801 #ifdef USE_LIVENESS_ANALYSIS 1802 /* The liveness analysis already ensures that temps are dead. 1803 Keep an assert for safety. */ 1804 assert(ts->val_type == TEMP_VAL_DEAD); 1805 #else 1806 temp_dead(s, i); 1807 #endif 1808 } 1809 } 1810 1811 save_globals(s, allocated_regs); 1812 } 1813 1814 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1) 1815 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1) 1816 1817 static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args, 1818 uint16_t dead_args, uint8_t sync_args) 1819 { 1820 TCGTemp *ots; 1821 tcg_target_ulong val; 1822 1823 ots = &s->temps[args[0]]; 1824 val = args[1]; 1825 1826 if (ots->fixed_reg) { 1827 /* for fixed registers, we do not do any constant 1828 propagation */ 1829 tcg_out_movi(s, ots->type, ots->reg, val); 1830 } else { 1831 /* The movi is not explicitly generated here */ 1832 if (ots->val_type == TEMP_VAL_REG) 1833 s->reg_to_temp[ots->reg] = -1; 1834 ots->val_type = TEMP_VAL_CONST; 1835 ots->val = val; 1836 } 1837 if (NEED_SYNC_ARG(0)) { 1838 temp_sync(s, args[0], s->reserved_regs); 1839 } 1840 if (IS_DEAD_ARG(0)) { 1841 temp_dead(s, args[0]); 1842 } 1843 } 1844 1845 static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def, 1846 const TCGArg *args, uint16_t dead_args, 1847 uint8_t sync_args) 1848 { 1849 TCGRegSet allocated_regs; 1850 TCGTemp *ts, *ots; 1851 TCGType otype, itype; 1852 1853 tcg_regset_set(allocated_regs, s->reserved_regs); 1854 ots = &s->temps[args[0]]; 1855 ts = &s->temps[args[1]]; 1856 1857 /* Note that otype != itype for no-op truncation. */ 1858 otype = ots->type; 1859 itype = ts->type; 1860 1861 /* If the source value is not in a register, and we're going to be 1862 forced to have it in a register in order to perform the copy, 1863 then copy the SOURCE value into its own register first. That way 1864 we don't have to reload SOURCE the next time it is used. */ 1865 if (((NEED_SYNC_ARG(0) || ots->fixed_reg) && ts->val_type != TEMP_VAL_REG) 1866 || ts->val_type == TEMP_VAL_MEM) { 1867 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[itype], 1868 allocated_regs); 1869 if (ts->val_type == TEMP_VAL_MEM) { 1870 tcg_out_ld(s, itype, ts->reg, ts->mem_reg, ts->mem_offset); 1871 ts->mem_coherent = 1; 1872 } else if (ts->val_type == TEMP_VAL_CONST) { 1873 tcg_out_movi(s, itype, ts->reg, ts->val); 1874 } 1875 s->reg_to_temp[ts->reg] = args[1]; 1876 ts->val_type = TEMP_VAL_REG; 1877 } 1878 1879 if (IS_DEAD_ARG(0) && !ots->fixed_reg) { 1880 /* mov to a non-saved dead register makes no sense (even with 1881 liveness analysis disabled). */ 1882 assert(NEED_SYNC_ARG(0)); 1883 /* The code above should have moved the temp to a register. */ 1884 assert(ts->val_type == TEMP_VAL_REG); 1885 if (!ots->mem_allocated) { 1886 temp_allocate_frame(s, args[0]); 1887 } 1888 tcg_out_st(s, otype, ts->reg, ots->mem_reg, ots->mem_offset); 1889 if (IS_DEAD_ARG(1)) { 1890 temp_dead(s, args[1]); 1891 } 1892 temp_dead(s, args[0]); 1893 } else if (ts->val_type == TEMP_VAL_CONST) { 1894 /* propagate constant */ 1895 if (ots->val_type == TEMP_VAL_REG) { 1896 s->reg_to_temp[ots->reg] = -1; 1897 } 1898 ots->val_type = TEMP_VAL_CONST; 1899 ots->val = ts->val; 1900 } else { 1901 /* The code in the first if block should have moved the 1902 temp to a register. */ 1903 assert(ts->val_type == TEMP_VAL_REG); 1904 if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) { 1905 /* the mov can be suppressed */ 1906 if (ots->val_type == TEMP_VAL_REG) { 1907 s->reg_to_temp[ots->reg] = -1; 1908 } 1909 ots->reg = ts->reg; 1910 temp_dead(s, args[1]); 1911 } else { 1912 if (ots->val_type != TEMP_VAL_REG) { 1913 /* When allocating a new register, make sure to not spill the 1914 input one. */ 1915 tcg_regset_set_reg(allocated_regs, ts->reg); 1916 ots->reg = tcg_reg_alloc(s, tcg_target_available_regs[otype], 1917 allocated_regs); 1918 } 1919 tcg_out_mov(s, otype, ots->reg, ts->reg); 1920 } 1921 ots->val_type = TEMP_VAL_REG; 1922 ots->mem_coherent = 0; 1923 s->reg_to_temp[ots->reg] = args[0]; 1924 if (NEED_SYNC_ARG(0)) { 1925 tcg_reg_sync(s, ots->reg); 1926 } 1927 } 1928 } 1929 1930 static void tcg_reg_alloc_op(TCGContext *s, 1931 const TCGOpDef *def, TCGOpcode opc, 1932 const TCGArg *args, uint16_t dead_args, 1933 uint8_t sync_args) 1934 { 1935 TCGRegSet allocated_regs; 1936 int i, k, nb_iargs, nb_oargs, reg; 1937 TCGArg arg; 1938 const TCGArgConstraint *arg_ct; 1939 TCGTemp *ts; 1940 TCGArg new_args[TCG_MAX_OP_ARGS]; 1941 int const_args[TCG_MAX_OP_ARGS]; 1942 1943 nb_oargs = def->nb_oargs; 1944 nb_iargs = def->nb_iargs; 1945 1946 /* copy constants */ 1947 memcpy(new_args + nb_oargs + nb_iargs, 1948 args + nb_oargs + nb_iargs, 1949 sizeof(TCGArg) * def->nb_cargs); 1950 1951 /* satisfy input constraints */ 1952 tcg_regset_set(allocated_regs, s->reserved_regs); 1953 for(k = 0; k < nb_iargs; k++) { 1954 i = def->sorted_args[nb_oargs + k]; 1955 arg = args[i]; 1956 arg_ct = &def->args_ct[i]; 1957 ts = &s->temps[arg]; 1958 if (ts->val_type == TEMP_VAL_MEM) { 1959 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 1960 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 1961 ts->val_type = TEMP_VAL_REG; 1962 ts->reg = reg; 1963 ts->mem_coherent = 1; 1964 s->reg_to_temp[reg] = arg; 1965 } else if (ts->val_type == TEMP_VAL_CONST) { 1966 if (tcg_target_const_match(ts->val, ts->type, arg_ct)) { 1967 /* constant is OK for instruction */ 1968 const_args[i] = 1; 1969 new_args[i] = ts->val; 1970 goto iarg_end; 1971 } else { 1972 /* need to move to a register */ 1973 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 1974 tcg_out_movi(s, ts->type, reg, ts->val); 1975 ts->val_type = TEMP_VAL_REG; 1976 ts->reg = reg; 1977 ts->mem_coherent = 0; 1978 s->reg_to_temp[reg] = arg; 1979 } 1980 } 1981 assert(ts->val_type == TEMP_VAL_REG); 1982 if (arg_ct->ct & TCG_CT_IALIAS) { 1983 if (ts->fixed_reg) { 1984 /* if fixed register, we must allocate a new register 1985 if the alias is not the same register */ 1986 if (arg != args[arg_ct->alias_index]) 1987 goto allocate_in_reg; 1988 } else { 1989 /* if the input is aliased to an output and if it is 1990 not dead after the instruction, we must allocate 1991 a new register and move it */ 1992 if (!IS_DEAD_ARG(i)) { 1993 goto allocate_in_reg; 1994 } 1995 } 1996 } 1997 reg = ts->reg; 1998 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) { 1999 /* nothing to do : the constraint is satisfied */ 2000 } else { 2001 allocate_in_reg: 2002 /* allocate a new register matching the constraint 2003 and move the temporary register into it */ 2004 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2005 tcg_out_mov(s, ts->type, reg, ts->reg); 2006 } 2007 new_args[i] = reg; 2008 const_args[i] = 0; 2009 tcg_regset_set_reg(allocated_regs, reg); 2010 iarg_end: ; 2011 } 2012 2013 /* mark dead temporaries and free the associated registers */ 2014 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 2015 if (IS_DEAD_ARG(i)) { 2016 temp_dead(s, args[i]); 2017 } 2018 } 2019 2020 if (def->flags & TCG_OPF_BB_END) { 2021 tcg_reg_alloc_bb_end(s, allocated_regs); 2022 } else { 2023 if (def->flags & TCG_OPF_CALL_CLOBBER) { 2024 /* XXX: permit generic clobber register list ? */ 2025 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 2026 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { 2027 tcg_reg_free(s, reg); 2028 } 2029 } 2030 } 2031 if (def->flags & TCG_OPF_SIDE_EFFECTS) { 2032 /* sync globals if the op has side effects and might trigger 2033 an exception. */ 2034 sync_globals(s, allocated_regs); 2035 } 2036 2037 /* satisfy the output constraints */ 2038 tcg_regset_set(allocated_regs, s->reserved_regs); 2039 for(k = 0; k < nb_oargs; k++) { 2040 i = def->sorted_args[k]; 2041 arg = args[i]; 2042 arg_ct = &def->args_ct[i]; 2043 ts = &s->temps[arg]; 2044 if (arg_ct->ct & TCG_CT_ALIAS) { 2045 reg = new_args[arg_ct->alias_index]; 2046 } else { 2047 /* if fixed register, we try to use it */ 2048 reg = ts->reg; 2049 if (ts->fixed_reg && 2050 tcg_regset_test_reg(arg_ct->u.regs, reg)) { 2051 goto oarg_end; 2052 } 2053 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2054 } 2055 tcg_regset_set_reg(allocated_regs, reg); 2056 /* if a fixed register is used, then a move will be done afterwards */ 2057 if (!ts->fixed_reg) { 2058 if (ts->val_type == TEMP_VAL_REG) { 2059 s->reg_to_temp[ts->reg] = -1; 2060 } 2061 ts->val_type = TEMP_VAL_REG; 2062 ts->reg = reg; 2063 /* temp value is modified, so the value kept in memory is 2064 potentially not the same */ 2065 ts->mem_coherent = 0; 2066 s->reg_to_temp[reg] = arg; 2067 } 2068 oarg_end: 2069 new_args[i] = reg; 2070 } 2071 } 2072 2073 /* emit instruction */ 2074 tcg_out_op(s, opc, new_args, const_args); 2075 2076 /* move the outputs in the correct register if needed */ 2077 for(i = 0; i < nb_oargs; i++) { 2078 ts = &s->temps[args[i]]; 2079 reg = new_args[i]; 2080 if (ts->fixed_reg && ts->reg != reg) { 2081 tcg_out_mov(s, ts->type, ts->reg, reg); 2082 } 2083 if (NEED_SYNC_ARG(i)) { 2084 tcg_reg_sync(s, reg); 2085 } 2086 if (IS_DEAD_ARG(i)) { 2087 temp_dead(s, args[i]); 2088 } 2089 } 2090 } 2091 2092 #ifdef TCG_TARGET_STACK_GROWSUP 2093 #define STACK_DIR(x) (-(x)) 2094 #else 2095 #define STACK_DIR(x) (x) 2096 #endif 2097 2098 static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs, 2099 const TCGArg * const args, uint16_t dead_args, 2100 uint8_t sync_args) 2101 { 2102 int flags, nb_regs, i, reg; 2103 TCGArg arg; 2104 TCGTemp *ts; 2105 intptr_t stack_offset; 2106 size_t call_stack_size; 2107 tcg_insn_unit *func_addr; 2108 int allocate_args; 2109 TCGRegSet allocated_regs; 2110 2111 func_addr = (tcg_insn_unit *)(intptr_t)args[nb_oargs + nb_iargs]; 2112 flags = args[nb_oargs + nb_iargs + 1]; 2113 2114 nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs); 2115 if (nb_regs > nb_iargs) { 2116 nb_regs = nb_iargs; 2117 } 2118 2119 /* assign stack slots first */ 2120 call_stack_size = (nb_iargs - nb_regs) * sizeof(tcg_target_long); 2121 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) & 2122 ~(TCG_TARGET_STACK_ALIGN - 1); 2123 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE); 2124 if (allocate_args) { 2125 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed, 2126 preallocate call stack */ 2127 tcg_abort(); 2128 } 2129 2130 stack_offset = TCG_TARGET_CALL_STACK_OFFSET; 2131 for(i = nb_regs; i < nb_iargs; i++) { 2132 arg = args[nb_oargs + i]; 2133 #ifdef TCG_TARGET_STACK_GROWSUP 2134 stack_offset -= sizeof(tcg_target_long); 2135 #endif 2136 if (arg != TCG_CALL_DUMMY_ARG) { 2137 ts = &s->temps[arg]; 2138 if (ts->val_type == TEMP_VAL_REG) { 2139 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset); 2140 } else if (ts->val_type == TEMP_VAL_MEM) { 2141 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 2142 s->reserved_regs); 2143 /* XXX: not correct if reading values from the stack */ 2144 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2145 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); 2146 } else if (ts->val_type == TEMP_VAL_CONST) { 2147 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 2148 s->reserved_regs); 2149 /* XXX: sign extend may be needed on some targets */ 2150 tcg_out_movi(s, ts->type, reg, ts->val); 2151 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); 2152 } else { 2153 tcg_abort(); 2154 } 2155 } 2156 #ifndef TCG_TARGET_STACK_GROWSUP 2157 stack_offset += sizeof(tcg_target_long); 2158 #endif 2159 } 2160 2161 /* assign input registers */ 2162 tcg_regset_set(allocated_regs, s->reserved_regs); 2163 for(i = 0; i < nb_regs; i++) { 2164 arg = args[nb_oargs + i]; 2165 if (arg != TCG_CALL_DUMMY_ARG) { 2166 ts = &s->temps[arg]; 2167 reg = tcg_target_call_iarg_regs[i]; 2168 tcg_reg_free(s, reg); 2169 if (ts->val_type == TEMP_VAL_REG) { 2170 if (ts->reg != reg) { 2171 tcg_out_mov(s, ts->type, reg, ts->reg); 2172 } 2173 } else if (ts->val_type == TEMP_VAL_MEM) { 2174 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2175 } else if (ts->val_type == TEMP_VAL_CONST) { 2176 /* XXX: sign extend ? */ 2177 tcg_out_movi(s, ts->type, reg, ts->val); 2178 } else { 2179 tcg_abort(); 2180 } 2181 tcg_regset_set_reg(allocated_regs, reg); 2182 } 2183 } 2184 2185 /* mark dead temporaries and free the associated registers */ 2186 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) { 2187 if (IS_DEAD_ARG(i)) { 2188 temp_dead(s, args[i]); 2189 } 2190 } 2191 2192 /* clobber call registers */ 2193 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 2194 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { 2195 tcg_reg_free(s, reg); 2196 } 2197 } 2198 2199 /* Save globals if they might be written by the helper, sync them if 2200 they might be read. */ 2201 if (flags & TCG_CALL_NO_READ_GLOBALS) { 2202 /* Nothing to do */ 2203 } else if (flags & TCG_CALL_NO_WRITE_GLOBALS) { 2204 sync_globals(s, allocated_regs); 2205 } else { 2206 save_globals(s, allocated_regs); 2207 } 2208 2209 tcg_out_call(s, func_addr); 2210 2211 /* assign output registers and emit moves if needed */ 2212 for(i = 0; i < nb_oargs; i++) { 2213 arg = args[i]; 2214 ts = &s->temps[arg]; 2215 reg = tcg_target_call_oarg_regs[i]; 2216 assert(s->reg_to_temp[reg] == -1); 2217 2218 if (ts->fixed_reg) { 2219 if (ts->reg != reg) { 2220 tcg_out_mov(s, ts->type, ts->reg, reg); 2221 } 2222 } else { 2223 if (ts->val_type == TEMP_VAL_REG) { 2224 s->reg_to_temp[ts->reg] = -1; 2225 } 2226 ts->val_type = TEMP_VAL_REG; 2227 ts->reg = reg; 2228 ts->mem_coherent = 0; 2229 s->reg_to_temp[reg] = arg; 2230 if (NEED_SYNC_ARG(i)) { 2231 tcg_reg_sync(s, reg); 2232 } 2233 if (IS_DEAD_ARG(i)) { 2234 temp_dead(s, args[i]); 2235 } 2236 } 2237 } 2238 } 2239 2240 #ifdef CONFIG_PROFILER 2241 2242 static int64_t tcg_table_op_count[NB_OPS]; 2243 2244 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf) 2245 { 2246 int i; 2247 2248 for (i = 0; i < NB_OPS; i++) { 2249 cpu_fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, 2250 tcg_table_op_count[i]); 2251 } 2252 } 2253 #else 2254 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf) 2255 { 2256 cpu_fprintf(f, "[TCG profiler not compiled]\n"); 2257 } 2258 #endif 2259 2260 2261 static inline int tcg_gen_code_common(TCGContext *s, 2262 tcg_insn_unit *gen_code_buf, 2263 long search_pc) 2264 { 2265 int oi, oi_next; 2266 2267 #ifdef DEBUG_DISAS 2268 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { 2269 qemu_log("OP:\n"); 2270 tcg_dump_ops(s); 2271 qemu_log("\n"); 2272 } 2273 #endif 2274 2275 #ifdef CONFIG_PROFILER 2276 s->opt_time -= profile_getclock(); 2277 #endif 2278 2279 #ifdef USE_TCG_OPTIMIZATIONS 2280 tcg_optimize(s); 2281 #endif 2282 2283 #ifdef CONFIG_PROFILER 2284 s->opt_time += profile_getclock(); 2285 s->la_time -= profile_getclock(); 2286 #endif 2287 2288 tcg_liveness_analysis(s); 2289 2290 #ifdef CONFIG_PROFILER 2291 s->la_time += profile_getclock(); 2292 #endif 2293 2294 #ifdef DEBUG_DISAS 2295 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) { 2296 qemu_log("OP after optimization and liveness analysis:\n"); 2297 tcg_dump_ops(s); 2298 qemu_log("\n"); 2299 } 2300 #endif 2301 2302 tcg_reg_alloc_start(s); 2303 2304 s->code_buf = gen_code_buf; 2305 s->code_ptr = gen_code_buf; 2306 2307 tcg_out_tb_init(s); 2308 2309 for (oi = s->gen_first_op_idx; oi >= 0; oi = oi_next) { 2310 TCGOp * const op = &s->gen_op_buf[oi]; 2311 TCGArg * const args = &s->gen_opparam_buf[op->args]; 2312 TCGOpcode opc = op->opc; 2313 const TCGOpDef *def = &tcg_op_defs[opc]; 2314 uint16_t dead_args = s->op_dead_args[oi]; 2315 uint8_t sync_args = s->op_sync_args[oi]; 2316 2317 oi_next = op->next; 2318 #ifdef CONFIG_PROFILER 2319 tcg_table_op_count[opc]++; 2320 #endif 2321 2322 switch (opc) { 2323 case INDEX_op_mov_i32: 2324 case INDEX_op_mov_i64: 2325 tcg_reg_alloc_mov(s, def, args, dead_args, sync_args); 2326 break; 2327 case INDEX_op_movi_i32: 2328 case INDEX_op_movi_i64: 2329 tcg_reg_alloc_movi(s, args, dead_args, sync_args); 2330 break; 2331 case INDEX_op_debug_insn_start: 2332 break; 2333 case INDEX_op_discard: 2334 temp_dead(s, args[0]); 2335 break; 2336 case INDEX_op_set_label: 2337 tcg_reg_alloc_bb_end(s, s->reserved_regs); 2338 tcg_out_label(s, arg_label(args[0]), s->code_ptr); 2339 break; 2340 case INDEX_op_call: 2341 tcg_reg_alloc_call(s, op->callo, op->calli, args, 2342 dead_args, sync_args); 2343 break; 2344 default: 2345 /* Sanity check that we've not introduced any unhandled opcodes. */ 2346 if (def->flags & TCG_OPF_NOT_PRESENT) { 2347 tcg_abort(); 2348 } 2349 /* Note: in order to speed up the code, it would be much 2350 faster to have specialized register allocator functions for 2351 some common argument patterns */ 2352 tcg_reg_alloc_op(s, def, opc, args, dead_args, sync_args); 2353 break; 2354 } 2355 if (search_pc >= 0 && search_pc < tcg_current_code_size(s)) { 2356 return oi; 2357 } 2358 #ifndef NDEBUG 2359 check_regs(s); 2360 #endif 2361 } 2362 2363 /* Generate TB finalization at the end of block */ 2364 tcg_out_tb_finalize(s); 2365 return -1; 2366 } 2367 2368 int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf) 2369 { 2370 #ifdef CONFIG_PROFILER 2371 { 2372 int n; 2373 2374 n = s->gen_last_op_idx + 1; 2375 s->op_count += n; 2376 if (n > s->op_count_max) { 2377 s->op_count_max = n; 2378 } 2379 2380 n = s->nb_temps; 2381 s->temp_count += n; 2382 if (n > s->temp_count_max) { 2383 s->temp_count_max = n; 2384 } 2385 } 2386 #endif 2387 2388 tcg_gen_code_common(s, gen_code_buf, -1); 2389 2390 /* flush instruction cache */ 2391 flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr); 2392 2393 return tcg_current_code_size(s); 2394 } 2395 2396 /* Return the index of the micro operation such as the pc after is < 2397 offset bytes from the start of the TB. The contents of gen_code_buf must 2398 not be changed, though writing the same values is ok. 2399 Return -1 if not found. */ 2400 int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf, 2401 long offset) 2402 { 2403 return tcg_gen_code_common(s, gen_code_buf, offset); 2404 } 2405 2406 #ifdef CONFIG_PROFILER 2407 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) 2408 { 2409 TCGContext *s = &tcg_ctx; 2410 int64_t tot; 2411 2412 tot = s->interm_time + s->code_time; 2413 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n", 2414 tot, tot / 2.4e9); 2415 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n", 2416 s->tb_count, 2417 s->tb_count1 - s->tb_count, 2418 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0); 2419 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n", 2420 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max); 2421 cpu_fprintf(f, "deleted ops/TB %0.2f\n", 2422 s->tb_count ? 2423 (double)s->del_op_count / s->tb_count : 0); 2424 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n", 2425 s->tb_count ? 2426 (double)s->temp_count / s->tb_count : 0, 2427 s->temp_count_max); 2428 2429 cpu_fprintf(f, "cycles/op %0.1f\n", 2430 s->op_count ? (double)tot / s->op_count : 0); 2431 cpu_fprintf(f, "cycles/in byte %0.1f\n", 2432 s->code_in_len ? (double)tot / s->code_in_len : 0); 2433 cpu_fprintf(f, "cycles/out byte %0.1f\n", 2434 s->code_out_len ? (double)tot / s->code_out_len : 0); 2435 if (tot == 0) 2436 tot = 1; 2437 cpu_fprintf(f, " gen_interm time %0.1f%%\n", 2438 (double)s->interm_time / tot * 100.0); 2439 cpu_fprintf(f, " gen_code time %0.1f%%\n", 2440 (double)s->code_time / tot * 100.0); 2441 cpu_fprintf(f, "optim./code time %0.1f%%\n", 2442 (double)s->opt_time / (s->code_time ? s->code_time : 1) 2443 * 100.0); 2444 cpu_fprintf(f, "liveness/code time %0.1f%%\n", 2445 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0); 2446 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n", 2447 s->restore_count); 2448 cpu_fprintf(f, " avg cycles %0.1f\n", 2449 s->restore_count ? (double)s->restore_time / s->restore_count : 0); 2450 } 2451 #else 2452 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) 2453 { 2454 cpu_fprintf(f, "[TCG profiler not compiled]\n"); 2455 } 2456 #endif 2457 2458 #ifdef ELF_HOST_MACHINE 2459 /* In order to use this feature, the backend needs to do three things: 2460 2461 (1) Define ELF_HOST_MACHINE to indicate both what value to 2462 put into the ELF image and to indicate support for the feature. 2463 2464 (2) Define tcg_register_jit. This should create a buffer containing 2465 the contents of a .debug_frame section that describes the post- 2466 prologue unwind info for the tcg machine. 2467 2468 (3) Call tcg_register_jit_int, with the constructed .debug_frame. 2469 */ 2470 2471 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */ 2472 typedef enum { 2473 JIT_NOACTION = 0, 2474 JIT_REGISTER_FN, 2475 JIT_UNREGISTER_FN 2476 } jit_actions_t; 2477 2478 struct jit_code_entry { 2479 struct jit_code_entry *next_entry; 2480 struct jit_code_entry *prev_entry; 2481 const void *symfile_addr; 2482 uint64_t symfile_size; 2483 }; 2484 2485 struct jit_descriptor { 2486 uint32_t version; 2487 uint32_t action_flag; 2488 struct jit_code_entry *relevant_entry; 2489 struct jit_code_entry *first_entry; 2490 }; 2491 2492 void __jit_debug_register_code(void) __attribute__((noinline)); 2493 void __jit_debug_register_code(void) 2494 { 2495 asm(""); 2496 } 2497 2498 /* Must statically initialize the version, because GDB may check 2499 the version before we can set it. */ 2500 struct jit_descriptor __jit_debug_descriptor = { 1, 0, 0, 0 }; 2501 2502 /* End GDB interface. */ 2503 2504 static int find_string(const char *strtab, const char *str) 2505 { 2506 const char *p = strtab + 1; 2507 2508 while (1) { 2509 if (strcmp(p, str) == 0) { 2510 return p - strtab; 2511 } 2512 p += strlen(p) + 1; 2513 } 2514 } 2515 2516 static void tcg_register_jit_int(void *buf_ptr, size_t buf_size, 2517 const void *debug_frame, 2518 size_t debug_frame_size) 2519 { 2520 struct __attribute__((packed)) DebugInfo { 2521 uint32_t len; 2522 uint16_t version; 2523 uint32_t abbrev; 2524 uint8_t ptr_size; 2525 uint8_t cu_die; 2526 uint16_t cu_lang; 2527 uintptr_t cu_low_pc; 2528 uintptr_t cu_high_pc; 2529 uint8_t fn_die; 2530 char fn_name[16]; 2531 uintptr_t fn_low_pc; 2532 uintptr_t fn_high_pc; 2533 uint8_t cu_eoc; 2534 }; 2535 2536 struct ElfImage { 2537 ElfW(Ehdr) ehdr; 2538 ElfW(Phdr) phdr; 2539 ElfW(Shdr) shdr[7]; 2540 ElfW(Sym) sym[2]; 2541 struct DebugInfo di; 2542 uint8_t da[24]; 2543 char str[80]; 2544 }; 2545 2546 struct ElfImage *img; 2547 2548 static const struct ElfImage img_template = { 2549 .ehdr = { 2550 .e_ident[EI_MAG0] = ELFMAG0, 2551 .e_ident[EI_MAG1] = ELFMAG1, 2552 .e_ident[EI_MAG2] = ELFMAG2, 2553 .e_ident[EI_MAG3] = ELFMAG3, 2554 .e_ident[EI_CLASS] = ELF_CLASS, 2555 .e_ident[EI_DATA] = ELF_DATA, 2556 .e_ident[EI_VERSION] = EV_CURRENT, 2557 .e_type = ET_EXEC, 2558 .e_machine = ELF_HOST_MACHINE, 2559 .e_version = EV_CURRENT, 2560 .e_phoff = offsetof(struct ElfImage, phdr), 2561 .e_shoff = offsetof(struct ElfImage, shdr), 2562 .e_ehsize = sizeof(ElfW(Shdr)), 2563 .e_phentsize = sizeof(ElfW(Phdr)), 2564 .e_phnum = 1, 2565 .e_shentsize = sizeof(ElfW(Shdr)), 2566 .e_shnum = ARRAY_SIZE(img->shdr), 2567 .e_shstrndx = ARRAY_SIZE(img->shdr) - 1, 2568 #ifdef ELF_HOST_FLAGS 2569 .e_flags = ELF_HOST_FLAGS, 2570 #endif 2571 #ifdef ELF_OSABI 2572 .e_ident[EI_OSABI] = ELF_OSABI, 2573 #endif 2574 }, 2575 .phdr = { 2576 .p_type = PT_LOAD, 2577 .p_flags = PF_X, 2578 }, 2579 .shdr = { 2580 [0] = { .sh_type = SHT_NULL }, 2581 /* Trick: The contents of code_gen_buffer are not present in 2582 this fake ELF file; that got allocated elsewhere. Therefore 2583 we mark .text as SHT_NOBITS (similar to .bss) so that readers 2584 will not look for contents. We can record any address. */ 2585 [1] = { /* .text */ 2586 .sh_type = SHT_NOBITS, 2587 .sh_flags = SHF_EXECINSTR | SHF_ALLOC, 2588 }, 2589 [2] = { /* .debug_info */ 2590 .sh_type = SHT_PROGBITS, 2591 .sh_offset = offsetof(struct ElfImage, di), 2592 .sh_size = sizeof(struct DebugInfo), 2593 }, 2594 [3] = { /* .debug_abbrev */ 2595 .sh_type = SHT_PROGBITS, 2596 .sh_offset = offsetof(struct ElfImage, da), 2597 .sh_size = sizeof(img->da), 2598 }, 2599 [4] = { /* .debug_frame */ 2600 .sh_type = SHT_PROGBITS, 2601 .sh_offset = sizeof(struct ElfImage), 2602 }, 2603 [5] = { /* .symtab */ 2604 .sh_type = SHT_SYMTAB, 2605 .sh_offset = offsetof(struct ElfImage, sym), 2606 .sh_size = sizeof(img->sym), 2607 .sh_info = 1, 2608 .sh_link = ARRAY_SIZE(img->shdr) - 1, 2609 .sh_entsize = sizeof(ElfW(Sym)), 2610 }, 2611 [6] = { /* .strtab */ 2612 .sh_type = SHT_STRTAB, 2613 .sh_offset = offsetof(struct ElfImage, str), 2614 .sh_size = sizeof(img->str), 2615 } 2616 }, 2617 .sym = { 2618 [1] = { /* code_gen_buffer */ 2619 .st_info = ELF_ST_INFO(STB_GLOBAL, STT_FUNC), 2620 .st_shndx = 1, 2621 } 2622 }, 2623 .di = { 2624 .len = sizeof(struct DebugInfo) - 4, 2625 .version = 2, 2626 .ptr_size = sizeof(void *), 2627 .cu_die = 1, 2628 .cu_lang = 0x8001, /* DW_LANG_Mips_Assembler */ 2629 .fn_die = 2, 2630 .fn_name = "code_gen_buffer" 2631 }, 2632 .da = { 2633 1, /* abbrev number (the cu) */ 2634 0x11, 1, /* DW_TAG_compile_unit, has children */ 2635 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */ 2636 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ 2637 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ 2638 0, 0, /* end of abbrev */ 2639 2, /* abbrev number (the fn) */ 2640 0x2e, 0, /* DW_TAG_subprogram, no children */ 2641 0x3, 0x8, /* DW_AT_name, DW_FORM_string */ 2642 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ 2643 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ 2644 0, 0, /* end of abbrev */ 2645 0 /* no more abbrev */ 2646 }, 2647 .str = "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0" 2648 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer", 2649 }; 2650 2651 /* We only need a single jit entry; statically allocate it. */ 2652 static struct jit_code_entry one_entry; 2653 2654 uintptr_t buf = (uintptr_t)buf_ptr; 2655 size_t img_size = sizeof(struct ElfImage) + debug_frame_size; 2656 DebugFrameHeader *dfh; 2657 2658 img = g_malloc(img_size); 2659 *img = img_template; 2660 2661 img->phdr.p_vaddr = buf; 2662 img->phdr.p_paddr = buf; 2663 img->phdr.p_memsz = buf_size; 2664 2665 img->shdr[1].sh_name = find_string(img->str, ".text"); 2666 img->shdr[1].sh_addr = buf; 2667 img->shdr[1].sh_size = buf_size; 2668 2669 img->shdr[2].sh_name = find_string(img->str, ".debug_info"); 2670 img->shdr[3].sh_name = find_string(img->str, ".debug_abbrev"); 2671 2672 img->shdr[4].sh_name = find_string(img->str, ".debug_frame"); 2673 img->shdr[4].sh_size = debug_frame_size; 2674 2675 img->shdr[5].sh_name = find_string(img->str, ".symtab"); 2676 img->shdr[6].sh_name = find_string(img->str, ".strtab"); 2677 2678 img->sym[1].st_name = find_string(img->str, "code_gen_buffer"); 2679 img->sym[1].st_value = buf; 2680 img->sym[1].st_size = buf_size; 2681 2682 img->di.cu_low_pc = buf; 2683 img->di.cu_high_pc = buf + buf_size; 2684 img->di.fn_low_pc = buf; 2685 img->di.fn_high_pc = buf + buf_size; 2686 2687 dfh = (DebugFrameHeader *)(img + 1); 2688 memcpy(dfh, debug_frame, debug_frame_size); 2689 dfh->fde.func_start = buf; 2690 dfh->fde.func_len = buf_size; 2691 2692 #ifdef DEBUG_JIT 2693 /* Enable this block to be able to debug the ELF image file creation. 2694 One can use readelf, objdump, or other inspection utilities. */ 2695 { 2696 FILE *f = fopen("/tmp/qemu.jit", "w+b"); 2697 if (f) { 2698 if (fwrite(img, img_size, 1, f) != img_size) { 2699 /* Avoid stupid unused return value warning for fwrite. */ 2700 } 2701 fclose(f); 2702 } 2703 } 2704 #endif 2705 2706 one_entry.symfile_addr = img; 2707 one_entry.symfile_size = img_size; 2708 2709 __jit_debug_descriptor.action_flag = JIT_REGISTER_FN; 2710 __jit_debug_descriptor.relevant_entry = &one_entry; 2711 __jit_debug_descriptor.first_entry = &one_entry; 2712 __jit_debug_register_code(); 2713 } 2714 #else 2715 /* No support for the feature. Provide the entry point expected by exec.c, 2716 and implement the internal function we declared earlier. */ 2717 2718 static void tcg_register_jit_int(void *buf, size_t size, 2719 const void *debug_frame, 2720 size_t debug_frame_size) 2721 { 2722 } 2723 2724 void tcg_register_jit(void *buf, size_t buf_size) 2725 { 2726 } 2727 #endif /* ELF_HOST_MACHINE */ 2728