1 /* 2 * Tiny Code Generator for QEMU 3 * 4 * Copyright (c) 2008 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 /* define it to use liveness analysis (better code) */ 26 #define USE_LIVENESS_ANALYSIS 27 #define USE_TCG_OPTIMIZATIONS 28 29 #include "config.h" 30 31 /* Define to jump the ELF file used to communicate with GDB. */ 32 #undef DEBUG_JIT 33 34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG) 35 /* define it to suppress various consistency checks (faster) */ 36 #define NDEBUG 37 #endif 38 39 #include "qemu-common.h" 40 #include "qemu/cache-utils.h" 41 #include "qemu/host-utils.h" 42 #include "qemu/timer.h" 43 44 /* Note: the long term plan is to reduce the dependancies on the QEMU 45 CPU definitions. Currently they are used for qemu_ld/st 46 instructions */ 47 #define NO_CPU_IO_DEFS 48 #include "cpu.h" 49 50 #include "tcg-op.h" 51 52 #if UINTPTR_MAX == UINT32_MAX 53 # define ELF_CLASS ELFCLASS32 54 #else 55 # define ELF_CLASS ELFCLASS64 56 #endif 57 #ifdef HOST_WORDS_BIGENDIAN 58 # define ELF_DATA ELFDATA2MSB 59 #else 60 # define ELF_DATA ELFDATA2LSB 61 #endif 62 63 #include "elf.h" 64 65 /* Forward declarations for functions declared in tcg-target.c and used here. */ 66 static void tcg_target_init(TCGContext *s); 67 static void tcg_target_qemu_prologue(TCGContext *s); 68 static void patch_reloc(uint8_t *code_ptr, int type, 69 intptr_t value, intptr_t addend); 70 71 /* The CIE and FDE header definitions will be common to all hosts. */ 72 typedef struct { 73 uint32_t len __attribute__((aligned((sizeof(void *))))); 74 uint32_t id; 75 uint8_t version; 76 char augmentation[1]; 77 uint8_t code_align; 78 uint8_t data_align; 79 uint8_t return_column; 80 } DebugFrameCIE; 81 82 typedef struct QEMU_PACKED { 83 uint32_t len __attribute__((aligned((sizeof(void *))))); 84 uint32_t cie_offset; 85 uintptr_t func_start; 86 uintptr_t func_len; 87 } DebugFrameFDEHeader; 88 89 static void tcg_register_jit_int(void *buf, size_t size, 90 void *debug_frame, size_t debug_frame_size) 91 __attribute__((unused)); 92 93 /* Forward declarations for functions declared and used in tcg-target.c. */ 94 static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str); 95 static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, 96 intptr_t arg2); 97 static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg); 98 static void tcg_out_movi(TCGContext *s, TCGType type, 99 TCGReg ret, tcg_target_long arg); 100 static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, 101 const int *const_args); 102 static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1, 103 intptr_t arg2); 104 static int tcg_target_const_match(tcg_target_long val, 105 const TCGArgConstraint *arg_ct); 106 107 TCGOpDef tcg_op_defs[] = { 108 #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags }, 109 #include "tcg-opc.h" 110 #undef DEF 111 }; 112 const size_t tcg_op_defs_max = ARRAY_SIZE(tcg_op_defs); 113 114 static TCGRegSet tcg_target_available_regs[2]; 115 static TCGRegSet tcg_target_call_clobber_regs; 116 117 static inline void tcg_out8(TCGContext *s, uint8_t v) 118 { 119 *s->code_ptr++ = v; 120 } 121 122 static inline void tcg_out16(TCGContext *s, uint16_t v) 123 { 124 uint8_t *p = s->code_ptr; 125 *(uint16_t *)p = v; 126 s->code_ptr = p + 2; 127 } 128 129 static inline void tcg_out32(TCGContext *s, uint32_t v) 130 { 131 uint8_t *p = s->code_ptr; 132 *(uint32_t *)p = v; 133 s->code_ptr = p + 4; 134 } 135 136 static inline void tcg_out64(TCGContext *s, uint64_t v) 137 { 138 uint8_t *p = s->code_ptr; 139 *(uint64_t *)p = v; 140 s->code_ptr = p + 8; 141 } 142 143 /* label relocation processing */ 144 145 static void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type, 146 int label_index, intptr_t addend) 147 { 148 TCGLabel *l; 149 TCGRelocation *r; 150 151 l = &s->labels[label_index]; 152 if (l->has_value) { 153 /* FIXME: This may break relocations on RISC targets that 154 modify instruction fields in place. The caller may not have 155 written the initial value. */ 156 patch_reloc(code_ptr, type, l->u.value, addend); 157 } else { 158 /* add a new relocation entry */ 159 r = tcg_malloc(sizeof(TCGRelocation)); 160 r->type = type; 161 r->ptr = code_ptr; 162 r->addend = addend; 163 r->next = l->u.first_reloc; 164 l->u.first_reloc = r; 165 } 166 } 167 168 static void tcg_out_label(TCGContext *s, int label_index, void *ptr) 169 { 170 TCGLabel *l; 171 TCGRelocation *r; 172 intptr_t value = (intptr_t)ptr; 173 174 l = &s->labels[label_index]; 175 if (l->has_value) { 176 tcg_abort(); 177 } 178 r = l->u.first_reloc; 179 while (r != NULL) { 180 patch_reloc(r->ptr, r->type, value, r->addend); 181 r = r->next; 182 } 183 l->has_value = 1; 184 l->u.value = value; 185 } 186 187 int gen_new_label(void) 188 { 189 TCGContext *s = &tcg_ctx; 190 int idx; 191 TCGLabel *l; 192 193 if (s->nb_labels >= TCG_MAX_LABELS) 194 tcg_abort(); 195 idx = s->nb_labels++; 196 l = &s->labels[idx]; 197 l->has_value = 0; 198 l->u.first_reloc = NULL; 199 return idx; 200 } 201 202 #include "tcg-target.c" 203 204 /* pool based memory allocation */ 205 void *tcg_malloc_internal(TCGContext *s, int size) 206 { 207 TCGPool *p; 208 int pool_size; 209 210 if (size > TCG_POOL_CHUNK_SIZE) { 211 /* big malloc: insert a new pool (XXX: could optimize) */ 212 p = g_malloc(sizeof(TCGPool) + size); 213 p->size = size; 214 p->next = s->pool_first_large; 215 s->pool_first_large = p; 216 return p->data; 217 } else { 218 p = s->pool_current; 219 if (!p) { 220 p = s->pool_first; 221 if (!p) 222 goto new_pool; 223 } else { 224 if (!p->next) { 225 new_pool: 226 pool_size = TCG_POOL_CHUNK_SIZE; 227 p = g_malloc(sizeof(TCGPool) + pool_size); 228 p->size = pool_size; 229 p->next = NULL; 230 if (s->pool_current) 231 s->pool_current->next = p; 232 else 233 s->pool_first = p; 234 } else { 235 p = p->next; 236 } 237 } 238 } 239 s->pool_current = p; 240 s->pool_cur = p->data + size; 241 s->pool_end = p->data + p->size; 242 return p->data; 243 } 244 245 void tcg_pool_reset(TCGContext *s) 246 { 247 TCGPool *p, *t; 248 for (p = s->pool_first_large; p; p = t) { 249 t = p->next; 250 g_free(p); 251 } 252 s->pool_first_large = NULL; 253 s->pool_cur = s->pool_end = NULL; 254 s->pool_current = NULL; 255 } 256 257 void tcg_context_init(TCGContext *s) 258 { 259 int op, total_args, n; 260 TCGOpDef *def; 261 TCGArgConstraint *args_ct; 262 int *sorted_args; 263 264 memset(s, 0, sizeof(*s)); 265 s->nb_globals = 0; 266 267 /* Count total number of arguments and allocate the corresponding 268 space */ 269 total_args = 0; 270 for(op = 0; op < NB_OPS; op++) { 271 def = &tcg_op_defs[op]; 272 n = def->nb_iargs + def->nb_oargs; 273 total_args += n; 274 } 275 276 args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args); 277 sorted_args = g_malloc(sizeof(int) * total_args); 278 279 for(op = 0; op < NB_OPS; op++) { 280 def = &tcg_op_defs[op]; 281 def->args_ct = args_ct; 282 def->sorted_args = sorted_args; 283 n = def->nb_iargs + def->nb_oargs; 284 sorted_args += n; 285 args_ct += n; 286 } 287 288 tcg_target_init(s); 289 } 290 291 void tcg_prologue_init(TCGContext *s) 292 { 293 /* init global prologue and epilogue */ 294 s->code_buf = s->code_gen_prologue; 295 s->code_ptr = s->code_buf; 296 tcg_target_qemu_prologue(s); 297 flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr); 298 299 #ifdef DEBUG_DISAS 300 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { 301 size_t size = s->code_ptr - s->code_buf; 302 qemu_log("PROLOGUE: [size=%zu]\n", size); 303 log_disas(s->code_buf, size); 304 qemu_log("\n"); 305 qemu_log_flush(); 306 } 307 #endif 308 } 309 310 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size) 311 { 312 s->frame_start = start; 313 s->frame_end = start + size; 314 s->frame_reg = reg; 315 } 316 317 void tcg_func_start(TCGContext *s) 318 { 319 int i; 320 tcg_pool_reset(s); 321 s->nb_temps = s->nb_globals; 322 for(i = 0; i < (TCG_TYPE_COUNT * 2); i++) 323 s->first_free_temp[i] = -1; 324 s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS); 325 s->nb_labels = 0; 326 s->current_frame_offset = s->frame_start; 327 328 #ifdef CONFIG_DEBUG_TCG 329 s->goto_tb_issue_mask = 0; 330 #endif 331 332 s->gen_opc_ptr = s->gen_opc_buf; 333 s->gen_opparam_ptr = s->gen_opparam_buf; 334 335 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU) 336 /* Initialize qemu_ld/st labels to assist code generation at the end of TB 337 for TLB miss cases at the end of TB */ 338 s->qemu_ldst_labels = tcg_malloc(sizeof(TCGLabelQemuLdst) * 339 TCG_MAX_QEMU_LDST); 340 s->nb_qemu_ldst_labels = 0; 341 #endif 342 } 343 344 static inline void tcg_temp_alloc(TCGContext *s, int n) 345 { 346 if (n > TCG_MAX_TEMPS) 347 tcg_abort(); 348 } 349 350 static inline int tcg_global_reg_new_internal(TCGType type, int reg, 351 const char *name) 352 { 353 TCGContext *s = &tcg_ctx; 354 TCGTemp *ts; 355 int idx; 356 357 #if TCG_TARGET_REG_BITS == 32 358 if (type != TCG_TYPE_I32) 359 tcg_abort(); 360 #endif 361 if (tcg_regset_test_reg(s->reserved_regs, reg)) 362 tcg_abort(); 363 idx = s->nb_globals; 364 tcg_temp_alloc(s, s->nb_globals + 1); 365 ts = &s->temps[s->nb_globals]; 366 ts->base_type = type; 367 ts->type = type; 368 ts->fixed_reg = 1; 369 ts->reg = reg; 370 ts->name = name; 371 s->nb_globals++; 372 tcg_regset_set_reg(s->reserved_regs, reg); 373 return idx; 374 } 375 376 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name) 377 { 378 int idx; 379 380 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name); 381 return MAKE_TCGV_I32(idx); 382 } 383 384 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name) 385 { 386 int idx; 387 388 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name); 389 return MAKE_TCGV_I64(idx); 390 } 391 392 static inline int tcg_global_mem_new_internal(TCGType type, int reg, 393 intptr_t offset, 394 const char *name) 395 { 396 TCGContext *s = &tcg_ctx; 397 TCGTemp *ts; 398 int idx; 399 400 idx = s->nb_globals; 401 #if TCG_TARGET_REG_BITS == 32 402 if (type == TCG_TYPE_I64) { 403 char buf[64]; 404 tcg_temp_alloc(s, s->nb_globals + 2); 405 ts = &s->temps[s->nb_globals]; 406 ts->base_type = type; 407 ts->type = TCG_TYPE_I32; 408 ts->fixed_reg = 0; 409 ts->mem_allocated = 1; 410 ts->mem_reg = reg; 411 #ifdef TCG_TARGET_WORDS_BIGENDIAN 412 ts->mem_offset = offset + 4; 413 #else 414 ts->mem_offset = offset; 415 #endif 416 pstrcpy(buf, sizeof(buf), name); 417 pstrcat(buf, sizeof(buf), "_0"); 418 ts->name = strdup(buf); 419 ts++; 420 421 ts->base_type = type; 422 ts->type = TCG_TYPE_I32; 423 ts->fixed_reg = 0; 424 ts->mem_allocated = 1; 425 ts->mem_reg = reg; 426 #ifdef TCG_TARGET_WORDS_BIGENDIAN 427 ts->mem_offset = offset; 428 #else 429 ts->mem_offset = offset + 4; 430 #endif 431 pstrcpy(buf, sizeof(buf), name); 432 pstrcat(buf, sizeof(buf), "_1"); 433 ts->name = strdup(buf); 434 435 s->nb_globals += 2; 436 } else 437 #endif 438 { 439 tcg_temp_alloc(s, s->nb_globals + 1); 440 ts = &s->temps[s->nb_globals]; 441 ts->base_type = type; 442 ts->type = type; 443 ts->fixed_reg = 0; 444 ts->mem_allocated = 1; 445 ts->mem_reg = reg; 446 ts->mem_offset = offset; 447 ts->name = name; 448 s->nb_globals++; 449 } 450 return idx; 451 } 452 453 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name) 454 { 455 int idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name); 456 return MAKE_TCGV_I32(idx); 457 } 458 459 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name) 460 { 461 int idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name); 462 return MAKE_TCGV_I64(idx); 463 } 464 465 static inline int tcg_temp_new_internal(TCGType type, int temp_local) 466 { 467 TCGContext *s = &tcg_ctx; 468 TCGTemp *ts; 469 int idx, k; 470 471 k = type; 472 if (temp_local) 473 k += TCG_TYPE_COUNT; 474 idx = s->first_free_temp[k]; 475 if (idx != -1) { 476 /* There is already an available temp with the 477 right type */ 478 ts = &s->temps[idx]; 479 s->first_free_temp[k] = ts->next_free_temp; 480 ts->temp_allocated = 1; 481 assert(ts->temp_local == temp_local); 482 } else { 483 idx = s->nb_temps; 484 #if TCG_TARGET_REG_BITS == 32 485 if (type == TCG_TYPE_I64) { 486 tcg_temp_alloc(s, s->nb_temps + 2); 487 ts = &s->temps[s->nb_temps]; 488 ts->base_type = type; 489 ts->type = TCG_TYPE_I32; 490 ts->temp_allocated = 1; 491 ts->temp_local = temp_local; 492 ts->name = NULL; 493 ts++; 494 ts->base_type = TCG_TYPE_I32; 495 ts->type = TCG_TYPE_I32; 496 ts->temp_allocated = 1; 497 ts->temp_local = temp_local; 498 ts->name = NULL; 499 s->nb_temps += 2; 500 } else 501 #endif 502 { 503 tcg_temp_alloc(s, s->nb_temps + 1); 504 ts = &s->temps[s->nb_temps]; 505 ts->base_type = type; 506 ts->type = type; 507 ts->temp_allocated = 1; 508 ts->temp_local = temp_local; 509 ts->name = NULL; 510 s->nb_temps++; 511 } 512 } 513 514 #if defined(CONFIG_DEBUG_TCG) 515 s->temps_in_use++; 516 #endif 517 return idx; 518 } 519 520 TCGv_i32 tcg_temp_new_internal_i32(int temp_local) 521 { 522 int idx; 523 524 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local); 525 return MAKE_TCGV_I32(idx); 526 } 527 528 TCGv_i64 tcg_temp_new_internal_i64(int temp_local) 529 { 530 int idx; 531 532 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local); 533 return MAKE_TCGV_I64(idx); 534 } 535 536 static inline void tcg_temp_free_internal(int idx) 537 { 538 TCGContext *s = &tcg_ctx; 539 TCGTemp *ts; 540 int k; 541 542 #if defined(CONFIG_DEBUG_TCG) 543 s->temps_in_use--; 544 if (s->temps_in_use < 0) { 545 fprintf(stderr, "More temporaries freed than allocated!\n"); 546 } 547 #endif 548 549 assert(idx >= s->nb_globals && idx < s->nb_temps); 550 ts = &s->temps[idx]; 551 assert(ts->temp_allocated != 0); 552 ts->temp_allocated = 0; 553 k = ts->base_type; 554 if (ts->temp_local) 555 k += TCG_TYPE_COUNT; 556 ts->next_free_temp = s->first_free_temp[k]; 557 s->first_free_temp[k] = idx; 558 } 559 560 void tcg_temp_free_i32(TCGv_i32 arg) 561 { 562 tcg_temp_free_internal(GET_TCGV_I32(arg)); 563 } 564 565 void tcg_temp_free_i64(TCGv_i64 arg) 566 { 567 tcg_temp_free_internal(GET_TCGV_I64(arg)); 568 } 569 570 TCGv_i32 tcg_const_i32(int32_t val) 571 { 572 TCGv_i32 t0; 573 t0 = tcg_temp_new_i32(); 574 tcg_gen_movi_i32(t0, val); 575 return t0; 576 } 577 578 TCGv_i64 tcg_const_i64(int64_t val) 579 { 580 TCGv_i64 t0; 581 t0 = tcg_temp_new_i64(); 582 tcg_gen_movi_i64(t0, val); 583 return t0; 584 } 585 586 TCGv_i32 tcg_const_local_i32(int32_t val) 587 { 588 TCGv_i32 t0; 589 t0 = tcg_temp_local_new_i32(); 590 tcg_gen_movi_i32(t0, val); 591 return t0; 592 } 593 594 TCGv_i64 tcg_const_local_i64(int64_t val) 595 { 596 TCGv_i64 t0; 597 t0 = tcg_temp_local_new_i64(); 598 tcg_gen_movi_i64(t0, val); 599 return t0; 600 } 601 602 #if defined(CONFIG_DEBUG_TCG) 603 void tcg_clear_temp_count(void) 604 { 605 TCGContext *s = &tcg_ctx; 606 s->temps_in_use = 0; 607 } 608 609 int tcg_check_temp_count(void) 610 { 611 TCGContext *s = &tcg_ctx; 612 if (s->temps_in_use) { 613 /* Clear the count so that we don't give another 614 * warning immediately next time around. 615 */ 616 s->temps_in_use = 0; 617 return 1; 618 } 619 return 0; 620 } 621 #endif 622 623 void tcg_register_helper(void *func, const char *name) 624 { 625 TCGContext *s = &tcg_ctx; 626 int n; 627 if ((s->nb_helpers + 1) > s->allocated_helpers) { 628 n = s->allocated_helpers; 629 if (n == 0) { 630 n = 4; 631 } else { 632 n *= 2; 633 } 634 s->helpers = realloc(s->helpers, n * sizeof(TCGHelperInfo)); 635 s->allocated_helpers = n; 636 } 637 s->helpers[s->nb_helpers].func = (uintptr_t)func; 638 s->helpers[s->nb_helpers].name = name; 639 s->nb_helpers++; 640 } 641 642 /* Note: we convert the 64 bit args to 32 bit and do some alignment 643 and endian swap. Maybe it would be better to do the alignment 644 and endian swap in tcg_reg_alloc_call(). */ 645 void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags, 646 int sizemask, TCGArg ret, int nargs, TCGArg *args) 647 { 648 int i; 649 int real_args; 650 int nb_rets; 651 TCGArg *nparam; 652 653 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 654 for (i = 0; i < nargs; ++i) { 655 int is_64bit = sizemask & (1 << (i+1)*2); 656 int is_signed = sizemask & (2 << (i+1)*2); 657 if (!is_64bit) { 658 TCGv_i64 temp = tcg_temp_new_i64(); 659 TCGv_i64 orig = MAKE_TCGV_I64(args[i]); 660 if (is_signed) { 661 tcg_gen_ext32s_i64(temp, orig); 662 } else { 663 tcg_gen_ext32u_i64(temp, orig); 664 } 665 args[i] = GET_TCGV_I64(temp); 666 } 667 } 668 #endif /* TCG_TARGET_EXTEND_ARGS */ 669 670 *s->gen_opc_ptr++ = INDEX_op_call; 671 nparam = s->gen_opparam_ptr++; 672 if (ret != TCG_CALL_DUMMY_ARG) { 673 #if TCG_TARGET_REG_BITS < 64 674 if (sizemask & 1) { 675 #ifdef TCG_TARGET_WORDS_BIGENDIAN 676 *s->gen_opparam_ptr++ = ret + 1; 677 *s->gen_opparam_ptr++ = ret; 678 #else 679 *s->gen_opparam_ptr++ = ret; 680 *s->gen_opparam_ptr++ = ret + 1; 681 #endif 682 nb_rets = 2; 683 } else 684 #endif 685 { 686 *s->gen_opparam_ptr++ = ret; 687 nb_rets = 1; 688 } 689 } else { 690 nb_rets = 0; 691 } 692 real_args = 0; 693 for (i = 0; i < nargs; i++) { 694 #if TCG_TARGET_REG_BITS < 64 695 int is_64bit = sizemask & (1 << (i+1)*2); 696 if (is_64bit) { 697 #ifdef TCG_TARGET_CALL_ALIGN_ARGS 698 /* some targets want aligned 64 bit args */ 699 if (real_args & 1) { 700 *s->gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG; 701 real_args++; 702 } 703 #endif 704 /* If stack grows up, then we will be placing successive 705 arguments at lower addresses, which means we need to 706 reverse the order compared to how we would normally 707 treat either big or little-endian. For those arguments 708 that will wind up in registers, this still works for 709 HPPA (the only current STACK_GROWSUP target) since the 710 argument registers are *also* allocated in decreasing 711 order. If another such target is added, this logic may 712 have to get more complicated to differentiate between 713 stack arguments and register arguments. */ 714 #if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP) 715 *s->gen_opparam_ptr++ = args[i] + 1; 716 *s->gen_opparam_ptr++ = args[i]; 717 #else 718 *s->gen_opparam_ptr++ = args[i]; 719 *s->gen_opparam_ptr++ = args[i] + 1; 720 #endif 721 real_args += 2; 722 continue; 723 } 724 #endif /* TCG_TARGET_REG_BITS < 64 */ 725 726 *s->gen_opparam_ptr++ = args[i]; 727 real_args++; 728 } 729 *s->gen_opparam_ptr++ = GET_TCGV_PTR(func); 730 731 *s->gen_opparam_ptr++ = flags; 732 733 *nparam = (nb_rets << 16) | (real_args + 1); 734 735 /* total parameters, needed to go backward in the instruction stream */ 736 *s->gen_opparam_ptr++ = 1 + nb_rets + real_args + 3; 737 738 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 739 for (i = 0; i < nargs; ++i) { 740 int is_64bit = sizemask & (1 << (i+1)*2); 741 if (!is_64bit) { 742 TCGv_i64 temp = MAKE_TCGV_I64(args[i]); 743 tcg_temp_free_i64(temp); 744 } 745 } 746 #endif /* TCG_TARGET_EXTEND_ARGS */ 747 } 748 749 #if TCG_TARGET_REG_BITS == 32 750 void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1, 751 int c, int right, int arith) 752 { 753 if (c == 0) { 754 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1)); 755 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1)); 756 } else if (c >= 32) { 757 c -= 32; 758 if (right) { 759 if (arith) { 760 tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c); 761 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31); 762 } else { 763 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c); 764 tcg_gen_movi_i32(TCGV_HIGH(ret), 0); 765 } 766 } else { 767 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c); 768 tcg_gen_movi_i32(TCGV_LOW(ret), 0); 769 } 770 } else { 771 TCGv_i32 t0, t1; 772 773 t0 = tcg_temp_new_i32(); 774 t1 = tcg_temp_new_i32(); 775 if (right) { 776 tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c); 777 if (arith) 778 tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c); 779 else 780 tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c); 781 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c); 782 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0); 783 tcg_gen_mov_i32(TCGV_HIGH(ret), t1); 784 } else { 785 tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c); 786 /* Note: ret can be the same as arg1, so we use t1 */ 787 tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c); 788 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c); 789 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0); 790 tcg_gen_mov_i32(TCGV_LOW(ret), t1); 791 } 792 tcg_temp_free_i32(t0); 793 tcg_temp_free_i32(t1); 794 } 795 } 796 #endif 797 798 799 static void tcg_reg_alloc_start(TCGContext *s) 800 { 801 int i; 802 TCGTemp *ts; 803 for(i = 0; i < s->nb_globals; i++) { 804 ts = &s->temps[i]; 805 if (ts->fixed_reg) { 806 ts->val_type = TEMP_VAL_REG; 807 } else { 808 ts->val_type = TEMP_VAL_MEM; 809 } 810 } 811 for(i = s->nb_globals; i < s->nb_temps; i++) { 812 ts = &s->temps[i]; 813 if (ts->temp_local) { 814 ts->val_type = TEMP_VAL_MEM; 815 } else { 816 ts->val_type = TEMP_VAL_DEAD; 817 } 818 ts->mem_allocated = 0; 819 ts->fixed_reg = 0; 820 } 821 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 822 s->reg_to_temp[i] = -1; 823 } 824 } 825 826 static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size, 827 int idx) 828 { 829 TCGTemp *ts; 830 831 assert(idx >= 0 && idx < s->nb_temps); 832 ts = &s->temps[idx]; 833 if (idx < s->nb_globals) { 834 pstrcpy(buf, buf_size, ts->name); 835 } else { 836 if (ts->temp_local) 837 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals); 838 else 839 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals); 840 } 841 return buf; 842 } 843 844 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg) 845 { 846 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg)); 847 } 848 849 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg) 850 { 851 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg)); 852 } 853 854 static int helper_cmp(const void *p1, const void *p2) 855 { 856 const TCGHelperInfo *th1 = p1; 857 const TCGHelperInfo *th2 = p2; 858 if (th1->func < th2->func) 859 return -1; 860 else if (th1->func == th2->func) 861 return 0; 862 else 863 return 1; 864 } 865 866 /* find helper definition (Note: A hash table would be better) */ 867 static TCGHelperInfo *tcg_find_helper(TCGContext *s, uintptr_t val) 868 { 869 int m, m_min, m_max; 870 TCGHelperInfo *th; 871 uintptr_t v; 872 873 if (unlikely(!s->helpers_sorted)) { 874 qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo), 875 helper_cmp); 876 s->helpers_sorted = 1; 877 } 878 879 /* binary search */ 880 m_min = 0; 881 m_max = s->nb_helpers - 1; 882 while (m_min <= m_max) { 883 m = (m_min + m_max) >> 1; 884 th = &s->helpers[m]; 885 v = th->func; 886 if (v == val) 887 return th; 888 else if (val < v) { 889 m_max = m - 1; 890 } else { 891 m_min = m + 1; 892 } 893 } 894 return NULL; 895 } 896 897 static const char * const cond_name[] = 898 { 899 [TCG_COND_NEVER] = "never", 900 [TCG_COND_ALWAYS] = "always", 901 [TCG_COND_EQ] = "eq", 902 [TCG_COND_NE] = "ne", 903 [TCG_COND_LT] = "lt", 904 [TCG_COND_GE] = "ge", 905 [TCG_COND_LE] = "le", 906 [TCG_COND_GT] = "gt", 907 [TCG_COND_LTU] = "ltu", 908 [TCG_COND_GEU] = "geu", 909 [TCG_COND_LEU] = "leu", 910 [TCG_COND_GTU] = "gtu" 911 }; 912 913 void tcg_dump_ops(TCGContext *s) 914 { 915 const uint16_t *opc_ptr; 916 const TCGArg *args; 917 TCGArg arg; 918 TCGOpcode c; 919 int i, k, nb_oargs, nb_iargs, nb_cargs, first_insn; 920 const TCGOpDef *def; 921 char buf[128]; 922 923 first_insn = 1; 924 opc_ptr = s->gen_opc_buf; 925 args = s->gen_opparam_buf; 926 while (opc_ptr < s->gen_opc_ptr) { 927 c = *opc_ptr++; 928 def = &tcg_op_defs[c]; 929 if (c == INDEX_op_debug_insn_start) { 930 uint64_t pc; 931 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS 932 pc = ((uint64_t)args[1] << 32) | args[0]; 933 #else 934 pc = args[0]; 935 #endif 936 if (!first_insn) { 937 qemu_log("\n"); 938 } 939 qemu_log(" ---- 0x%" PRIx64, pc); 940 first_insn = 0; 941 nb_oargs = def->nb_oargs; 942 nb_iargs = def->nb_iargs; 943 nb_cargs = def->nb_cargs; 944 } else if (c == INDEX_op_call) { 945 TCGArg arg; 946 947 /* variable number of arguments */ 948 arg = *args++; 949 nb_oargs = arg >> 16; 950 nb_iargs = arg & 0xffff; 951 nb_cargs = def->nb_cargs; 952 953 qemu_log(" %s ", def->name); 954 955 /* function name */ 956 qemu_log("%s", 957 tcg_get_arg_str_idx(s, buf, sizeof(buf), 958 args[nb_oargs + nb_iargs - 1])); 959 /* flags */ 960 qemu_log(",$0x%" TCG_PRIlx, args[nb_oargs + nb_iargs]); 961 /* nb out args */ 962 qemu_log(",$%d", nb_oargs); 963 for(i = 0; i < nb_oargs; i++) { 964 qemu_log(","); 965 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 966 args[i])); 967 } 968 for(i = 0; i < (nb_iargs - 1); i++) { 969 qemu_log(","); 970 if (args[nb_oargs + i] == TCG_CALL_DUMMY_ARG) { 971 qemu_log("<dummy>"); 972 } else { 973 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 974 args[nb_oargs + i])); 975 } 976 } 977 } else if (c == INDEX_op_movi_i32 || c == INDEX_op_movi_i64) { 978 tcg_target_ulong val; 979 TCGHelperInfo *th; 980 981 nb_oargs = def->nb_oargs; 982 nb_iargs = def->nb_iargs; 983 nb_cargs = def->nb_cargs; 984 qemu_log(" %s %s,$", def->name, 985 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[0])); 986 val = args[1]; 987 th = tcg_find_helper(s, val); 988 if (th) { 989 qemu_log("%s", th->name); 990 } else { 991 if (c == INDEX_op_movi_i32) { 992 qemu_log("0x%x", (uint32_t)val); 993 } else { 994 qemu_log("0x%" PRIx64 , (uint64_t)val); 995 } 996 } 997 } else { 998 qemu_log(" %s ", def->name); 999 if (c == INDEX_op_nopn) { 1000 /* variable number of arguments */ 1001 nb_cargs = *args; 1002 nb_oargs = 0; 1003 nb_iargs = 0; 1004 } else { 1005 nb_oargs = def->nb_oargs; 1006 nb_iargs = def->nb_iargs; 1007 nb_cargs = def->nb_cargs; 1008 } 1009 1010 k = 0; 1011 for(i = 0; i < nb_oargs; i++) { 1012 if (k != 0) { 1013 qemu_log(","); 1014 } 1015 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1016 args[k++])); 1017 } 1018 for(i = 0; i < nb_iargs; i++) { 1019 if (k != 0) { 1020 qemu_log(","); 1021 } 1022 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1023 args[k++])); 1024 } 1025 switch (c) { 1026 case INDEX_op_brcond_i32: 1027 case INDEX_op_setcond_i32: 1028 case INDEX_op_movcond_i32: 1029 case INDEX_op_brcond2_i32: 1030 case INDEX_op_setcond2_i32: 1031 case INDEX_op_brcond_i64: 1032 case INDEX_op_setcond_i64: 1033 case INDEX_op_movcond_i64: 1034 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) { 1035 qemu_log(",%s", cond_name[args[k++]]); 1036 } else { 1037 qemu_log(",$0x%" TCG_PRIlx, args[k++]); 1038 } 1039 i = 1; 1040 break; 1041 default: 1042 i = 0; 1043 break; 1044 } 1045 for(; i < nb_cargs; i++) { 1046 if (k != 0) { 1047 qemu_log(","); 1048 } 1049 arg = args[k++]; 1050 qemu_log("$0x%" TCG_PRIlx, arg); 1051 } 1052 } 1053 qemu_log("\n"); 1054 args += nb_iargs + nb_oargs + nb_cargs; 1055 } 1056 } 1057 1058 /* we give more priority to constraints with less registers */ 1059 static int get_constraint_priority(const TCGOpDef *def, int k) 1060 { 1061 const TCGArgConstraint *arg_ct; 1062 1063 int i, n; 1064 arg_ct = &def->args_ct[k]; 1065 if (arg_ct->ct & TCG_CT_ALIAS) { 1066 /* an alias is equivalent to a single register */ 1067 n = 1; 1068 } else { 1069 if (!(arg_ct->ct & TCG_CT_REG)) 1070 return 0; 1071 n = 0; 1072 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 1073 if (tcg_regset_test_reg(arg_ct->u.regs, i)) 1074 n++; 1075 } 1076 } 1077 return TCG_TARGET_NB_REGS - n + 1; 1078 } 1079 1080 /* sort from highest priority to lowest */ 1081 static void sort_constraints(TCGOpDef *def, int start, int n) 1082 { 1083 int i, j, p1, p2, tmp; 1084 1085 for(i = 0; i < n; i++) 1086 def->sorted_args[start + i] = start + i; 1087 if (n <= 1) 1088 return; 1089 for(i = 0; i < n - 1; i++) { 1090 for(j = i + 1; j < n; j++) { 1091 p1 = get_constraint_priority(def, def->sorted_args[start + i]); 1092 p2 = get_constraint_priority(def, def->sorted_args[start + j]); 1093 if (p1 < p2) { 1094 tmp = def->sorted_args[start + i]; 1095 def->sorted_args[start + i] = def->sorted_args[start + j]; 1096 def->sorted_args[start + j] = tmp; 1097 } 1098 } 1099 } 1100 } 1101 1102 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs) 1103 { 1104 TCGOpcode op; 1105 TCGOpDef *def; 1106 const char *ct_str; 1107 int i, nb_args; 1108 1109 for(;;) { 1110 if (tdefs->op == (TCGOpcode)-1) 1111 break; 1112 op = tdefs->op; 1113 assert((unsigned)op < NB_OPS); 1114 def = &tcg_op_defs[op]; 1115 #if defined(CONFIG_DEBUG_TCG) 1116 /* Duplicate entry in op definitions? */ 1117 assert(!def->used); 1118 def->used = 1; 1119 #endif 1120 nb_args = def->nb_iargs + def->nb_oargs; 1121 for(i = 0; i < nb_args; i++) { 1122 ct_str = tdefs->args_ct_str[i]; 1123 /* Incomplete TCGTargetOpDef entry? */ 1124 assert(ct_str != NULL); 1125 tcg_regset_clear(def->args_ct[i].u.regs); 1126 def->args_ct[i].ct = 0; 1127 if (ct_str[0] >= '0' && ct_str[0] <= '9') { 1128 int oarg; 1129 oarg = ct_str[0] - '0'; 1130 assert(oarg < def->nb_oargs); 1131 assert(def->args_ct[oarg].ct & TCG_CT_REG); 1132 /* TCG_CT_ALIAS is for the output arguments. The input 1133 argument is tagged with TCG_CT_IALIAS. */ 1134 def->args_ct[i] = def->args_ct[oarg]; 1135 def->args_ct[oarg].ct = TCG_CT_ALIAS; 1136 def->args_ct[oarg].alias_index = i; 1137 def->args_ct[i].ct |= TCG_CT_IALIAS; 1138 def->args_ct[i].alias_index = oarg; 1139 } else { 1140 for(;;) { 1141 if (*ct_str == '\0') 1142 break; 1143 switch(*ct_str) { 1144 case 'i': 1145 def->args_ct[i].ct |= TCG_CT_CONST; 1146 ct_str++; 1147 break; 1148 default: 1149 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) { 1150 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n", 1151 ct_str, i, def->name); 1152 exit(1); 1153 } 1154 } 1155 } 1156 } 1157 } 1158 1159 /* TCGTargetOpDef entry with too much information? */ 1160 assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL); 1161 1162 /* sort the constraints (XXX: this is just an heuristic) */ 1163 sort_constraints(def, 0, def->nb_oargs); 1164 sort_constraints(def, def->nb_oargs, def->nb_iargs); 1165 1166 #if 0 1167 { 1168 int i; 1169 1170 printf("%s: sorted=", def->name); 1171 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++) 1172 printf(" %d", def->sorted_args[i]); 1173 printf("\n"); 1174 } 1175 #endif 1176 tdefs++; 1177 } 1178 1179 #if defined(CONFIG_DEBUG_TCG) 1180 i = 0; 1181 for (op = 0; op < ARRAY_SIZE(tcg_op_defs); op++) { 1182 const TCGOpDef *def = &tcg_op_defs[op]; 1183 if (def->flags & TCG_OPF_NOT_PRESENT) { 1184 /* Wrong entry in op definitions? */ 1185 if (def->used) { 1186 fprintf(stderr, "Invalid op definition for %s\n", def->name); 1187 i = 1; 1188 } 1189 } else { 1190 /* Missing entry in op definitions? */ 1191 if (!def->used) { 1192 fprintf(stderr, "Missing op definition for %s\n", def->name); 1193 i = 1; 1194 } 1195 } 1196 } 1197 if (i == 1) { 1198 tcg_abort(); 1199 } 1200 #endif 1201 } 1202 1203 #ifdef USE_LIVENESS_ANALYSIS 1204 1205 /* set a nop for an operation using 'nb_args' */ 1206 static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr, 1207 TCGArg *args, int nb_args) 1208 { 1209 if (nb_args == 0) { 1210 *opc_ptr = INDEX_op_nop; 1211 } else { 1212 *opc_ptr = INDEX_op_nopn; 1213 args[0] = nb_args; 1214 args[nb_args - 1] = nb_args; 1215 } 1216 } 1217 1218 /* liveness analysis: end of function: all temps are dead, and globals 1219 should be in memory. */ 1220 static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps, 1221 uint8_t *mem_temps) 1222 { 1223 memset(dead_temps, 1, s->nb_temps); 1224 memset(mem_temps, 1, s->nb_globals); 1225 memset(mem_temps + s->nb_globals, 0, s->nb_temps - s->nb_globals); 1226 } 1227 1228 /* liveness analysis: end of basic block: all temps are dead, globals 1229 and local temps should be in memory. */ 1230 static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps, 1231 uint8_t *mem_temps) 1232 { 1233 int i; 1234 1235 memset(dead_temps, 1, s->nb_temps); 1236 memset(mem_temps, 1, s->nb_globals); 1237 for(i = s->nb_globals; i < s->nb_temps; i++) { 1238 mem_temps[i] = s->temps[i].temp_local; 1239 } 1240 } 1241 1242 /* Liveness analysis : update the opc_dead_args array to tell if a 1243 given input arguments is dead. Instructions updating dead 1244 temporaries are removed. */ 1245 static void tcg_liveness_analysis(TCGContext *s) 1246 { 1247 int i, op_index, nb_args, nb_iargs, nb_oargs, arg, nb_ops; 1248 TCGOpcode op, op_new, op_new2; 1249 TCGArg *args; 1250 const TCGOpDef *def; 1251 uint8_t *dead_temps, *mem_temps; 1252 uint16_t dead_args; 1253 uint8_t sync_args; 1254 bool have_op_new2; 1255 1256 s->gen_opc_ptr++; /* skip end */ 1257 1258 nb_ops = s->gen_opc_ptr - s->gen_opc_buf; 1259 1260 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); 1261 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); 1262 1263 dead_temps = tcg_malloc(s->nb_temps); 1264 mem_temps = tcg_malloc(s->nb_temps); 1265 tcg_la_func_end(s, dead_temps, mem_temps); 1266 1267 args = s->gen_opparam_ptr; 1268 op_index = nb_ops - 1; 1269 while (op_index >= 0) { 1270 op = s->gen_opc_buf[op_index]; 1271 def = &tcg_op_defs[op]; 1272 switch(op) { 1273 case INDEX_op_call: 1274 { 1275 int call_flags; 1276 1277 nb_args = args[-1]; 1278 args -= nb_args; 1279 nb_iargs = args[0] & 0xffff; 1280 nb_oargs = args[0] >> 16; 1281 args++; 1282 call_flags = args[nb_oargs + nb_iargs]; 1283 1284 /* pure functions can be removed if their result is not 1285 used */ 1286 if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) { 1287 for(i = 0; i < nb_oargs; i++) { 1288 arg = args[i]; 1289 if (!dead_temps[arg] || mem_temps[arg]) { 1290 goto do_not_remove_call; 1291 } 1292 } 1293 tcg_set_nop(s, s->gen_opc_buf + op_index, 1294 args - 1, nb_args); 1295 } else { 1296 do_not_remove_call: 1297 1298 /* output args are dead */ 1299 dead_args = 0; 1300 sync_args = 0; 1301 for(i = 0; i < nb_oargs; i++) { 1302 arg = args[i]; 1303 if (dead_temps[arg]) { 1304 dead_args |= (1 << i); 1305 } 1306 if (mem_temps[arg]) { 1307 sync_args |= (1 << i); 1308 } 1309 dead_temps[arg] = 1; 1310 mem_temps[arg] = 0; 1311 } 1312 1313 if (!(call_flags & TCG_CALL_NO_READ_GLOBALS)) { 1314 /* globals should be synced to memory */ 1315 memset(mem_temps, 1, s->nb_globals); 1316 } 1317 if (!(call_flags & (TCG_CALL_NO_WRITE_GLOBALS | 1318 TCG_CALL_NO_READ_GLOBALS))) { 1319 /* globals should go back to memory */ 1320 memset(dead_temps, 1, s->nb_globals); 1321 } 1322 1323 /* input args are live */ 1324 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) { 1325 arg = args[i]; 1326 if (arg != TCG_CALL_DUMMY_ARG) { 1327 if (dead_temps[arg]) { 1328 dead_args |= (1 << i); 1329 } 1330 dead_temps[arg] = 0; 1331 } 1332 } 1333 s->op_dead_args[op_index] = dead_args; 1334 s->op_sync_args[op_index] = sync_args; 1335 } 1336 args--; 1337 } 1338 break; 1339 case INDEX_op_debug_insn_start: 1340 args -= def->nb_args; 1341 break; 1342 case INDEX_op_nopn: 1343 nb_args = args[-1]; 1344 args -= nb_args; 1345 break; 1346 case INDEX_op_discard: 1347 args--; 1348 /* mark the temporary as dead */ 1349 dead_temps[args[0]] = 1; 1350 mem_temps[args[0]] = 0; 1351 break; 1352 case INDEX_op_end: 1353 break; 1354 1355 case INDEX_op_add2_i32: 1356 op_new = INDEX_op_add_i32; 1357 goto do_addsub2; 1358 case INDEX_op_sub2_i32: 1359 op_new = INDEX_op_sub_i32; 1360 goto do_addsub2; 1361 case INDEX_op_add2_i64: 1362 op_new = INDEX_op_add_i64; 1363 goto do_addsub2; 1364 case INDEX_op_sub2_i64: 1365 op_new = INDEX_op_sub_i64; 1366 do_addsub2: 1367 args -= 6; 1368 nb_iargs = 4; 1369 nb_oargs = 2; 1370 /* Test if the high part of the operation is dead, but not 1371 the low part. The result can be optimized to a simple 1372 add or sub. This happens often for x86_64 guest when the 1373 cpu mode is set to 32 bit. */ 1374 if (dead_temps[args[1]] && !mem_temps[args[1]]) { 1375 if (dead_temps[args[0]] && !mem_temps[args[0]]) { 1376 goto do_remove; 1377 } 1378 /* Create the single operation plus nop. */ 1379 s->gen_opc_buf[op_index] = op = op_new; 1380 args[1] = args[2]; 1381 args[2] = args[4]; 1382 assert(s->gen_opc_buf[op_index + 1] == INDEX_op_nop); 1383 tcg_set_nop(s, s->gen_opc_buf + op_index + 1, args + 3, 3); 1384 /* Fall through and mark the single-word operation live. */ 1385 nb_iargs = 2; 1386 nb_oargs = 1; 1387 } 1388 goto do_not_remove; 1389 1390 case INDEX_op_mulu2_i32: 1391 op_new = INDEX_op_mul_i32; 1392 op_new2 = INDEX_op_muluh_i32; 1393 have_op_new2 = TCG_TARGET_HAS_muluh_i32; 1394 goto do_mul2; 1395 case INDEX_op_muls2_i32: 1396 op_new = INDEX_op_mul_i32; 1397 op_new2 = INDEX_op_mulsh_i32; 1398 have_op_new2 = TCG_TARGET_HAS_mulsh_i32; 1399 goto do_mul2; 1400 case INDEX_op_mulu2_i64: 1401 op_new = INDEX_op_mul_i64; 1402 op_new2 = INDEX_op_muluh_i64; 1403 have_op_new2 = TCG_TARGET_HAS_muluh_i64; 1404 goto do_mul2; 1405 case INDEX_op_muls2_i64: 1406 op_new = INDEX_op_mul_i64; 1407 op_new2 = INDEX_op_mulsh_i64; 1408 have_op_new2 = TCG_TARGET_HAS_mulsh_i64; 1409 goto do_mul2; 1410 do_mul2: 1411 args -= 4; 1412 nb_iargs = 2; 1413 nb_oargs = 2; 1414 if (dead_temps[args[1]] && !mem_temps[args[1]]) { 1415 if (dead_temps[args[0]] && !mem_temps[args[0]]) { 1416 /* Both parts of the operation are dead. */ 1417 goto do_remove; 1418 } 1419 /* The high part of the operation is dead; generate the low. */ 1420 s->gen_opc_buf[op_index] = op = op_new; 1421 args[1] = args[2]; 1422 args[2] = args[3]; 1423 } else if (have_op_new2 && dead_temps[args[0]] 1424 && !mem_temps[args[0]]) { 1425 /* The low part of the operation is dead; generate the high. */ 1426 s->gen_opc_buf[op_index] = op = op_new2; 1427 args[0] = args[1]; 1428 args[1] = args[2]; 1429 args[2] = args[3]; 1430 } else { 1431 goto do_not_remove; 1432 } 1433 assert(s->gen_opc_buf[op_index + 1] == INDEX_op_nop); 1434 tcg_set_nop(s, s->gen_opc_buf + op_index + 1, args + 3, 1); 1435 /* Mark the single-word operation live. */ 1436 nb_oargs = 1; 1437 goto do_not_remove; 1438 1439 default: 1440 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */ 1441 args -= def->nb_args; 1442 nb_iargs = def->nb_iargs; 1443 nb_oargs = def->nb_oargs; 1444 1445 /* Test if the operation can be removed because all 1446 its outputs are dead. We assume that nb_oargs == 0 1447 implies side effects */ 1448 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) { 1449 for(i = 0; i < nb_oargs; i++) { 1450 arg = args[i]; 1451 if (!dead_temps[arg] || mem_temps[arg]) { 1452 goto do_not_remove; 1453 } 1454 } 1455 do_remove: 1456 tcg_set_nop(s, s->gen_opc_buf + op_index, args, def->nb_args); 1457 #ifdef CONFIG_PROFILER 1458 s->del_op_count++; 1459 #endif 1460 } else { 1461 do_not_remove: 1462 1463 /* output args are dead */ 1464 dead_args = 0; 1465 sync_args = 0; 1466 for(i = 0; i < nb_oargs; i++) { 1467 arg = args[i]; 1468 if (dead_temps[arg]) { 1469 dead_args |= (1 << i); 1470 } 1471 if (mem_temps[arg]) { 1472 sync_args |= (1 << i); 1473 } 1474 dead_temps[arg] = 1; 1475 mem_temps[arg] = 0; 1476 } 1477 1478 /* if end of basic block, update */ 1479 if (def->flags & TCG_OPF_BB_END) { 1480 tcg_la_bb_end(s, dead_temps, mem_temps); 1481 } else if (def->flags & TCG_OPF_SIDE_EFFECTS) { 1482 /* globals should be synced to memory */ 1483 memset(mem_temps, 1, s->nb_globals); 1484 } 1485 1486 /* input args are live */ 1487 for(i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 1488 arg = args[i]; 1489 if (dead_temps[arg]) { 1490 dead_args |= (1 << i); 1491 } 1492 dead_temps[arg] = 0; 1493 } 1494 s->op_dead_args[op_index] = dead_args; 1495 s->op_sync_args[op_index] = sync_args; 1496 } 1497 break; 1498 } 1499 op_index--; 1500 } 1501 1502 if (args != s->gen_opparam_buf) { 1503 tcg_abort(); 1504 } 1505 } 1506 #else 1507 /* dummy liveness analysis */ 1508 static void tcg_liveness_analysis(TCGContext *s) 1509 { 1510 int nb_ops; 1511 nb_ops = s->gen_opc_ptr - s->gen_opc_buf; 1512 1513 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); 1514 memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t)); 1515 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); 1516 memset(s->op_sync_args, 0, nb_ops * sizeof(uint8_t)); 1517 } 1518 #endif 1519 1520 #ifndef NDEBUG 1521 static void dump_regs(TCGContext *s) 1522 { 1523 TCGTemp *ts; 1524 int i; 1525 char buf[64]; 1526 1527 for(i = 0; i < s->nb_temps; i++) { 1528 ts = &s->temps[i]; 1529 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i)); 1530 switch(ts->val_type) { 1531 case TEMP_VAL_REG: 1532 printf("%s", tcg_target_reg_names[ts->reg]); 1533 break; 1534 case TEMP_VAL_MEM: 1535 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]); 1536 break; 1537 case TEMP_VAL_CONST: 1538 printf("$0x%" TCG_PRIlx, ts->val); 1539 break; 1540 case TEMP_VAL_DEAD: 1541 printf("D"); 1542 break; 1543 default: 1544 printf("???"); 1545 break; 1546 } 1547 printf("\n"); 1548 } 1549 1550 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 1551 if (s->reg_to_temp[i] >= 0) { 1552 printf("%s: %s\n", 1553 tcg_target_reg_names[i], 1554 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i])); 1555 } 1556 } 1557 } 1558 1559 static void check_regs(TCGContext *s) 1560 { 1561 int reg, k; 1562 TCGTemp *ts; 1563 char buf[64]; 1564 1565 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 1566 k = s->reg_to_temp[reg]; 1567 if (k >= 0) { 1568 ts = &s->temps[k]; 1569 if (ts->val_type != TEMP_VAL_REG || 1570 ts->reg != reg) { 1571 printf("Inconsistency for register %s:\n", 1572 tcg_target_reg_names[reg]); 1573 goto fail; 1574 } 1575 } 1576 } 1577 for(k = 0; k < s->nb_temps; k++) { 1578 ts = &s->temps[k]; 1579 if (ts->val_type == TEMP_VAL_REG && 1580 !ts->fixed_reg && 1581 s->reg_to_temp[ts->reg] != k) { 1582 printf("Inconsistency for temp %s:\n", 1583 tcg_get_arg_str_idx(s, buf, sizeof(buf), k)); 1584 fail: 1585 printf("reg state:\n"); 1586 dump_regs(s); 1587 tcg_abort(); 1588 } 1589 } 1590 } 1591 #endif 1592 1593 static void temp_allocate_frame(TCGContext *s, int temp) 1594 { 1595 TCGTemp *ts; 1596 ts = &s->temps[temp]; 1597 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64) 1598 /* Sparc64 stack is accessed with offset of 2047 */ 1599 s->current_frame_offset = (s->current_frame_offset + 1600 (tcg_target_long)sizeof(tcg_target_long) - 1) & 1601 ~(sizeof(tcg_target_long) - 1); 1602 #endif 1603 if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) > 1604 s->frame_end) { 1605 tcg_abort(); 1606 } 1607 ts->mem_offset = s->current_frame_offset; 1608 ts->mem_reg = s->frame_reg; 1609 ts->mem_allocated = 1; 1610 s->current_frame_offset += sizeof(tcg_target_long); 1611 } 1612 1613 /* sync register 'reg' by saving it to the corresponding temporary */ 1614 static inline void tcg_reg_sync(TCGContext *s, int reg) 1615 { 1616 TCGTemp *ts; 1617 int temp; 1618 1619 temp = s->reg_to_temp[reg]; 1620 ts = &s->temps[temp]; 1621 assert(ts->val_type == TEMP_VAL_REG); 1622 if (!ts->mem_coherent && !ts->fixed_reg) { 1623 if (!ts->mem_allocated) { 1624 temp_allocate_frame(s, temp); 1625 } 1626 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 1627 } 1628 ts->mem_coherent = 1; 1629 } 1630 1631 /* free register 'reg' by spilling the corresponding temporary if necessary */ 1632 static void tcg_reg_free(TCGContext *s, int reg) 1633 { 1634 int temp; 1635 1636 temp = s->reg_to_temp[reg]; 1637 if (temp != -1) { 1638 tcg_reg_sync(s, reg); 1639 s->temps[temp].val_type = TEMP_VAL_MEM; 1640 s->reg_to_temp[reg] = -1; 1641 } 1642 } 1643 1644 /* Allocate a register belonging to reg1 & ~reg2 */ 1645 static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2) 1646 { 1647 int i, reg; 1648 TCGRegSet reg_ct; 1649 1650 tcg_regset_andnot(reg_ct, reg1, reg2); 1651 1652 /* first try free registers */ 1653 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { 1654 reg = tcg_target_reg_alloc_order[i]; 1655 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1) 1656 return reg; 1657 } 1658 1659 /* XXX: do better spill choice */ 1660 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { 1661 reg = tcg_target_reg_alloc_order[i]; 1662 if (tcg_regset_test_reg(reg_ct, reg)) { 1663 tcg_reg_free(s, reg); 1664 return reg; 1665 } 1666 } 1667 1668 tcg_abort(); 1669 } 1670 1671 /* mark a temporary as dead. */ 1672 static inline void temp_dead(TCGContext *s, int temp) 1673 { 1674 TCGTemp *ts; 1675 1676 ts = &s->temps[temp]; 1677 if (!ts->fixed_reg) { 1678 if (ts->val_type == TEMP_VAL_REG) { 1679 s->reg_to_temp[ts->reg] = -1; 1680 } 1681 if (temp < s->nb_globals || ts->temp_local) { 1682 ts->val_type = TEMP_VAL_MEM; 1683 } else { 1684 ts->val_type = TEMP_VAL_DEAD; 1685 } 1686 } 1687 } 1688 1689 /* sync a temporary to memory. 'allocated_regs' is used in case a 1690 temporary registers needs to be allocated to store a constant. */ 1691 static inline void temp_sync(TCGContext *s, int temp, TCGRegSet allocated_regs) 1692 { 1693 TCGTemp *ts; 1694 1695 ts = &s->temps[temp]; 1696 if (!ts->fixed_reg) { 1697 switch(ts->val_type) { 1698 case TEMP_VAL_CONST: 1699 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 1700 allocated_regs); 1701 ts->val_type = TEMP_VAL_REG; 1702 s->reg_to_temp[ts->reg] = temp; 1703 ts->mem_coherent = 0; 1704 tcg_out_movi(s, ts->type, ts->reg, ts->val); 1705 /* fallthrough*/ 1706 case TEMP_VAL_REG: 1707 tcg_reg_sync(s, ts->reg); 1708 break; 1709 case TEMP_VAL_DEAD: 1710 case TEMP_VAL_MEM: 1711 break; 1712 default: 1713 tcg_abort(); 1714 } 1715 } 1716 } 1717 1718 /* save a temporary to memory. 'allocated_regs' is used in case a 1719 temporary registers needs to be allocated to store a constant. */ 1720 static inline void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs) 1721 { 1722 #ifdef USE_LIVENESS_ANALYSIS 1723 /* The liveness analysis already ensures that globals are back 1724 in memory. Keep an assert for safety. */ 1725 assert(s->temps[temp].val_type == TEMP_VAL_MEM || s->temps[temp].fixed_reg); 1726 #else 1727 temp_sync(s, temp, allocated_regs); 1728 temp_dead(s, temp); 1729 #endif 1730 } 1731 1732 /* save globals to their canonical location and assume they can be 1733 modified be the following code. 'allocated_regs' is used in case a 1734 temporary registers needs to be allocated to store a constant. */ 1735 static void save_globals(TCGContext *s, TCGRegSet allocated_regs) 1736 { 1737 int i; 1738 1739 for(i = 0; i < s->nb_globals; i++) { 1740 temp_save(s, i, allocated_regs); 1741 } 1742 } 1743 1744 /* sync globals to their canonical location and assume they can be 1745 read by the following code. 'allocated_regs' is used in case a 1746 temporary registers needs to be allocated to store a constant. */ 1747 static void sync_globals(TCGContext *s, TCGRegSet allocated_regs) 1748 { 1749 int i; 1750 1751 for (i = 0; i < s->nb_globals; i++) { 1752 #ifdef USE_LIVENESS_ANALYSIS 1753 assert(s->temps[i].val_type != TEMP_VAL_REG || s->temps[i].fixed_reg || 1754 s->temps[i].mem_coherent); 1755 #else 1756 temp_sync(s, i, allocated_regs); 1757 #endif 1758 } 1759 } 1760 1761 /* at the end of a basic block, we assume all temporaries are dead and 1762 all globals are stored at their canonical location. */ 1763 static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs) 1764 { 1765 TCGTemp *ts; 1766 int i; 1767 1768 for(i = s->nb_globals; i < s->nb_temps; i++) { 1769 ts = &s->temps[i]; 1770 if (ts->temp_local) { 1771 temp_save(s, i, allocated_regs); 1772 } else { 1773 #ifdef USE_LIVENESS_ANALYSIS 1774 /* The liveness analysis already ensures that temps are dead. 1775 Keep an assert for safety. */ 1776 assert(ts->val_type == TEMP_VAL_DEAD); 1777 #else 1778 temp_dead(s, i); 1779 #endif 1780 } 1781 } 1782 1783 save_globals(s, allocated_regs); 1784 } 1785 1786 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1) 1787 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1) 1788 1789 static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args, 1790 uint16_t dead_args, uint8_t sync_args) 1791 { 1792 TCGTemp *ots; 1793 tcg_target_ulong val; 1794 1795 ots = &s->temps[args[0]]; 1796 val = args[1]; 1797 1798 if (ots->fixed_reg) { 1799 /* for fixed registers, we do not do any constant 1800 propagation */ 1801 tcg_out_movi(s, ots->type, ots->reg, val); 1802 } else { 1803 /* The movi is not explicitly generated here */ 1804 if (ots->val_type == TEMP_VAL_REG) 1805 s->reg_to_temp[ots->reg] = -1; 1806 ots->val_type = TEMP_VAL_CONST; 1807 ots->val = val; 1808 } 1809 if (NEED_SYNC_ARG(0)) { 1810 temp_sync(s, args[0], s->reserved_regs); 1811 } 1812 if (IS_DEAD_ARG(0)) { 1813 temp_dead(s, args[0]); 1814 } 1815 } 1816 1817 static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def, 1818 const TCGArg *args, uint16_t dead_args, 1819 uint8_t sync_args) 1820 { 1821 TCGRegSet allocated_regs; 1822 TCGTemp *ts, *ots; 1823 const TCGArgConstraint *arg_ct, *oarg_ct; 1824 1825 tcg_regset_set(allocated_regs, s->reserved_regs); 1826 ots = &s->temps[args[0]]; 1827 ts = &s->temps[args[1]]; 1828 oarg_ct = &def->args_ct[0]; 1829 arg_ct = &def->args_ct[1]; 1830 1831 /* If the source value is not in a register, and we're going to be 1832 forced to have it in a register in order to perform the copy, 1833 then copy the SOURCE value into its own register first. That way 1834 we don't have to reload SOURCE the next time it is used. */ 1835 if (((NEED_SYNC_ARG(0) || ots->fixed_reg) && ts->val_type != TEMP_VAL_REG) 1836 || ts->val_type == TEMP_VAL_MEM) { 1837 ts->reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 1838 if (ts->val_type == TEMP_VAL_MEM) { 1839 tcg_out_ld(s, ts->type, ts->reg, ts->mem_reg, ts->mem_offset); 1840 ts->mem_coherent = 1; 1841 } else if (ts->val_type == TEMP_VAL_CONST) { 1842 tcg_out_movi(s, ts->type, ts->reg, ts->val); 1843 } 1844 s->reg_to_temp[ts->reg] = args[1]; 1845 ts->val_type = TEMP_VAL_REG; 1846 } 1847 1848 if (IS_DEAD_ARG(0) && !ots->fixed_reg) { 1849 /* mov to a non-saved dead register makes no sense (even with 1850 liveness analysis disabled). */ 1851 assert(NEED_SYNC_ARG(0)); 1852 /* The code above should have moved the temp to a register. */ 1853 assert(ts->val_type == TEMP_VAL_REG); 1854 if (!ots->mem_allocated) { 1855 temp_allocate_frame(s, args[0]); 1856 } 1857 tcg_out_st(s, ots->type, ts->reg, ots->mem_reg, ots->mem_offset); 1858 if (IS_DEAD_ARG(1)) { 1859 temp_dead(s, args[1]); 1860 } 1861 temp_dead(s, args[0]); 1862 } else if (ts->val_type == TEMP_VAL_CONST) { 1863 /* propagate constant */ 1864 if (ots->val_type == TEMP_VAL_REG) { 1865 s->reg_to_temp[ots->reg] = -1; 1866 } 1867 ots->val_type = TEMP_VAL_CONST; 1868 ots->val = ts->val; 1869 } else { 1870 /* The code in the first if block should have moved the 1871 temp to a register. */ 1872 assert(ts->val_type == TEMP_VAL_REG); 1873 if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) { 1874 /* the mov can be suppressed */ 1875 if (ots->val_type == TEMP_VAL_REG) { 1876 s->reg_to_temp[ots->reg] = -1; 1877 } 1878 ots->reg = ts->reg; 1879 temp_dead(s, args[1]); 1880 } else { 1881 if (ots->val_type != TEMP_VAL_REG) { 1882 /* When allocating a new register, make sure to not spill the 1883 input one. */ 1884 tcg_regset_set_reg(allocated_regs, ts->reg); 1885 ots->reg = tcg_reg_alloc(s, oarg_ct->u.regs, allocated_regs); 1886 } 1887 tcg_out_mov(s, ots->type, ots->reg, ts->reg); 1888 } 1889 ots->val_type = TEMP_VAL_REG; 1890 ots->mem_coherent = 0; 1891 s->reg_to_temp[ots->reg] = args[0]; 1892 if (NEED_SYNC_ARG(0)) { 1893 tcg_reg_sync(s, ots->reg); 1894 } 1895 } 1896 } 1897 1898 static void tcg_reg_alloc_op(TCGContext *s, 1899 const TCGOpDef *def, TCGOpcode opc, 1900 const TCGArg *args, uint16_t dead_args, 1901 uint8_t sync_args) 1902 { 1903 TCGRegSet allocated_regs; 1904 int i, k, nb_iargs, nb_oargs, reg; 1905 TCGArg arg; 1906 const TCGArgConstraint *arg_ct; 1907 TCGTemp *ts; 1908 TCGArg new_args[TCG_MAX_OP_ARGS]; 1909 int const_args[TCG_MAX_OP_ARGS]; 1910 1911 nb_oargs = def->nb_oargs; 1912 nb_iargs = def->nb_iargs; 1913 1914 /* copy constants */ 1915 memcpy(new_args + nb_oargs + nb_iargs, 1916 args + nb_oargs + nb_iargs, 1917 sizeof(TCGArg) * def->nb_cargs); 1918 1919 /* satisfy input constraints */ 1920 tcg_regset_set(allocated_regs, s->reserved_regs); 1921 for(k = 0; k < nb_iargs; k++) { 1922 i = def->sorted_args[nb_oargs + k]; 1923 arg = args[i]; 1924 arg_ct = &def->args_ct[i]; 1925 ts = &s->temps[arg]; 1926 if (ts->val_type == TEMP_VAL_MEM) { 1927 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 1928 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 1929 ts->val_type = TEMP_VAL_REG; 1930 ts->reg = reg; 1931 ts->mem_coherent = 1; 1932 s->reg_to_temp[reg] = arg; 1933 } else if (ts->val_type == TEMP_VAL_CONST) { 1934 if (tcg_target_const_match(ts->val, arg_ct)) { 1935 /* constant is OK for instruction */ 1936 const_args[i] = 1; 1937 new_args[i] = ts->val; 1938 goto iarg_end; 1939 } else { 1940 /* need to move to a register */ 1941 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 1942 tcg_out_movi(s, ts->type, reg, ts->val); 1943 ts->val_type = TEMP_VAL_REG; 1944 ts->reg = reg; 1945 ts->mem_coherent = 0; 1946 s->reg_to_temp[reg] = arg; 1947 } 1948 } 1949 assert(ts->val_type == TEMP_VAL_REG); 1950 if (arg_ct->ct & TCG_CT_IALIAS) { 1951 if (ts->fixed_reg) { 1952 /* if fixed register, we must allocate a new register 1953 if the alias is not the same register */ 1954 if (arg != args[arg_ct->alias_index]) 1955 goto allocate_in_reg; 1956 } else { 1957 /* if the input is aliased to an output and if it is 1958 not dead after the instruction, we must allocate 1959 a new register and move it */ 1960 if (!IS_DEAD_ARG(i)) { 1961 goto allocate_in_reg; 1962 } 1963 } 1964 } 1965 reg = ts->reg; 1966 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) { 1967 /* nothing to do : the constraint is satisfied */ 1968 } else { 1969 allocate_in_reg: 1970 /* allocate a new register matching the constraint 1971 and move the temporary register into it */ 1972 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 1973 tcg_out_mov(s, ts->type, reg, ts->reg); 1974 } 1975 new_args[i] = reg; 1976 const_args[i] = 0; 1977 tcg_regset_set_reg(allocated_regs, reg); 1978 iarg_end: ; 1979 } 1980 1981 /* mark dead temporaries and free the associated registers */ 1982 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 1983 if (IS_DEAD_ARG(i)) { 1984 temp_dead(s, args[i]); 1985 } 1986 } 1987 1988 if (def->flags & TCG_OPF_BB_END) { 1989 tcg_reg_alloc_bb_end(s, allocated_regs); 1990 } else { 1991 if (def->flags & TCG_OPF_CALL_CLOBBER) { 1992 /* XXX: permit generic clobber register list ? */ 1993 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 1994 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { 1995 tcg_reg_free(s, reg); 1996 } 1997 } 1998 } 1999 if (def->flags & TCG_OPF_SIDE_EFFECTS) { 2000 /* sync globals if the op has side effects and might trigger 2001 an exception. */ 2002 sync_globals(s, allocated_regs); 2003 } 2004 2005 /* satisfy the output constraints */ 2006 tcg_regset_set(allocated_regs, s->reserved_regs); 2007 for(k = 0; k < nb_oargs; k++) { 2008 i = def->sorted_args[k]; 2009 arg = args[i]; 2010 arg_ct = &def->args_ct[i]; 2011 ts = &s->temps[arg]; 2012 if (arg_ct->ct & TCG_CT_ALIAS) { 2013 reg = new_args[arg_ct->alias_index]; 2014 } else { 2015 /* if fixed register, we try to use it */ 2016 reg = ts->reg; 2017 if (ts->fixed_reg && 2018 tcg_regset_test_reg(arg_ct->u.regs, reg)) { 2019 goto oarg_end; 2020 } 2021 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2022 } 2023 tcg_regset_set_reg(allocated_regs, reg); 2024 /* if a fixed register is used, then a move will be done afterwards */ 2025 if (!ts->fixed_reg) { 2026 if (ts->val_type == TEMP_VAL_REG) { 2027 s->reg_to_temp[ts->reg] = -1; 2028 } 2029 ts->val_type = TEMP_VAL_REG; 2030 ts->reg = reg; 2031 /* temp value is modified, so the value kept in memory is 2032 potentially not the same */ 2033 ts->mem_coherent = 0; 2034 s->reg_to_temp[reg] = arg; 2035 } 2036 oarg_end: 2037 new_args[i] = reg; 2038 } 2039 } 2040 2041 /* emit instruction */ 2042 tcg_out_op(s, opc, new_args, const_args); 2043 2044 /* move the outputs in the correct register if needed */ 2045 for(i = 0; i < nb_oargs; i++) { 2046 ts = &s->temps[args[i]]; 2047 reg = new_args[i]; 2048 if (ts->fixed_reg && ts->reg != reg) { 2049 tcg_out_mov(s, ts->type, ts->reg, reg); 2050 } 2051 if (NEED_SYNC_ARG(i)) { 2052 tcg_reg_sync(s, reg); 2053 } 2054 if (IS_DEAD_ARG(i)) { 2055 temp_dead(s, args[i]); 2056 } 2057 } 2058 } 2059 2060 #ifdef TCG_TARGET_STACK_GROWSUP 2061 #define STACK_DIR(x) (-(x)) 2062 #else 2063 #define STACK_DIR(x) (x) 2064 #endif 2065 2066 static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def, 2067 TCGOpcode opc, const TCGArg *args, 2068 uint16_t dead_args, uint8_t sync_args) 2069 { 2070 int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params; 2071 TCGArg arg, func_arg; 2072 TCGTemp *ts; 2073 intptr_t stack_offset; 2074 size_t call_stack_size; 2075 uintptr_t func_addr; 2076 int const_func_arg, allocate_args; 2077 TCGRegSet allocated_regs; 2078 const TCGArgConstraint *arg_ct; 2079 2080 arg = *args++; 2081 2082 nb_oargs = arg >> 16; 2083 nb_iargs = arg & 0xffff; 2084 nb_params = nb_iargs - 1; 2085 2086 flags = args[nb_oargs + nb_iargs]; 2087 2088 nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs); 2089 if (nb_regs > nb_params) 2090 nb_regs = nb_params; 2091 2092 /* assign stack slots first */ 2093 call_stack_size = (nb_params - nb_regs) * sizeof(tcg_target_long); 2094 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) & 2095 ~(TCG_TARGET_STACK_ALIGN - 1); 2096 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE); 2097 if (allocate_args) { 2098 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed, 2099 preallocate call stack */ 2100 tcg_abort(); 2101 } 2102 2103 stack_offset = TCG_TARGET_CALL_STACK_OFFSET; 2104 for(i = nb_regs; i < nb_params; i++) { 2105 arg = args[nb_oargs + i]; 2106 #ifdef TCG_TARGET_STACK_GROWSUP 2107 stack_offset -= sizeof(tcg_target_long); 2108 #endif 2109 if (arg != TCG_CALL_DUMMY_ARG) { 2110 ts = &s->temps[arg]; 2111 if (ts->val_type == TEMP_VAL_REG) { 2112 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset); 2113 } else if (ts->val_type == TEMP_VAL_MEM) { 2114 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 2115 s->reserved_regs); 2116 /* XXX: not correct if reading values from the stack */ 2117 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2118 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); 2119 } else if (ts->val_type == TEMP_VAL_CONST) { 2120 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 2121 s->reserved_regs); 2122 /* XXX: sign extend may be needed on some targets */ 2123 tcg_out_movi(s, ts->type, reg, ts->val); 2124 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); 2125 } else { 2126 tcg_abort(); 2127 } 2128 } 2129 #ifndef TCG_TARGET_STACK_GROWSUP 2130 stack_offset += sizeof(tcg_target_long); 2131 #endif 2132 } 2133 2134 /* assign input registers */ 2135 tcg_regset_set(allocated_regs, s->reserved_regs); 2136 for(i = 0; i < nb_regs; i++) { 2137 arg = args[nb_oargs + i]; 2138 if (arg != TCG_CALL_DUMMY_ARG) { 2139 ts = &s->temps[arg]; 2140 reg = tcg_target_call_iarg_regs[i]; 2141 tcg_reg_free(s, reg); 2142 if (ts->val_type == TEMP_VAL_REG) { 2143 if (ts->reg != reg) { 2144 tcg_out_mov(s, ts->type, reg, ts->reg); 2145 } 2146 } else if (ts->val_type == TEMP_VAL_MEM) { 2147 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2148 } else if (ts->val_type == TEMP_VAL_CONST) { 2149 /* XXX: sign extend ? */ 2150 tcg_out_movi(s, ts->type, reg, ts->val); 2151 } else { 2152 tcg_abort(); 2153 } 2154 tcg_regset_set_reg(allocated_regs, reg); 2155 } 2156 } 2157 2158 /* assign function address */ 2159 func_arg = args[nb_oargs + nb_iargs - 1]; 2160 arg_ct = &def->args_ct[0]; 2161 ts = &s->temps[func_arg]; 2162 func_addr = ts->val; 2163 const_func_arg = 0; 2164 if (ts->val_type == TEMP_VAL_MEM) { 2165 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2166 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2167 func_arg = reg; 2168 tcg_regset_set_reg(allocated_regs, reg); 2169 } else if (ts->val_type == TEMP_VAL_REG) { 2170 reg = ts->reg; 2171 if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) { 2172 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2173 tcg_out_mov(s, ts->type, reg, ts->reg); 2174 } 2175 func_arg = reg; 2176 tcg_regset_set_reg(allocated_regs, reg); 2177 } else if (ts->val_type == TEMP_VAL_CONST) { 2178 if (tcg_target_const_match(func_addr, arg_ct)) { 2179 const_func_arg = 1; 2180 func_arg = func_addr; 2181 } else { 2182 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2183 tcg_out_movi(s, ts->type, reg, func_addr); 2184 func_arg = reg; 2185 tcg_regset_set_reg(allocated_regs, reg); 2186 } 2187 } else { 2188 tcg_abort(); 2189 } 2190 2191 2192 /* mark dead temporaries and free the associated registers */ 2193 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) { 2194 if (IS_DEAD_ARG(i)) { 2195 temp_dead(s, args[i]); 2196 } 2197 } 2198 2199 /* clobber call registers */ 2200 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 2201 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { 2202 tcg_reg_free(s, reg); 2203 } 2204 } 2205 2206 /* Save globals if they might be written by the helper, sync them if 2207 they might be read. */ 2208 if (flags & TCG_CALL_NO_READ_GLOBALS) { 2209 /* Nothing to do */ 2210 } else if (flags & TCG_CALL_NO_WRITE_GLOBALS) { 2211 sync_globals(s, allocated_regs); 2212 } else { 2213 save_globals(s, allocated_regs); 2214 } 2215 2216 tcg_out_op(s, opc, &func_arg, &const_func_arg); 2217 2218 /* assign output registers and emit moves if needed */ 2219 for(i = 0; i < nb_oargs; i++) { 2220 arg = args[i]; 2221 ts = &s->temps[arg]; 2222 reg = tcg_target_call_oarg_regs[i]; 2223 assert(s->reg_to_temp[reg] == -1); 2224 if (ts->fixed_reg) { 2225 if (ts->reg != reg) { 2226 tcg_out_mov(s, ts->type, ts->reg, reg); 2227 } 2228 } else { 2229 if (ts->val_type == TEMP_VAL_REG) { 2230 s->reg_to_temp[ts->reg] = -1; 2231 } 2232 ts->val_type = TEMP_VAL_REG; 2233 ts->reg = reg; 2234 ts->mem_coherent = 0; 2235 s->reg_to_temp[reg] = arg; 2236 if (NEED_SYNC_ARG(i)) { 2237 tcg_reg_sync(s, reg); 2238 } 2239 if (IS_DEAD_ARG(i)) { 2240 temp_dead(s, args[i]); 2241 } 2242 } 2243 } 2244 2245 return nb_iargs + nb_oargs + def->nb_cargs + 1; 2246 } 2247 2248 #ifdef CONFIG_PROFILER 2249 2250 static int64_t tcg_table_op_count[NB_OPS]; 2251 2252 static void dump_op_count(void) 2253 { 2254 int i; 2255 FILE *f; 2256 f = fopen("/tmp/op.log", "w"); 2257 for(i = INDEX_op_end; i < NB_OPS; i++) { 2258 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, tcg_table_op_count[i]); 2259 } 2260 fclose(f); 2261 } 2262 #endif 2263 2264 2265 static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, 2266 long search_pc) 2267 { 2268 TCGOpcode opc; 2269 int op_index; 2270 const TCGOpDef *def; 2271 const TCGArg *args; 2272 2273 #ifdef DEBUG_DISAS 2274 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { 2275 qemu_log("OP:\n"); 2276 tcg_dump_ops(s); 2277 qemu_log("\n"); 2278 } 2279 #endif 2280 2281 #ifdef CONFIG_PROFILER 2282 s->opt_time -= profile_getclock(); 2283 #endif 2284 2285 #ifdef USE_TCG_OPTIMIZATIONS 2286 s->gen_opparam_ptr = 2287 tcg_optimize(s, s->gen_opc_ptr, s->gen_opparam_buf, tcg_op_defs); 2288 #endif 2289 2290 #ifdef CONFIG_PROFILER 2291 s->opt_time += profile_getclock(); 2292 s->la_time -= profile_getclock(); 2293 #endif 2294 2295 tcg_liveness_analysis(s); 2296 2297 #ifdef CONFIG_PROFILER 2298 s->la_time += profile_getclock(); 2299 #endif 2300 2301 #ifdef DEBUG_DISAS 2302 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) { 2303 qemu_log("OP after optimization and liveness analysis:\n"); 2304 tcg_dump_ops(s); 2305 qemu_log("\n"); 2306 } 2307 #endif 2308 2309 tcg_reg_alloc_start(s); 2310 2311 s->code_buf = gen_code_buf; 2312 s->code_ptr = gen_code_buf; 2313 2314 args = s->gen_opparam_buf; 2315 op_index = 0; 2316 2317 for(;;) { 2318 opc = s->gen_opc_buf[op_index]; 2319 #ifdef CONFIG_PROFILER 2320 tcg_table_op_count[opc]++; 2321 #endif 2322 def = &tcg_op_defs[opc]; 2323 #if 0 2324 printf("%s: %d %d %d\n", def->name, 2325 def->nb_oargs, def->nb_iargs, def->nb_cargs); 2326 // dump_regs(s); 2327 #endif 2328 switch(opc) { 2329 case INDEX_op_mov_i32: 2330 case INDEX_op_mov_i64: 2331 tcg_reg_alloc_mov(s, def, args, s->op_dead_args[op_index], 2332 s->op_sync_args[op_index]); 2333 break; 2334 case INDEX_op_movi_i32: 2335 case INDEX_op_movi_i64: 2336 tcg_reg_alloc_movi(s, args, s->op_dead_args[op_index], 2337 s->op_sync_args[op_index]); 2338 break; 2339 case INDEX_op_debug_insn_start: 2340 /* debug instruction */ 2341 break; 2342 case INDEX_op_nop: 2343 case INDEX_op_nop1: 2344 case INDEX_op_nop2: 2345 case INDEX_op_nop3: 2346 break; 2347 case INDEX_op_nopn: 2348 args += args[0]; 2349 goto next; 2350 case INDEX_op_discard: 2351 temp_dead(s, args[0]); 2352 break; 2353 case INDEX_op_set_label: 2354 tcg_reg_alloc_bb_end(s, s->reserved_regs); 2355 tcg_out_label(s, args[0], s->code_ptr); 2356 break; 2357 case INDEX_op_call: 2358 args += tcg_reg_alloc_call(s, def, opc, args, 2359 s->op_dead_args[op_index], 2360 s->op_sync_args[op_index]); 2361 goto next; 2362 case INDEX_op_end: 2363 goto the_end; 2364 default: 2365 /* Sanity check that we've not introduced any unhandled opcodes. */ 2366 if (def->flags & TCG_OPF_NOT_PRESENT) { 2367 tcg_abort(); 2368 } 2369 /* Note: in order to speed up the code, it would be much 2370 faster to have specialized register allocator functions for 2371 some common argument patterns */ 2372 tcg_reg_alloc_op(s, def, opc, args, s->op_dead_args[op_index], 2373 s->op_sync_args[op_index]); 2374 break; 2375 } 2376 args += def->nb_args; 2377 next: 2378 if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) { 2379 return op_index; 2380 } 2381 op_index++; 2382 #ifndef NDEBUG 2383 check_regs(s); 2384 #endif 2385 } 2386 the_end: 2387 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU) 2388 /* Generate TB finalization at the end of block */ 2389 tcg_out_tb_finalize(s); 2390 #endif 2391 return -1; 2392 } 2393 2394 int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf) 2395 { 2396 #ifdef CONFIG_PROFILER 2397 { 2398 int n; 2399 n = (s->gen_opc_ptr - s->gen_opc_buf); 2400 s->op_count += n; 2401 if (n > s->op_count_max) 2402 s->op_count_max = n; 2403 2404 s->temp_count += s->nb_temps; 2405 if (s->nb_temps > s->temp_count_max) 2406 s->temp_count_max = s->nb_temps; 2407 } 2408 #endif 2409 2410 tcg_gen_code_common(s, gen_code_buf, -1); 2411 2412 /* flush instruction cache */ 2413 flush_icache_range((uintptr_t)gen_code_buf, (uintptr_t)s->code_ptr); 2414 2415 return s->code_ptr - gen_code_buf; 2416 } 2417 2418 /* Return the index of the micro operation such as the pc after is < 2419 offset bytes from the start of the TB. The contents of gen_code_buf must 2420 not be changed, though writing the same values is ok. 2421 Return -1 if not found. */ 2422 int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset) 2423 { 2424 return tcg_gen_code_common(s, gen_code_buf, offset); 2425 } 2426 2427 #ifdef CONFIG_PROFILER 2428 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) 2429 { 2430 TCGContext *s = &tcg_ctx; 2431 int64_t tot; 2432 2433 tot = s->interm_time + s->code_time; 2434 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n", 2435 tot, tot / 2.4e9); 2436 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n", 2437 s->tb_count, 2438 s->tb_count1 - s->tb_count, 2439 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0); 2440 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n", 2441 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max); 2442 cpu_fprintf(f, "deleted ops/TB %0.2f\n", 2443 s->tb_count ? 2444 (double)s->del_op_count / s->tb_count : 0); 2445 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n", 2446 s->tb_count ? 2447 (double)s->temp_count / s->tb_count : 0, 2448 s->temp_count_max); 2449 2450 cpu_fprintf(f, "cycles/op %0.1f\n", 2451 s->op_count ? (double)tot / s->op_count : 0); 2452 cpu_fprintf(f, "cycles/in byte %0.1f\n", 2453 s->code_in_len ? (double)tot / s->code_in_len : 0); 2454 cpu_fprintf(f, "cycles/out byte %0.1f\n", 2455 s->code_out_len ? (double)tot / s->code_out_len : 0); 2456 if (tot == 0) 2457 tot = 1; 2458 cpu_fprintf(f, " gen_interm time %0.1f%%\n", 2459 (double)s->interm_time / tot * 100.0); 2460 cpu_fprintf(f, " gen_code time %0.1f%%\n", 2461 (double)s->code_time / tot * 100.0); 2462 cpu_fprintf(f, "optim./code time %0.1f%%\n", 2463 (double)s->opt_time / (s->code_time ? s->code_time : 1) 2464 * 100.0); 2465 cpu_fprintf(f, "liveness/code time %0.1f%%\n", 2466 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0); 2467 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n", 2468 s->restore_count); 2469 cpu_fprintf(f, " avg cycles %0.1f\n", 2470 s->restore_count ? (double)s->restore_time / s->restore_count : 0); 2471 2472 dump_op_count(); 2473 } 2474 #else 2475 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) 2476 { 2477 cpu_fprintf(f, "[TCG profiler not compiled]\n"); 2478 } 2479 #endif 2480 2481 #ifdef ELF_HOST_MACHINE 2482 /* In order to use this feature, the backend needs to do three things: 2483 2484 (1) Define ELF_HOST_MACHINE to indicate both what value to 2485 put into the ELF image and to indicate support for the feature. 2486 2487 (2) Define tcg_register_jit. This should create a buffer containing 2488 the contents of a .debug_frame section that describes the post- 2489 prologue unwind info for the tcg machine. 2490 2491 (3) Call tcg_register_jit_int, with the constructed .debug_frame. 2492 */ 2493 2494 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */ 2495 typedef enum { 2496 JIT_NOACTION = 0, 2497 JIT_REGISTER_FN, 2498 JIT_UNREGISTER_FN 2499 } jit_actions_t; 2500 2501 struct jit_code_entry { 2502 struct jit_code_entry *next_entry; 2503 struct jit_code_entry *prev_entry; 2504 const void *symfile_addr; 2505 uint64_t symfile_size; 2506 }; 2507 2508 struct jit_descriptor { 2509 uint32_t version; 2510 uint32_t action_flag; 2511 struct jit_code_entry *relevant_entry; 2512 struct jit_code_entry *first_entry; 2513 }; 2514 2515 void __jit_debug_register_code(void) __attribute__((noinline)); 2516 void __jit_debug_register_code(void) 2517 { 2518 asm(""); 2519 } 2520 2521 /* Must statically initialize the version, because GDB may check 2522 the version before we can set it. */ 2523 struct jit_descriptor __jit_debug_descriptor = { 1, 0, 0, 0 }; 2524 2525 /* End GDB interface. */ 2526 2527 static int find_string(const char *strtab, const char *str) 2528 { 2529 const char *p = strtab + 1; 2530 2531 while (1) { 2532 if (strcmp(p, str) == 0) { 2533 return p - strtab; 2534 } 2535 p += strlen(p) + 1; 2536 } 2537 } 2538 2539 static void tcg_register_jit_int(void *buf_ptr, size_t buf_size, 2540 void *debug_frame, size_t debug_frame_size) 2541 { 2542 struct __attribute__((packed)) DebugInfo { 2543 uint32_t len; 2544 uint16_t version; 2545 uint32_t abbrev; 2546 uint8_t ptr_size; 2547 uint8_t cu_die; 2548 uint16_t cu_lang; 2549 uintptr_t cu_low_pc; 2550 uintptr_t cu_high_pc; 2551 uint8_t fn_die; 2552 char fn_name[16]; 2553 uintptr_t fn_low_pc; 2554 uintptr_t fn_high_pc; 2555 uint8_t cu_eoc; 2556 }; 2557 2558 struct ElfImage { 2559 ElfW(Ehdr) ehdr; 2560 ElfW(Phdr) phdr; 2561 ElfW(Shdr) shdr[7]; 2562 ElfW(Sym) sym[2]; 2563 struct DebugInfo di; 2564 uint8_t da[24]; 2565 char str[80]; 2566 }; 2567 2568 struct ElfImage *img; 2569 2570 static const struct ElfImage img_template = { 2571 .ehdr = { 2572 .e_ident[EI_MAG0] = ELFMAG0, 2573 .e_ident[EI_MAG1] = ELFMAG1, 2574 .e_ident[EI_MAG2] = ELFMAG2, 2575 .e_ident[EI_MAG3] = ELFMAG3, 2576 .e_ident[EI_CLASS] = ELF_CLASS, 2577 .e_ident[EI_DATA] = ELF_DATA, 2578 .e_ident[EI_VERSION] = EV_CURRENT, 2579 .e_type = ET_EXEC, 2580 .e_machine = ELF_HOST_MACHINE, 2581 .e_version = EV_CURRENT, 2582 .e_phoff = offsetof(struct ElfImage, phdr), 2583 .e_shoff = offsetof(struct ElfImage, shdr), 2584 .e_ehsize = sizeof(ElfW(Shdr)), 2585 .e_phentsize = sizeof(ElfW(Phdr)), 2586 .e_phnum = 1, 2587 .e_shentsize = sizeof(ElfW(Shdr)), 2588 .e_shnum = ARRAY_SIZE(img->shdr), 2589 .e_shstrndx = ARRAY_SIZE(img->shdr) - 1, 2590 #ifdef ELF_HOST_FLAGS 2591 .e_flags = ELF_HOST_FLAGS, 2592 #endif 2593 #ifdef ELF_OSABI 2594 .e_ident[EI_OSABI] = ELF_OSABI, 2595 #endif 2596 }, 2597 .phdr = { 2598 .p_type = PT_LOAD, 2599 .p_flags = PF_X, 2600 }, 2601 .shdr = { 2602 [0] = { .sh_type = SHT_NULL }, 2603 /* Trick: The contents of code_gen_buffer are not present in 2604 this fake ELF file; that got allocated elsewhere. Therefore 2605 we mark .text as SHT_NOBITS (similar to .bss) so that readers 2606 will not look for contents. We can record any address. */ 2607 [1] = { /* .text */ 2608 .sh_type = SHT_NOBITS, 2609 .sh_flags = SHF_EXECINSTR | SHF_ALLOC, 2610 }, 2611 [2] = { /* .debug_info */ 2612 .sh_type = SHT_PROGBITS, 2613 .sh_offset = offsetof(struct ElfImage, di), 2614 .sh_size = sizeof(struct DebugInfo), 2615 }, 2616 [3] = { /* .debug_abbrev */ 2617 .sh_type = SHT_PROGBITS, 2618 .sh_offset = offsetof(struct ElfImage, da), 2619 .sh_size = sizeof(img->da), 2620 }, 2621 [4] = { /* .debug_frame */ 2622 .sh_type = SHT_PROGBITS, 2623 .sh_offset = sizeof(struct ElfImage), 2624 }, 2625 [5] = { /* .symtab */ 2626 .sh_type = SHT_SYMTAB, 2627 .sh_offset = offsetof(struct ElfImage, sym), 2628 .sh_size = sizeof(img->sym), 2629 .sh_info = 1, 2630 .sh_link = ARRAY_SIZE(img->shdr) - 1, 2631 .sh_entsize = sizeof(ElfW(Sym)), 2632 }, 2633 [6] = { /* .strtab */ 2634 .sh_type = SHT_STRTAB, 2635 .sh_offset = offsetof(struct ElfImage, str), 2636 .sh_size = sizeof(img->str), 2637 } 2638 }, 2639 .sym = { 2640 [1] = { /* code_gen_buffer */ 2641 .st_info = ELF_ST_INFO(STB_GLOBAL, STT_FUNC), 2642 .st_shndx = 1, 2643 } 2644 }, 2645 .di = { 2646 .len = sizeof(struct DebugInfo) - 4, 2647 .version = 2, 2648 .ptr_size = sizeof(void *), 2649 .cu_die = 1, 2650 .cu_lang = 0x8001, /* DW_LANG_Mips_Assembler */ 2651 .fn_die = 2, 2652 .fn_name = "code_gen_buffer" 2653 }, 2654 .da = { 2655 1, /* abbrev number (the cu) */ 2656 0x11, 1, /* DW_TAG_compile_unit, has children */ 2657 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */ 2658 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ 2659 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ 2660 0, 0, /* end of abbrev */ 2661 2, /* abbrev number (the fn) */ 2662 0x2e, 0, /* DW_TAG_subprogram, no children */ 2663 0x3, 0x8, /* DW_AT_name, DW_FORM_string */ 2664 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ 2665 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ 2666 0, 0, /* end of abbrev */ 2667 0 /* no more abbrev */ 2668 }, 2669 .str = "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0" 2670 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer", 2671 }; 2672 2673 /* We only need a single jit entry; statically allocate it. */ 2674 static struct jit_code_entry one_entry; 2675 2676 uintptr_t buf = (uintptr_t)buf_ptr; 2677 size_t img_size = sizeof(struct ElfImage) + debug_frame_size; 2678 2679 img = g_malloc(img_size); 2680 *img = img_template; 2681 memcpy(img + 1, debug_frame, debug_frame_size); 2682 2683 img->phdr.p_vaddr = buf; 2684 img->phdr.p_paddr = buf; 2685 img->phdr.p_memsz = buf_size; 2686 2687 img->shdr[1].sh_name = find_string(img->str, ".text"); 2688 img->shdr[1].sh_addr = buf; 2689 img->shdr[1].sh_size = buf_size; 2690 2691 img->shdr[2].sh_name = find_string(img->str, ".debug_info"); 2692 img->shdr[3].sh_name = find_string(img->str, ".debug_abbrev"); 2693 2694 img->shdr[4].sh_name = find_string(img->str, ".debug_frame"); 2695 img->shdr[4].sh_size = debug_frame_size; 2696 2697 img->shdr[5].sh_name = find_string(img->str, ".symtab"); 2698 img->shdr[6].sh_name = find_string(img->str, ".strtab"); 2699 2700 img->sym[1].st_name = find_string(img->str, "code_gen_buffer"); 2701 img->sym[1].st_value = buf; 2702 img->sym[1].st_size = buf_size; 2703 2704 img->di.cu_low_pc = buf; 2705 img->di.cu_high_pc = buf + buf_size; 2706 img->di.fn_low_pc = buf; 2707 img->di.fn_high_pc = buf + buf_size; 2708 2709 #ifdef DEBUG_JIT 2710 /* Enable this block to be able to debug the ELF image file creation. 2711 One can use readelf, objdump, or other inspection utilities. */ 2712 { 2713 FILE *f = fopen("/tmp/qemu.jit", "w+b"); 2714 if (f) { 2715 if (fwrite(img, img_size, 1, f) != img_size) { 2716 /* Avoid stupid unused return value warning for fwrite. */ 2717 } 2718 fclose(f); 2719 } 2720 } 2721 #endif 2722 2723 one_entry.symfile_addr = img; 2724 one_entry.symfile_size = img_size; 2725 2726 __jit_debug_descriptor.action_flag = JIT_REGISTER_FN; 2727 __jit_debug_descriptor.relevant_entry = &one_entry; 2728 __jit_debug_descriptor.first_entry = &one_entry; 2729 __jit_debug_register_code(); 2730 } 2731 #else 2732 /* No support for the feature. Provide the entry point expected by exec.c, 2733 and implement the internal function we declared earlier. */ 2734 2735 static void tcg_register_jit_int(void *buf, size_t size, 2736 void *debug_frame, size_t debug_frame_size) 2737 { 2738 } 2739 2740 void tcg_register_jit(void *buf, size_t buf_size) 2741 { 2742 } 2743 #endif /* ELF_HOST_MACHINE */ 2744