1 /* 2 * Tiny Code Generator for QEMU 3 * 4 * Copyright (c) 2008 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 /* define it to use liveness analysis (better code) */ 26 #define USE_LIVENESS_ANALYSIS 27 #define USE_TCG_OPTIMIZATIONS 28 29 #include "config.h" 30 31 /* Define to jump the ELF file used to communicate with GDB. */ 32 #undef DEBUG_JIT 33 34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG) 35 /* define it to suppress various consistency checks (faster) */ 36 #define NDEBUG 37 #endif 38 39 #include "qemu-common.h" 40 #include "qemu/host-utils.h" 41 #include "qemu/timer.h" 42 43 /* Note: the long term plan is to reduce the dependencies on the QEMU 44 CPU definitions. Currently they are used for qemu_ld/st 45 instructions */ 46 #define NO_CPU_IO_DEFS 47 #include "cpu.h" 48 49 #include "tcg-op.h" 50 51 #if UINTPTR_MAX == UINT32_MAX 52 # define ELF_CLASS ELFCLASS32 53 #else 54 # define ELF_CLASS ELFCLASS64 55 #endif 56 #ifdef HOST_WORDS_BIGENDIAN 57 # define ELF_DATA ELFDATA2MSB 58 #else 59 # define ELF_DATA ELFDATA2LSB 60 #endif 61 62 #include "elf.h" 63 64 /* Forward declarations for functions declared in tcg-target.c and used here. */ 65 static void tcg_target_init(TCGContext *s); 66 static void tcg_target_qemu_prologue(TCGContext *s); 67 static void patch_reloc(tcg_insn_unit *code_ptr, int type, 68 intptr_t value, intptr_t addend); 69 70 /* The CIE and FDE header definitions will be common to all hosts. */ 71 typedef struct { 72 uint32_t len __attribute__((aligned((sizeof(void *))))); 73 uint32_t id; 74 uint8_t version; 75 char augmentation[1]; 76 uint8_t code_align; 77 uint8_t data_align; 78 uint8_t return_column; 79 } DebugFrameCIE; 80 81 typedef struct QEMU_PACKED { 82 uint32_t len __attribute__((aligned((sizeof(void *))))); 83 uint32_t cie_offset; 84 uintptr_t func_start; 85 uintptr_t func_len; 86 } DebugFrameFDEHeader; 87 88 typedef struct QEMU_PACKED { 89 DebugFrameCIE cie; 90 DebugFrameFDEHeader fde; 91 } DebugFrameHeader; 92 93 static void tcg_register_jit_int(void *buf, size_t size, 94 const void *debug_frame, 95 size_t debug_frame_size) 96 __attribute__((unused)); 97 98 /* Forward declarations for functions declared and used in tcg-target.c. */ 99 static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str); 100 static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, 101 intptr_t arg2); 102 static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg); 103 static void tcg_out_movi(TCGContext *s, TCGType type, 104 TCGReg ret, tcg_target_long arg); 105 static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, 106 const int *const_args); 107 static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1, 108 intptr_t arg2); 109 static void tcg_out_call(TCGContext *s, tcg_insn_unit *target); 110 static int tcg_target_const_match(tcg_target_long val, TCGType type, 111 const TCGArgConstraint *arg_ct); 112 static void tcg_out_tb_init(TCGContext *s); 113 static void tcg_out_tb_finalize(TCGContext *s); 114 115 116 TCGOpDef tcg_op_defs[] = { 117 #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags }, 118 #include "tcg-opc.h" 119 #undef DEF 120 }; 121 const size_t tcg_op_defs_max = ARRAY_SIZE(tcg_op_defs); 122 123 static TCGRegSet tcg_target_available_regs[2]; 124 static TCGRegSet tcg_target_call_clobber_regs; 125 126 #if TCG_TARGET_INSN_UNIT_SIZE == 1 127 static __attribute__((unused)) inline void tcg_out8(TCGContext *s, uint8_t v) 128 { 129 *s->code_ptr++ = v; 130 } 131 132 static __attribute__((unused)) inline void tcg_patch8(tcg_insn_unit *p, 133 uint8_t v) 134 { 135 *p = v; 136 } 137 #endif 138 139 #if TCG_TARGET_INSN_UNIT_SIZE <= 2 140 static __attribute__((unused)) inline void tcg_out16(TCGContext *s, uint16_t v) 141 { 142 if (TCG_TARGET_INSN_UNIT_SIZE == 2) { 143 *s->code_ptr++ = v; 144 } else { 145 tcg_insn_unit *p = s->code_ptr; 146 memcpy(p, &v, sizeof(v)); 147 s->code_ptr = p + (2 / TCG_TARGET_INSN_UNIT_SIZE); 148 } 149 } 150 151 static __attribute__((unused)) inline void tcg_patch16(tcg_insn_unit *p, 152 uint16_t v) 153 { 154 if (TCG_TARGET_INSN_UNIT_SIZE == 2) { 155 *p = v; 156 } else { 157 memcpy(p, &v, sizeof(v)); 158 } 159 } 160 #endif 161 162 #if TCG_TARGET_INSN_UNIT_SIZE <= 4 163 static __attribute__((unused)) inline void tcg_out32(TCGContext *s, uint32_t v) 164 { 165 if (TCG_TARGET_INSN_UNIT_SIZE == 4) { 166 *s->code_ptr++ = v; 167 } else { 168 tcg_insn_unit *p = s->code_ptr; 169 memcpy(p, &v, sizeof(v)); 170 s->code_ptr = p + (4 / TCG_TARGET_INSN_UNIT_SIZE); 171 } 172 } 173 174 static __attribute__((unused)) inline void tcg_patch32(tcg_insn_unit *p, 175 uint32_t v) 176 { 177 if (TCG_TARGET_INSN_UNIT_SIZE == 4) { 178 *p = v; 179 } else { 180 memcpy(p, &v, sizeof(v)); 181 } 182 } 183 #endif 184 185 #if TCG_TARGET_INSN_UNIT_SIZE <= 8 186 static __attribute__((unused)) inline void tcg_out64(TCGContext *s, uint64_t v) 187 { 188 if (TCG_TARGET_INSN_UNIT_SIZE == 8) { 189 *s->code_ptr++ = v; 190 } else { 191 tcg_insn_unit *p = s->code_ptr; 192 memcpy(p, &v, sizeof(v)); 193 s->code_ptr = p + (8 / TCG_TARGET_INSN_UNIT_SIZE); 194 } 195 } 196 197 static __attribute__((unused)) inline void tcg_patch64(tcg_insn_unit *p, 198 uint64_t v) 199 { 200 if (TCG_TARGET_INSN_UNIT_SIZE == 8) { 201 *p = v; 202 } else { 203 memcpy(p, &v, sizeof(v)); 204 } 205 } 206 #endif 207 208 /* label relocation processing */ 209 210 static void tcg_out_reloc(TCGContext *s, tcg_insn_unit *code_ptr, int type, 211 TCGLabel *l, intptr_t addend) 212 { 213 TCGRelocation *r; 214 215 if (l->has_value) { 216 /* FIXME: This may break relocations on RISC targets that 217 modify instruction fields in place. The caller may not have 218 written the initial value. */ 219 patch_reloc(code_ptr, type, l->u.value, addend); 220 } else { 221 /* add a new relocation entry */ 222 r = tcg_malloc(sizeof(TCGRelocation)); 223 r->type = type; 224 r->ptr = code_ptr; 225 r->addend = addend; 226 r->next = l->u.first_reloc; 227 l->u.first_reloc = r; 228 } 229 } 230 231 static void tcg_out_label(TCGContext *s, TCGLabel *l, tcg_insn_unit *ptr) 232 { 233 intptr_t value = (intptr_t)ptr; 234 TCGRelocation *r; 235 236 assert(!l->has_value); 237 238 for (r = l->u.first_reloc; r != NULL; r = r->next) { 239 patch_reloc(r->ptr, r->type, value, r->addend); 240 } 241 242 l->has_value = 1; 243 l->u.value_ptr = ptr; 244 } 245 246 TCGLabel *gen_new_label(void) 247 { 248 TCGContext *s = &tcg_ctx; 249 TCGLabel *l = tcg_malloc(sizeof(TCGLabel)); 250 251 *l = (TCGLabel){ 252 .id = s->nb_labels++ 253 }; 254 255 return l; 256 } 257 258 #include "tcg-target.c" 259 260 /* pool based memory allocation */ 261 void *tcg_malloc_internal(TCGContext *s, int size) 262 { 263 TCGPool *p; 264 int pool_size; 265 266 if (size > TCG_POOL_CHUNK_SIZE) { 267 /* big malloc: insert a new pool (XXX: could optimize) */ 268 p = g_malloc(sizeof(TCGPool) + size); 269 p->size = size; 270 p->next = s->pool_first_large; 271 s->pool_first_large = p; 272 return p->data; 273 } else { 274 p = s->pool_current; 275 if (!p) { 276 p = s->pool_first; 277 if (!p) 278 goto new_pool; 279 } else { 280 if (!p->next) { 281 new_pool: 282 pool_size = TCG_POOL_CHUNK_SIZE; 283 p = g_malloc(sizeof(TCGPool) + pool_size); 284 p->size = pool_size; 285 p->next = NULL; 286 if (s->pool_current) 287 s->pool_current->next = p; 288 else 289 s->pool_first = p; 290 } else { 291 p = p->next; 292 } 293 } 294 } 295 s->pool_current = p; 296 s->pool_cur = p->data + size; 297 s->pool_end = p->data + p->size; 298 return p->data; 299 } 300 301 void tcg_pool_reset(TCGContext *s) 302 { 303 TCGPool *p, *t; 304 for (p = s->pool_first_large; p; p = t) { 305 t = p->next; 306 g_free(p); 307 } 308 s->pool_first_large = NULL; 309 s->pool_cur = s->pool_end = NULL; 310 s->pool_current = NULL; 311 } 312 313 typedef struct TCGHelperInfo { 314 void *func; 315 const char *name; 316 unsigned flags; 317 unsigned sizemask; 318 } TCGHelperInfo; 319 320 #include "exec/helper-proto.h" 321 322 static const TCGHelperInfo all_helpers[] = { 323 #include "exec/helper-tcg.h" 324 }; 325 326 void tcg_context_init(TCGContext *s) 327 { 328 int op, total_args, n, i; 329 TCGOpDef *def; 330 TCGArgConstraint *args_ct; 331 int *sorted_args; 332 GHashTable *helper_table; 333 334 memset(s, 0, sizeof(*s)); 335 s->nb_globals = 0; 336 337 /* Count total number of arguments and allocate the corresponding 338 space */ 339 total_args = 0; 340 for(op = 0; op < NB_OPS; op++) { 341 def = &tcg_op_defs[op]; 342 n = def->nb_iargs + def->nb_oargs; 343 total_args += n; 344 } 345 346 args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args); 347 sorted_args = g_malloc(sizeof(int) * total_args); 348 349 for(op = 0; op < NB_OPS; op++) { 350 def = &tcg_op_defs[op]; 351 def->args_ct = args_ct; 352 def->sorted_args = sorted_args; 353 n = def->nb_iargs + def->nb_oargs; 354 sorted_args += n; 355 args_ct += n; 356 } 357 358 /* Register helpers. */ 359 /* Use g_direct_hash/equal for direct pointer comparisons on func. */ 360 s->helpers = helper_table = g_hash_table_new(NULL, NULL); 361 362 for (i = 0; i < ARRAY_SIZE(all_helpers); ++i) { 363 g_hash_table_insert(helper_table, (gpointer)all_helpers[i].func, 364 (gpointer)&all_helpers[i]); 365 } 366 367 tcg_target_init(s); 368 } 369 370 void tcg_prologue_init(TCGContext *s) 371 { 372 /* init global prologue and epilogue */ 373 s->code_buf = s->code_gen_prologue; 374 s->code_ptr = s->code_buf; 375 tcg_target_qemu_prologue(s); 376 flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr); 377 378 #ifdef DEBUG_DISAS 379 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { 380 size_t size = tcg_current_code_size(s); 381 qemu_log("PROLOGUE: [size=%zu]\n", size); 382 log_disas(s->code_buf, size); 383 qemu_log("\n"); 384 qemu_log_flush(); 385 } 386 #endif 387 } 388 389 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size) 390 { 391 s->frame_start = start; 392 s->frame_end = start + size; 393 s->frame_reg = reg; 394 } 395 396 void tcg_func_start(TCGContext *s) 397 { 398 tcg_pool_reset(s); 399 s->nb_temps = s->nb_globals; 400 401 /* No temps have been previously allocated for size or locality. */ 402 memset(s->free_temps, 0, sizeof(s->free_temps)); 403 404 s->nb_labels = 0; 405 s->current_frame_offset = s->frame_start; 406 407 #ifdef CONFIG_DEBUG_TCG 408 s->goto_tb_issue_mask = 0; 409 #endif 410 411 s->gen_first_op_idx = 0; 412 s->gen_last_op_idx = -1; 413 s->gen_next_op_idx = 0; 414 s->gen_next_parm_idx = 0; 415 416 s->be = tcg_malloc(sizeof(TCGBackendData)); 417 } 418 419 static inline void tcg_temp_alloc(TCGContext *s, int n) 420 { 421 if (n > TCG_MAX_TEMPS) 422 tcg_abort(); 423 } 424 425 static inline int tcg_global_reg_new_internal(TCGType type, int reg, 426 const char *name) 427 { 428 TCGContext *s = &tcg_ctx; 429 TCGTemp *ts; 430 int idx; 431 432 #if TCG_TARGET_REG_BITS == 32 433 if (type != TCG_TYPE_I32) 434 tcg_abort(); 435 #endif 436 if (tcg_regset_test_reg(s->reserved_regs, reg)) 437 tcg_abort(); 438 idx = s->nb_globals; 439 tcg_temp_alloc(s, s->nb_globals + 1); 440 ts = &s->temps[s->nb_globals]; 441 ts->base_type = type; 442 ts->type = type; 443 ts->fixed_reg = 1; 444 ts->reg = reg; 445 ts->name = name; 446 s->nb_globals++; 447 tcg_regset_set_reg(s->reserved_regs, reg); 448 return idx; 449 } 450 451 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name) 452 { 453 int idx; 454 455 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name); 456 return MAKE_TCGV_I32(idx); 457 } 458 459 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name) 460 { 461 int idx; 462 463 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name); 464 return MAKE_TCGV_I64(idx); 465 } 466 467 static inline int tcg_global_mem_new_internal(TCGType type, int reg, 468 intptr_t offset, 469 const char *name) 470 { 471 TCGContext *s = &tcg_ctx; 472 TCGTemp *ts; 473 int idx; 474 475 idx = s->nb_globals; 476 #if TCG_TARGET_REG_BITS == 32 477 if (type == TCG_TYPE_I64) { 478 char buf[64]; 479 tcg_temp_alloc(s, s->nb_globals + 2); 480 ts = &s->temps[s->nb_globals]; 481 ts->base_type = type; 482 ts->type = TCG_TYPE_I32; 483 ts->fixed_reg = 0; 484 ts->mem_allocated = 1; 485 ts->mem_reg = reg; 486 #ifdef HOST_WORDS_BIGENDIAN 487 ts->mem_offset = offset + 4; 488 #else 489 ts->mem_offset = offset; 490 #endif 491 pstrcpy(buf, sizeof(buf), name); 492 pstrcat(buf, sizeof(buf), "_0"); 493 ts->name = strdup(buf); 494 ts++; 495 496 ts->base_type = type; 497 ts->type = TCG_TYPE_I32; 498 ts->fixed_reg = 0; 499 ts->mem_allocated = 1; 500 ts->mem_reg = reg; 501 #ifdef HOST_WORDS_BIGENDIAN 502 ts->mem_offset = offset; 503 #else 504 ts->mem_offset = offset + 4; 505 #endif 506 pstrcpy(buf, sizeof(buf), name); 507 pstrcat(buf, sizeof(buf), "_1"); 508 ts->name = strdup(buf); 509 510 s->nb_globals += 2; 511 } else 512 #endif 513 { 514 tcg_temp_alloc(s, s->nb_globals + 1); 515 ts = &s->temps[s->nb_globals]; 516 ts->base_type = type; 517 ts->type = type; 518 ts->fixed_reg = 0; 519 ts->mem_allocated = 1; 520 ts->mem_reg = reg; 521 ts->mem_offset = offset; 522 ts->name = name; 523 s->nb_globals++; 524 } 525 return idx; 526 } 527 528 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name) 529 { 530 int idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name); 531 return MAKE_TCGV_I32(idx); 532 } 533 534 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name) 535 { 536 int idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name); 537 return MAKE_TCGV_I64(idx); 538 } 539 540 static inline int tcg_temp_new_internal(TCGType type, int temp_local) 541 { 542 TCGContext *s = &tcg_ctx; 543 TCGTemp *ts; 544 int idx, k; 545 546 k = type + (temp_local ? TCG_TYPE_COUNT : 0); 547 idx = find_first_bit(s->free_temps[k].l, TCG_MAX_TEMPS); 548 if (idx < TCG_MAX_TEMPS) { 549 /* There is already an available temp with the right type. */ 550 clear_bit(idx, s->free_temps[k].l); 551 552 ts = &s->temps[idx]; 553 ts->temp_allocated = 1; 554 assert(ts->base_type == type); 555 assert(ts->temp_local == temp_local); 556 } else { 557 idx = s->nb_temps; 558 #if TCG_TARGET_REG_BITS == 32 559 if (type == TCG_TYPE_I64) { 560 tcg_temp_alloc(s, s->nb_temps + 2); 561 ts = &s->temps[s->nb_temps]; 562 ts->base_type = type; 563 ts->type = TCG_TYPE_I32; 564 ts->temp_allocated = 1; 565 ts->temp_local = temp_local; 566 ts->name = NULL; 567 ts++; 568 ts->base_type = type; 569 ts->type = TCG_TYPE_I32; 570 ts->temp_allocated = 1; 571 ts->temp_local = temp_local; 572 ts->name = NULL; 573 s->nb_temps += 2; 574 } else 575 #endif 576 { 577 tcg_temp_alloc(s, s->nb_temps + 1); 578 ts = &s->temps[s->nb_temps]; 579 ts->base_type = type; 580 ts->type = type; 581 ts->temp_allocated = 1; 582 ts->temp_local = temp_local; 583 ts->name = NULL; 584 s->nb_temps++; 585 } 586 } 587 588 #if defined(CONFIG_DEBUG_TCG) 589 s->temps_in_use++; 590 #endif 591 return idx; 592 } 593 594 TCGv_i32 tcg_temp_new_internal_i32(int temp_local) 595 { 596 int idx; 597 598 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local); 599 return MAKE_TCGV_I32(idx); 600 } 601 602 TCGv_i64 tcg_temp_new_internal_i64(int temp_local) 603 { 604 int idx; 605 606 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local); 607 return MAKE_TCGV_I64(idx); 608 } 609 610 static void tcg_temp_free_internal(int idx) 611 { 612 TCGContext *s = &tcg_ctx; 613 TCGTemp *ts; 614 int k; 615 616 #if defined(CONFIG_DEBUG_TCG) 617 s->temps_in_use--; 618 if (s->temps_in_use < 0) { 619 fprintf(stderr, "More temporaries freed than allocated!\n"); 620 } 621 #endif 622 623 assert(idx >= s->nb_globals && idx < s->nb_temps); 624 ts = &s->temps[idx]; 625 assert(ts->temp_allocated != 0); 626 ts->temp_allocated = 0; 627 628 k = ts->base_type + (ts->temp_local ? TCG_TYPE_COUNT : 0); 629 set_bit(idx, s->free_temps[k].l); 630 } 631 632 void tcg_temp_free_i32(TCGv_i32 arg) 633 { 634 tcg_temp_free_internal(GET_TCGV_I32(arg)); 635 } 636 637 void tcg_temp_free_i64(TCGv_i64 arg) 638 { 639 tcg_temp_free_internal(GET_TCGV_I64(arg)); 640 } 641 642 TCGv_i32 tcg_const_i32(int32_t val) 643 { 644 TCGv_i32 t0; 645 t0 = tcg_temp_new_i32(); 646 tcg_gen_movi_i32(t0, val); 647 return t0; 648 } 649 650 TCGv_i64 tcg_const_i64(int64_t val) 651 { 652 TCGv_i64 t0; 653 t0 = tcg_temp_new_i64(); 654 tcg_gen_movi_i64(t0, val); 655 return t0; 656 } 657 658 TCGv_i32 tcg_const_local_i32(int32_t val) 659 { 660 TCGv_i32 t0; 661 t0 = tcg_temp_local_new_i32(); 662 tcg_gen_movi_i32(t0, val); 663 return t0; 664 } 665 666 TCGv_i64 tcg_const_local_i64(int64_t val) 667 { 668 TCGv_i64 t0; 669 t0 = tcg_temp_local_new_i64(); 670 tcg_gen_movi_i64(t0, val); 671 return t0; 672 } 673 674 #if defined(CONFIG_DEBUG_TCG) 675 void tcg_clear_temp_count(void) 676 { 677 TCGContext *s = &tcg_ctx; 678 s->temps_in_use = 0; 679 } 680 681 int tcg_check_temp_count(void) 682 { 683 TCGContext *s = &tcg_ctx; 684 if (s->temps_in_use) { 685 /* Clear the count so that we don't give another 686 * warning immediately next time around. 687 */ 688 s->temps_in_use = 0; 689 return 1; 690 } 691 return 0; 692 } 693 #endif 694 695 /* Note: we convert the 64 bit args to 32 bit and do some alignment 696 and endian swap. Maybe it would be better to do the alignment 697 and endian swap in tcg_reg_alloc_call(). */ 698 void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret, 699 int nargs, TCGArg *args) 700 { 701 int i, real_args, nb_rets, pi, pi_first; 702 unsigned sizemask, flags; 703 TCGHelperInfo *info; 704 705 info = g_hash_table_lookup(s->helpers, (gpointer)func); 706 flags = info->flags; 707 sizemask = info->sizemask; 708 709 #if defined(__sparc__) && !defined(__arch64__) \ 710 && !defined(CONFIG_TCG_INTERPRETER) 711 /* We have 64-bit values in one register, but need to pass as two 712 separate parameters. Split them. */ 713 int orig_sizemask = sizemask; 714 int orig_nargs = nargs; 715 TCGv_i64 retl, reth; 716 717 TCGV_UNUSED_I64(retl); 718 TCGV_UNUSED_I64(reth); 719 if (sizemask != 0) { 720 TCGArg *split_args = __builtin_alloca(sizeof(TCGArg) * nargs * 2); 721 for (i = real_args = 0; i < nargs; ++i) { 722 int is_64bit = sizemask & (1 << (i+1)*2); 723 if (is_64bit) { 724 TCGv_i64 orig = MAKE_TCGV_I64(args[i]); 725 TCGv_i32 h = tcg_temp_new_i32(); 726 TCGv_i32 l = tcg_temp_new_i32(); 727 tcg_gen_extr_i64_i32(l, h, orig); 728 split_args[real_args++] = GET_TCGV_I32(h); 729 split_args[real_args++] = GET_TCGV_I32(l); 730 } else { 731 split_args[real_args++] = args[i]; 732 } 733 } 734 nargs = real_args; 735 args = split_args; 736 sizemask = 0; 737 } 738 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 739 for (i = 0; i < nargs; ++i) { 740 int is_64bit = sizemask & (1 << (i+1)*2); 741 int is_signed = sizemask & (2 << (i+1)*2); 742 if (!is_64bit) { 743 TCGv_i64 temp = tcg_temp_new_i64(); 744 TCGv_i64 orig = MAKE_TCGV_I64(args[i]); 745 if (is_signed) { 746 tcg_gen_ext32s_i64(temp, orig); 747 } else { 748 tcg_gen_ext32u_i64(temp, orig); 749 } 750 args[i] = GET_TCGV_I64(temp); 751 } 752 } 753 #endif /* TCG_TARGET_EXTEND_ARGS */ 754 755 pi_first = pi = s->gen_next_parm_idx; 756 if (ret != TCG_CALL_DUMMY_ARG) { 757 #if defined(__sparc__) && !defined(__arch64__) \ 758 && !defined(CONFIG_TCG_INTERPRETER) 759 if (orig_sizemask & 1) { 760 /* The 32-bit ABI is going to return the 64-bit value in 761 the %o0/%o1 register pair. Prepare for this by using 762 two return temporaries, and reassemble below. */ 763 retl = tcg_temp_new_i64(); 764 reth = tcg_temp_new_i64(); 765 s->gen_opparam_buf[pi++] = GET_TCGV_I64(reth); 766 s->gen_opparam_buf[pi++] = GET_TCGV_I64(retl); 767 nb_rets = 2; 768 } else { 769 s->gen_opparam_buf[pi++] = ret; 770 nb_rets = 1; 771 } 772 #else 773 if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) { 774 #ifdef HOST_WORDS_BIGENDIAN 775 s->gen_opparam_buf[pi++] = ret + 1; 776 s->gen_opparam_buf[pi++] = ret; 777 #else 778 s->gen_opparam_buf[pi++] = ret; 779 s->gen_opparam_buf[pi++] = ret + 1; 780 #endif 781 nb_rets = 2; 782 } else { 783 s->gen_opparam_buf[pi++] = ret; 784 nb_rets = 1; 785 } 786 #endif 787 } else { 788 nb_rets = 0; 789 } 790 real_args = 0; 791 for (i = 0; i < nargs; i++) { 792 int is_64bit = sizemask & (1 << (i+1)*2); 793 if (TCG_TARGET_REG_BITS < 64 && is_64bit) { 794 #ifdef TCG_TARGET_CALL_ALIGN_ARGS 795 /* some targets want aligned 64 bit args */ 796 if (real_args & 1) { 797 s->gen_opparam_buf[pi++] = TCG_CALL_DUMMY_ARG; 798 real_args++; 799 } 800 #endif 801 /* If stack grows up, then we will be placing successive 802 arguments at lower addresses, which means we need to 803 reverse the order compared to how we would normally 804 treat either big or little-endian. For those arguments 805 that will wind up in registers, this still works for 806 HPPA (the only current STACK_GROWSUP target) since the 807 argument registers are *also* allocated in decreasing 808 order. If another such target is added, this logic may 809 have to get more complicated to differentiate between 810 stack arguments and register arguments. */ 811 #if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP) 812 s->gen_opparam_buf[pi++] = args[i] + 1; 813 s->gen_opparam_buf[pi++] = args[i]; 814 #else 815 s->gen_opparam_buf[pi++] = args[i]; 816 s->gen_opparam_buf[pi++] = args[i] + 1; 817 #endif 818 real_args += 2; 819 continue; 820 } 821 822 s->gen_opparam_buf[pi++] = args[i]; 823 real_args++; 824 } 825 s->gen_opparam_buf[pi++] = (uintptr_t)func; 826 s->gen_opparam_buf[pi++] = flags; 827 828 i = s->gen_next_op_idx; 829 tcg_debug_assert(i < OPC_BUF_SIZE); 830 tcg_debug_assert(pi <= OPPARAM_BUF_SIZE); 831 832 /* Set links for sequential allocation during translation. */ 833 s->gen_op_buf[i] = (TCGOp){ 834 .opc = INDEX_op_call, 835 .callo = nb_rets, 836 .calli = real_args, 837 .args = pi_first, 838 .prev = i - 1, 839 .next = i + 1 840 }; 841 842 /* Make sure the calli field didn't overflow. */ 843 tcg_debug_assert(s->gen_op_buf[i].calli == real_args); 844 845 s->gen_last_op_idx = i; 846 s->gen_next_op_idx = i + 1; 847 s->gen_next_parm_idx = pi; 848 849 #if defined(__sparc__) && !defined(__arch64__) \ 850 && !defined(CONFIG_TCG_INTERPRETER) 851 /* Free all of the parts we allocated above. */ 852 for (i = real_args = 0; i < orig_nargs; ++i) { 853 int is_64bit = orig_sizemask & (1 << (i+1)*2); 854 if (is_64bit) { 855 TCGv_i32 h = MAKE_TCGV_I32(args[real_args++]); 856 TCGv_i32 l = MAKE_TCGV_I32(args[real_args++]); 857 tcg_temp_free_i32(h); 858 tcg_temp_free_i32(l); 859 } else { 860 real_args++; 861 } 862 } 863 if (orig_sizemask & 1) { 864 /* The 32-bit ABI returned two 32-bit pieces. Re-assemble them. 865 Note that describing these as TCGv_i64 eliminates an unnecessary 866 zero-extension that tcg_gen_concat_i32_i64 would create. */ 867 tcg_gen_concat32_i64(MAKE_TCGV_I64(ret), retl, reth); 868 tcg_temp_free_i64(retl); 869 tcg_temp_free_i64(reth); 870 } 871 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 872 for (i = 0; i < nargs; ++i) { 873 int is_64bit = sizemask & (1 << (i+1)*2); 874 if (!is_64bit) { 875 TCGv_i64 temp = MAKE_TCGV_I64(args[i]); 876 tcg_temp_free_i64(temp); 877 } 878 } 879 #endif /* TCG_TARGET_EXTEND_ARGS */ 880 } 881 882 static void tcg_reg_alloc_start(TCGContext *s) 883 { 884 int i; 885 TCGTemp *ts; 886 for(i = 0; i < s->nb_globals; i++) { 887 ts = &s->temps[i]; 888 if (ts->fixed_reg) { 889 ts->val_type = TEMP_VAL_REG; 890 } else { 891 ts->val_type = TEMP_VAL_MEM; 892 } 893 } 894 for(i = s->nb_globals; i < s->nb_temps; i++) { 895 ts = &s->temps[i]; 896 if (ts->temp_local) { 897 ts->val_type = TEMP_VAL_MEM; 898 } else { 899 ts->val_type = TEMP_VAL_DEAD; 900 } 901 ts->mem_allocated = 0; 902 ts->fixed_reg = 0; 903 } 904 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 905 s->reg_to_temp[i] = -1; 906 } 907 } 908 909 static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size, 910 int idx) 911 { 912 TCGTemp *ts; 913 914 assert(idx >= 0 && idx < s->nb_temps); 915 ts = &s->temps[idx]; 916 if (idx < s->nb_globals) { 917 pstrcpy(buf, buf_size, ts->name); 918 } else { 919 if (ts->temp_local) 920 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals); 921 else 922 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals); 923 } 924 return buf; 925 } 926 927 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg) 928 { 929 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg)); 930 } 931 932 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg) 933 { 934 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg)); 935 } 936 937 /* Find helper name. */ 938 static inline const char *tcg_find_helper(TCGContext *s, uintptr_t val) 939 { 940 const char *ret = NULL; 941 if (s->helpers) { 942 TCGHelperInfo *info = g_hash_table_lookup(s->helpers, (gpointer)val); 943 if (info) { 944 ret = info->name; 945 } 946 } 947 return ret; 948 } 949 950 static const char * const cond_name[] = 951 { 952 [TCG_COND_NEVER] = "never", 953 [TCG_COND_ALWAYS] = "always", 954 [TCG_COND_EQ] = "eq", 955 [TCG_COND_NE] = "ne", 956 [TCG_COND_LT] = "lt", 957 [TCG_COND_GE] = "ge", 958 [TCG_COND_LE] = "le", 959 [TCG_COND_GT] = "gt", 960 [TCG_COND_LTU] = "ltu", 961 [TCG_COND_GEU] = "geu", 962 [TCG_COND_LEU] = "leu", 963 [TCG_COND_GTU] = "gtu" 964 }; 965 966 static const char * const ldst_name[] = 967 { 968 [MO_UB] = "ub", 969 [MO_SB] = "sb", 970 [MO_LEUW] = "leuw", 971 [MO_LESW] = "lesw", 972 [MO_LEUL] = "leul", 973 [MO_LESL] = "lesl", 974 [MO_LEQ] = "leq", 975 [MO_BEUW] = "beuw", 976 [MO_BESW] = "besw", 977 [MO_BEUL] = "beul", 978 [MO_BESL] = "besl", 979 [MO_BEQ] = "beq", 980 }; 981 982 void tcg_dump_ops(TCGContext *s) 983 { 984 char buf[128]; 985 TCGOp *op; 986 int oi; 987 988 for (oi = s->gen_first_op_idx; oi >= 0; oi = op->next) { 989 int i, k, nb_oargs, nb_iargs, nb_cargs; 990 const TCGOpDef *def; 991 const TCGArg *args; 992 TCGOpcode c; 993 994 op = &s->gen_op_buf[oi]; 995 c = op->opc; 996 def = &tcg_op_defs[c]; 997 args = &s->gen_opparam_buf[op->args]; 998 999 if (c == INDEX_op_debug_insn_start) { 1000 uint64_t pc; 1001 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS 1002 pc = ((uint64_t)args[1] << 32) | args[0]; 1003 #else 1004 pc = args[0]; 1005 #endif 1006 if (oi != s->gen_first_op_idx) { 1007 qemu_log("\n"); 1008 } 1009 qemu_log(" ---- 0x%" PRIx64, pc); 1010 } else if (c == INDEX_op_call) { 1011 /* variable number of arguments */ 1012 nb_oargs = op->callo; 1013 nb_iargs = op->calli; 1014 nb_cargs = def->nb_cargs; 1015 1016 /* function name, flags, out args */ 1017 qemu_log(" %s %s,$0x%" TCG_PRIlx ",$%d", def->name, 1018 tcg_find_helper(s, args[nb_oargs + nb_iargs]), 1019 args[nb_oargs + nb_iargs + 1], nb_oargs); 1020 for (i = 0; i < nb_oargs; i++) { 1021 qemu_log(",%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1022 args[i])); 1023 } 1024 for (i = 0; i < nb_iargs; i++) { 1025 TCGArg arg = args[nb_oargs + i]; 1026 const char *t = "<dummy>"; 1027 if (arg != TCG_CALL_DUMMY_ARG) { 1028 t = tcg_get_arg_str_idx(s, buf, sizeof(buf), arg); 1029 } 1030 qemu_log(",%s", t); 1031 } 1032 } else { 1033 qemu_log(" %s ", def->name); 1034 1035 nb_oargs = def->nb_oargs; 1036 nb_iargs = def->nb_iargs; 1037 nb_cargs = def->nb_cargs; 1038 1039 k = 0; 1040 for (i = 0; i < nb_oargs; i++) { 1041 if (k != 0) { 1042 qemu_log(","); 1043 } 1044 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1045 args[k++])); 1046 } 1047 for (i = 0; i < nb_iargs; i++) { 1048 if (k != 0) { 1049 qemu_log(","); 1050 } 1051 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), 1052 args[k++])); 1053 } 1054 switch (c) { 1055 case INDEX_op_brcond_i32: 1056 case INDEX_op_setcond_i32: 1057 case INDEX_op_movcond_i32: 1058 case INDEX_op_brcond2_i32: 1059 case INDEX_op_setcond2_i32: 1060 case INDEX_op_brcond_i64: 1061 case INDEX_op_setcond_i64: 1062 case INDEX_op_movcond_i64: 1063 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) { 1064 qemu_log(",%s", cond_name[args[k++]]); 1065 } else { 1066 qemu_log(",$0x%" TCG_PRIlx, args[k++]); 1067 } 1068 i = 1; 1069 break; 1070 case INDEX_op_qemu_ld_i32: 1071 case INDEX_op_qemu_st_i32: 1072 case INDEX_op_qemu_ld_i64: 1073 case INDEX_op_qemu_st_i64: 1074 { 1075 TCGMemOpIdx oi = args[k++]; 1076 TCGMemOp op = get_memop(oi); 1077 unsigned ix = get_mmuidx(oi); 1078 1079 if (op < ARRAY_SIZE(ldst_name) && ldst_name[op]) { 1080 qemu_log(",%s,%u", ldst_name[op], ix); 1081 } else { 1082 qemu_log(",$0x%x,%u", op, ix); 1083 } 1084 i = 1; 1085 } 1086 break; 1087 default: 1088 i = 0; 1089 break; 1090 } 1091 switch (c) { 1092 case INDEX_op_set_label: 1093 case INDEX_op_br: 1094 case INDEX_op_brcond_i32: 1095 case INDEX_op_brcond_i64: 1096 case INDEX_op_brcond2_i32: 1097 qemu_log("%s$L%d", k ? "," : "", arg_label(args[k])->id); 1098 i++, k++; 1099 break; 1100 default: 1101 break; 1102 } 1103 for (; i < nb_cargs; i++, k++) { 1104 qemu_log("%s$0x%" TCG_PRIlx, k ? "," : "", args[k]); 1105 } 1106 } 1107 qemu_log("\n"); 1108 } 1109 } 1110 1111 /* we give more priority to constraints with less registers */ 1112 static int get_constraint_priority(const TCGOpDef *def, int k) 1113 { 1114 const TCGArgConstraint *arg_ct; 1115 1116 int i, n; 1117 arg_ct = &def->args_ct[k]; 1118 if (arg_ct->ct & TCG_CT_ALIAS) { 1119 /* an alias is equivalent to a single register */ 1120 n = 1; 1121 } else { 1122 if (!(arg_ct->ct & TCG_CT_REG)) 1123 return 0; 1124 n = 0; 1125 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 1126 if (tcg_regset_test_reg(arg_ct->u.regs, i)) 1127 n++; 1128 } 1129 } 1130 return TCG_TARGET_NB_REGS - n + 1; 1131 } 1132 1133 /* sort from highest priority to lowest */ 1134 static void sort_constraints(TCGOpDef *def, int start, int n) 1135 { 1136 int i, j, p1, p2, tmp; 1137 1138 for(i = 0; i < n; i++) 1139 def->sorted_args[start + i] = start + i; 1140 if (n <= 1) 1141 return; 1142 for(i = 0; i < n - 1; i++) { 1143 for(j = i + 1; j < n; j++) { 1144 p1 = get_constraint_priority(def, def->sorted_args[start + i]); 1145 p2 = get_constraint_priority(def, def->sorted_args[start + j]); 1146 if (p1 < p2) { 1147 tmp = def->sorted_args[start + i]; 1148 def->sorted_args[start + i] = def->sorted_args[start + j]; 1149 def->sorted_args[start + j] = tmp; 1150 } 1151 } 1152 } 1153 } 1154 1155 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs) 1156 { 1157 TCGOpcode op; 1158 TCGOpDef *def; 1159 const char *ct_str; 1160 int i, nb_args; 1161 1162 for(;;) { 1163 if (tdefs->op == (TCGOpcode)-1) 1164 break; 1165 op = tdefs->op; 1166 assert((unsigned)op < NB_OPS); 1167 def = &tcg_op_defs[op]; 1168 #if defined(CONFIG_DEBUG_TCG) 1169 /* Duplicate entry in op definitions? */ 1170 assert(!def->used); 1171 def->used = 1; 1172 #endif 1173 nb_args = def->nb_iargs + def->nb_oargs; 1174 for(i = 0; i < nb_args; i++) { 1175 ct_str = tdefs->args_ct_str[i]; 1176 /* Incomplete TCGTargetOpDef entry? */ 1177 assert(ct_str != NULL); 1178 tcg_regset_clear(def->args_ct[i].u.regs); 1179 def->args_ct[i].ct = 0; 1180 if (ct_str[0] >= '0' && ct_str[0] <= '9') { 1181 int oarg; 1182 oarg = ct_str[0] - '0'; 1183 assert(oarg < def->nb_oargs); 1184 assert(def->args_ct[oarg].ct & TCG_CT_REG); 1185 /* TCG_CT_ALIAS is for the output arguments. The input 1186 argument is tagged with TCG_CT_IALIAS. */ 1187 def->args_ct[i] = def->args_ct[oarg]; 1188 def->args_ct[oarg].ct = TCG_CT_ALIAS; 1189 def->args_ct[oarg].alias_index = i; 1190 def->args_ct[i].ct |= TCG_CT_IALIAS; 1191 def->args_ct[i].alias_index = oarg; 1192 } else { 1193 for(;;) { 1194 if (*ct_str == '\0') 1195 break; 1196 switch(*ct_str) { 1197 case 'i': 1198 def->args_ct[i].ct |= TCG_CT_CONST; 1199 ct_str++; 1200 break; 1201 default: 1202 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) { 1203 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n", 1204 ct_str, i, def->name); 1205 exit(1); 1206 } 1207 } 1208 } 1209 } 1210 } 1211 1212 /* TCGTargetOpDef entry with too much information? */ 1213 assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL); 1214 1215 /* sort the constraints (XXX: this is just an heuristic) */ 1216 sort_constraints(def, 0, def->nb_oargs); 1217 sort_constraints(def, def->nb_oargs, def->nb_iargs); 1218 1219 #if 0 1220 { 1221 int i; 1222 1223 printf("%s: sorted=", def->name); 1224 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++) 1225 printf(" %d", def->sorted_args[i]); 1226 printf("\n"); 1227 } 1228 #endif 1229 tdefs++; 1230 } 1231 1232 #if defined(CONFIG_DEBUG_TCG) 1233 i = 0; 1234 for (op = 0; op < ARRAY_SIZE(tcg_op_defs); op++) { 1235 const TCGOpDef *def = &tcg_op_defs[op]; 1236 if (def->flags & TCG_OPF_NOT_PRESENT) { 1237 /* Wrong entry in op definitions? */ 1238 if (def->used) { 1239 fprintf(stderr, "Invalid op definition for %s\n", def->name); 1240 i = 1; 1241 } 1242 } else { 1243 /* Missing entry in op definitions? */ 1244 if (!def->used) { 1245 fprintf(stderr, "Missing op definition for %s\n", def->name); 1246 i = 1; 1247 } 1248 } 1249 } 1250 if (i == 1) { 1251 tcg_abort(); 1252 } 1253 #endif 1254 } 1255 1256 void tcg_op_remove(TCGContext *s, TCGOp *op) 1257 { 1258 int next = op->next; 1259 int prev = op->prev; 1260 1261 if (next >= 0) { 1262 s->gen_op_buf[next].prev = prev; 1263 } else { 1264 s->gen_last_op_idx = prev; 1265 } 1266 if (prev >= 0) { 1267 s->gen_op_buf[prev].next = next; 1268 } else { 1269 s->gen_first_op_idx = next; 1270 } 1271 1272 memset(op, -1, sizeof(*op)); 1273 1274 #ifdef CONFIG_PROFILER 1275 s->del_op_count++; 1276 #endif 1277 } 1278 1279 #ifdef USE_LIVENESS_ANALYSIS 1280 /* liveness analysis: end of function: all temps are dead, and globals 1281 should be in memory. */ 1282 static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps, 1283 uint8_t *mem_temps) 1284 { 1285 memset(dead_temps, 1, s->nb_temps); 1286 memset(mem_temps, 1, s->nb_globals); 1287 memset(mem_temps + s->nb_globals, 0, s->nb_temps - s->nb_globals); 1288 } 1289 1290 /* liveness analysis: end of basic block: all temps are dead, globals 1291 and local temps should be in memory. */ 1292 static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps, 1293 uint8_t *mem_temps) 1294 { 1295 int i; 1296 1297 memset(dead_temps, 1, s->nb_temps); 1298 memset(mem_temps, 1, s->nb_globals); 1299 for(i = s->nb_globals; i < s->nb_temps; i++) { 1300 mem_temps[i] = s->temps[i].temp_local; 1301 } 1302 } 1303 1304 /* Liveness analysis : update the opc_dead_args array to tell if a 1305 given input arguments is dead. Instructions updating dead 1306 temporaries are removed. */ 1307 static void tcg_liveness_analysis(TCGContext *s) 1308 { 1309 uint8_t *dead_temps, *mem_temps; 1310 int oi, oi_prev, nb_ops; 1311 1312 nb_ops = s->gen_next_op_idx; 1313 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); 1314 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); 1315 1316 dead_temps = tcg_malloc(s->nb_temps); 1317 mem_temps = tcg_malloc(s->nb_temps); 1318 tcg_la_func_end(s, dead_temps, mem_temps); 1319 1320 for (oi = s->gen_last_op_idx; oi >= 0; oi = oi_prev) { 1321 int i, nb_iargs, nb_oargs; 1322 TCGOpcode opc_new, opc_new2; 1323 bool have_opc_new2; 1324 uint16_t dead_args; 1325 uint8_t sync_args; 1326 TCGArg arg; 1327 1328 TCGOp * const op = &s->gen_op_buf[oi]; 1329 TCGArg * const args = &s->gen_opparam_buf[op->args]; 1330 TCGOpcode opc = op->opc; 1331 const TCGOpDef *def = &tcg_op_defs[opc]; 1332 1333 oi_prev = op->prev; 1334 1335 switch (opc) { 1336 case INDEX_op_call: 1337 { 1338 int call_flags; 1339 1340 nb_oargs = op->callo; 1341 nb_iargs = op->calli; 1342 call_flags = args[nb_oargs + nb_iargs + 1]; 1343 1344 /* pure functions can be removed if their result is unused */ 1345 if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) { 1346 for (i = 0; i < nb_oargs; i++) { 1347 arg = args[i]; 1348 if (!dead_temps[arg] || mem_temps[arg]) { 1349 goto do_not_remove_call; 1350 } 1351 } 1352 goto do_remove; 1353 } else { 1354 do_not_remove_call: 1355 1356 /* output args are dead */ 1357 dead_args = 0; 1358 sync_args = 0; 1359 for (i = 0; i < nb_oargs; i++) { 1360 arg = args[i]; 1361 if (dead_temps[arg]) { 1362 dead_args |= (1 << i); 1363 } 1364 if (mem_temps[arg]) { 1365 sync_args |= (1 << i); 1366 } 1367 dead_temps[arg] = 1; 1368 mem_temps[arg] = 0; 1369 } 1370 1371 if (!(call_flags & TCG_CALL_NO_READ_GLOBALS)) { 1372 /* globals should be synced to memory */ 1373 memset(mem_temps, 1, s->nb_globals); 1374 } 1375 if (!(call_flags & (TCG_CALL_NO_WRITE_GLOBALS | 1376 TCG_CALL_NO_READ_GLOBALS))) { 1377 /* globals should go back to memory */ 1378 memset(dead_temps, 1, s->nb_globals); 1379 } 1380 1381 /* input args are live */ 1382 for (i = nb_oargs; i < nb_iargs + nb_oargs; i++) { 1383 arg = args[i]; 1384 if (arg != TCG_CALL_DUMMY_ARG) { 1385 if (dead_temps[arg]) { 1386 dead_args |= (1 << i); 1387 } 1388 dead_temps[arg] = 0; 1389 } 1390 } 1391 s->op_dead_args[oi] = dead_args; 1392 s->op_sync_args[oi] = sync_args; 1393 } 1394 } 1395 break; 1396 case INDEX_op_debug_insn_start: 1397 break; 1398 case INDEX_op_discard: 1399 /* mark the temporary as dead */ 1400 dead_temps[args[0]] = 1; 1401 mem_temps[args[0]] = 0; 1402 break; 1403 1404 case INDEX_op_add2_i32: 1405 opc_new = INDEX_op_add_i32; 1406 goto do_addsub2; 1407 case INDEX_op_sub2_i32: 1408 opc_new = INDEX_op_sub_i32; 1409 goto do_addsub2; 1410 case INDEX_op_add2_i64: 1411 opc_new = INDEX_op_add_i64; 1412 goto do_addsub2; 1413 case INDEX_op_sub2_i64: 1414 opc_new = INDEX_op_sub_i64; 1415 do_addsub2: 1416 nb_iargs = 4; 1417 nb_oargs = 2; 1418 /* Test if the high part of the operation is dead, but not 1419 the low part. The result can be optimized to a simple 1420 add or sub. This happens often for x86_64 guest when the 1421 cpu mode is set to 32 bit. */ 1422 if (dead_temps[args[1]] && !mem_temps[args[1]]) { 1423 if (dead_temps[args[0]] && !mem_temps[args[0]]) { 1424 goto do_remove; 1425 } 1426 /* Replace the opcode and adjust the args in place, 1427 leaving 3 unused args at the end. */ 1428 op->opc = opc = opc_new; 1429 args[1] = args[2]; 1430 args[2] = args[4]; 1431 /* Fall through and mark the single-word operation live. */ 1432 nb_iargs = 2; 1433 nb_oargs = 1; 1434 } 1435 goto do_not_remove; 1436 1437 case INDEX_op_mulu2_i32: 1438 opc_new = INDEX_op_mul_i32; 1439 opc_new2 = INDEX_op_muluh_i32; 1440 have_opc_new2 = TCG_TARGET_HAS_muluh_i32; 1441 goto do_mul2; 1442 case INDEX_op_muls2_i32: 1443 opc_new = INDEX_op_mul_i32; 1444 opc_new2 = INDEX_op_mulsh_i32; 1445 have_opc_new2 = TCG_TARGET_HAS_mulsh_i32; 1446 goto do_mul2; 1447 case INDEX_op_mulu2_i64: 1448 opc_new = INDEX_op_mul_i64; 1449 opc_new2 = INDEX_op_muluh_i64; 1450 have_opc_new2 = TCG_TARGET_HAS_muluh_i64; 1451 goto do_mul2; 1452 case INDEX_op_muls2_i64: 1453 opc_new = INDEX_op_mul_i64; 1454 opc_new2 = INDEX_op_mulsh_i64; 1455 have_opc_new2 = TCG_TARGET_HAS_mulsh_i64; 1456 goto do_mul2; 1457 do_mul2: 1458 nb_iargs = 2; 1459 nb_oargs = 2; 1460 if (dead_temps[args[1]] && !mem_temps[args[1]]) { 1461 if (dead_temps[args[0]] && !mem_temps[args[0]]) { 1462 /* Both parts of the operation are dead. */ 1463 goto do_remove; 1464 } 1465 /* The high part of the operation is dead; generate the low. */ 1466 op->opc = opc = opc_new; 1467 args[1] = args[2]; 1468 args[2] = args[3]; 1469 } else if (have_opc_new2 && dead_temps[args[0]] 1470 && !mem_temps[args[0]]) { 1471 /* The low part of the operation is dead; generate the high. */ 1472 op->opc = opc = opc_new2; 1473 args[0] = args[1]; 1474 args[1] = args[2]; 1475 args[2] = args[3]; 1476 } else { 1477 goto do_not_remove; 1478 } 1479 /* Mark the single-word operation live. */ 1480 nb_oargs = 1; 1481 goto do_not_remove; 1482 1483 default: 1484 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */ 1485 nb_iargs = def->nb_iargs; 1486 nb_oargs = def->nb_oargs; 1487 1488 /* Test if the operation can be removed because all 1489 its outputs are dead. We assume that nb_oargs == 0 1490 implies side effects */ 1491 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) { 1492 for (i = 0; i < nb_oargs; i++) { 1493 arg = args[i]; 1494 if (!dead_temps[arg] || mem_temps[arg]) { 1495 goto do_not_remove; 1496 } 1497 } 1498 do_remove: 1499 tcg_op_remove(s, op); 1500 } else { 1501 do_not_remove: 1502 /* output args are dead */ 1503 dead_args = 0; 1504 sync_args = 0; 1505 for (i = 0; i < nb_oargs; i++) { 1506 arg = args[i]; 1507 if (dead_temps[arg]) { 1508 dead_args |= (1 << i); 1509 } 1510 if (mem_temps[arg]) { 1511 sync_args |= (1 << i); 1512 } 1513 dead_temps[arg] = 1; 1514 mem_temps[arg] = 0; 1515 } 1516 1517 /* if end of basic block, update */ 1518 if (def->flags & TCG_OPF_BB_END) { 1519 tcg_la_bb_end(s, dead_temps, mem_temps); 1520 } else if (def->flags & TCG_OPF_SIDE_EFFECTS) { 1521 /* globals should be synced to memory */ 1522 memset(mem_temps, 1, s->nb_globals); 1523 } 1524 1525 /* input args are live */ 1526 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 1527 arg = args[i]; 1528 if (dead_temps[arg]) { 1529 dead_args |= (1 << i); 1530 } 1531 dead_temps[arg] = 0; 1532 } 1533 s->op_dead_args[oi] = dead_args; 1534 s->op_sync_args[oi] = sync_args; 1535 } 1536 break; 1537 } 1538 } 1539 } 1540 #else 1541 /* dummy liveness analysis */ 1542 static void tcg_liveness_analysis(TCGContext *s) 1543 { 1544 int nb_ops; 1545 nb_ops = s->gen_opc_ptr - s->gen_opc_buf; 1546 1547 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); 1548 memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t)); 1549 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); 1550 memset(s->op_sync_args, 0, nb_ops * sizeof(uint8_t)); 1551 } 1552 #endif 1553 1554 #ifndef NDEBUG 1555 static void dump_regs(TCGContext *s) 1556 { 1557 TCGTemp *ts; 1558 int i; 1559 char buf[64]; 1560 1561 for(i = 0; i < s->nb_temps; i++) { 1562 ts = &s->temps[i]; 1563 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i)); 1564 switch(ts->val_type) { 1565 case TEMP_VAL_REG: 1566 printf("%s", tcg_target_reg_names[ts->reg]); 1567 break; 1568 case TEMP_VAL_MEM: 1569 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]); 1570 break; 1571 case TEMP_VAL_CONST: 1572 printf("$0x%" TCG_PRIlx, ts->val); 1573 break; 1574 case TEMP_VAL_DEAD: 1575 printf("D"); 1576 break; 1577 default: 1578 printf("???"); 1579 break; 1580 } 1581 printf("\n"); 1582 } 1583 1584 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 1585 if (s->reg_to_temp[i] >= 0) { 1586 printf("%s: %s\n", 1587 tcg_target_reg_names[i], 1588 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i])); 1589 } 1590 } 1591 } 1592 1593 static void check_regs(TCGContext *s) 1594 { 1595 int reg, k; 1596 TCGTemp *ts; 1597 char buf[64]; 1598 1599 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 1600 k = s->reg_to_temp[reg]; 1601 if (k >= 0) { 1602 ts = &s->temps[k]; 1603 if (ts->val_type != TEMP_VAL_REG || 1604 ts->reg != reg) { 1605 printf("Inconsistency for register %s:\n", 1606 tcg_target_reg_names[reg]); 1607 goto fail; 1608 } 1609 } 1610 } 1611 for(k = 0; k < s->nb_temps; k++) { 1612 ts = &s->temps[k]; 1613 if (ts->val_type == TEMP_VAL_REG && 1614 !ts->fixed_reg && 1615 s->reg_to_temp[ts->reg] != k) { 1616 printf("Inconsistency for temp %s:\n", 1617 tcg_get_arg_str_idx(s, buf, sizeof(buf), k)); 1618 fail: 1619 printf("reg state:\n"); 1620 dump_regs(s); 1621 tcg_abort(); 1622 } 1623 } 1624 } 1625 #endif 1626 1627 static void temp_allocate_frame(TCGContext *s, int temp) 1628 { 1629 TCGTemp *ts; 1630 ts = &s->temps[temp]; 1631 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64) 1632 /* Sparc64 stack is accessed with offset of 2047 */ 1633 s->current_frame_offset = (s->current_frame_offset + 1634 (tcg_target_long)sizeof(tcg_target_long) - 1) & 1635 ~(sizeof(tcg_target_long) - 1); 1636 #endif 1637 if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) > 1638 s->frame_end) { 1639 tcg_abort(); 1640 } 1641 ts->mem_offset = s->current_frame_offset; 1642 ts->mem_reg = s->frame_reg; 1643 ts->mem_allocated = 1; 1644 s->current_frame_offset += sizeof(tcg_target_long); 1645 } 1646 1647 /* sync register 'reg' by saving it to the corresponding temporary */ 1648 static inline void tcg_reg_sync(TCGContext *s, int reg) 1649 { 1650 TCGTemp *ts; 1651 int temp; 1652 1653 temp = s->reg_to_temp[reg]; 1654 ts = &s->temps[temp]; 1655 assert(ts->val_type == TEMP_VAL_REG); 1656 if (!ts->mem_coherent && !ts->fixed_reg) { 1657 if (!ts->mem_allocated) { 1658 temp_allocate_frame(s, temp); 1659 } 1660 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 1661 } 1662 ts->mem_coherent = 1; 1663 } 1664 1665 /* free register 'reg' by spilling the corresponding temporary if necessary */ 1666 static void tcg_reg_free(TCGContext *s, int reg) 1667 { 1668 int temp; 1669 1670 temp = s->reg_to_temp[reg]; 1671 if (temp != -1) { 1672 tcg_reg_sync(s, reg); 1673 s->temps[temp].val_type = TEMP_VAL_MEM; 1674 s->reg_to_temp[reg] = -1; 1675 } 1676 } 1677 1678 /* Allocate a register belonging to reg1 & ~reg2 */ 1679 static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2) 1680 { 1681 int i, reg; 1682 TCGRegSet reg_ct; 1683 1684 tcg_regset_andnot(reg_ct, reg1, reg2); 1685 1686 /* first try free registers */ 1687 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { 1688 reg = tcg_target_reg_alloc_order[i]; 1689 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1) 1690 return reg; 1691 } 1692 1693 /* XXX: do better spill choice */ 1694 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { 1695 reg = tcg_target_reg_alloc_order[i]; 1696 if (tcg_regset_test_reg(reg_ct, reg)) { 1697 tcg_reg_free(s, reg); 1698 return reg; 1699 } 1700 } 1701 1702 tcg_abort(); 1703 } 1704 1705 /* mark a temporary as dead. */ 1706 static inline void temp_dead(TCGContext *s, int temp) 1707 { 1708 TCGTemp *ts; 1709 1710 ts = &s->temps[temp]; 1711 if (!ts->fixed_reg) { 1712 if (ts->val_type == TEMP_VAL_REG) { 1713 s->reg_to_temp[ts->reg] = -1; 1714 } 1715 if (temp < s->nb_globals || ts->temp_local) { 1716 ts->val_type = TEMP_VAL_MEM; 1717 } else { 1718 ts->val_type = TEMP_VAL_DEAD; 1719 } 1720 } 1721 } 1722 1723 /* sync a temporary to memory. 'allocated_regs' is used in case a 1724 temporary registers needs to be allocated to store a constant. */ 1725 static inline void temp_sync(TCGContext *s, int temp, TCGRegSet allocated_regs) 1726 { 1727 TCGTemp *ts; 1728 1729 ts = &s->temps[temp]; 1730 if (!ts->fixed_reg) { 1731 switch(ts->val_type) { 1732 case TEMP_VAL_CONST: 1733 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 1734 allocated_regs); 1735 ts->val_type = TEMP_VAL_REG; 1736 s->reg_to_temp[ts->reg] = temp; 1737 ts->mem_coherent = 0; 1738 tcg_out_movi(s, ts->type, ts->reg, ts->val); 1739 /* fallthrough*/ 1740 case TEMP_VAL_REG: 1741 tcg_reg_sync(s, ts->reg); 1742 break; 1743 case TEMP_VAL_DEAD: 1744 case TEMP_VAL_MEM: 1745 break; 1746 default: 1747 tcg_abort(); 1748 } 1749 } 1750 } 1751 1752 /* save a temporary to memory. 'allocated_regs' is used in case a 1753 temporary registers needs to be allocated to store a constant. */ 1754 static inline void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs) 1755 { 1756 #ifdef USE_LIVENESS_ANALYSIS 1757 /* The liveness analysis already ensures that globals are back 1758 in memory. Keep an assert for safety. */ 1759 assert(s->temps[temp].val_type == TEMP_VAL_MEM || s->temps[temp].fixed_reg); 1760 #else 1761 temp_sync(s, temp, allocated_regs); 1762 temp_dead(s, temp); 1763 #endif 1764 } 1765 1766 /* save globals to their canonical location and assume they can be 1767 modified be the following code. 'allocated_regs' is used in case a 1768 temporary registers needs to be allocated to store a constant. */ 1769 static void save_globals(TCGContext *s, TCGRegSet allocated_regs) 1770 { 1771 int i; 1772 1773 for(i = 0; i < s->nb_globals; i++) { 1774 temp_save(s, i, allocated_regs); 1775 } 1776 } 1777 1778 /* sync globals to their canonical location and assume they can be 1779 read by the following code. 'allocated_regs' is used in case a 1780 temporary registers needs to be allocated to store a constant. */ 1781 static void sync_globals(TCGContext *s, TCGRegSet allocated_regs) 1782 { 1783 int i; 1784 1785 for (i = 0; i < s->nb_globals; i++) { 1786 #ifdef USE_LIVENESS_ANALYSIS 1787 assert(s->temps[i].val_type != TEMP_VAL_REG || s->temps[i].fixed_reg || 1788 s->temps[i].mem_coherent); 1789 #else 1790 temp_sync(s, i, allocated_regs); 1791 #endif 1792 } 1793 } 1794 1795 /* at the end of a basic block, we assume all temporaries are dead and 1796 all globals are stored at their canonical location. */ 1797 static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs) 1798 { 1799 TCGTemp *ts; 1800 int i; 1801 1802 for(i = s->nb_globals; i < s->nb_temps; i++) { 1803 ts = &s->temps[i]; 1804 if (ts->temp_local) { 1805 temp_save(s, i, allocated_regs); 1806 } else { 1807 #ifdef USE_LIVENESS_ANALYSIS 1808 /* The liveness analysis already ensures that temps are dead. 1809 Keep an assert for safety. */ 1810 assert(ts->val_type == TEMP_VAL_DEAD); 1811 #else 1812 temp_dead(s, i); 1813 #endif 1814 } 1815 } 1816 1817 save_globals(s, allocated_regs); 1818 } 1819 1820 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1) 1821 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1) 1822 1823 static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args, 1824 uint16_t dead_args, uint8_t sync_args) 1825 { 1826 TCGTemp *ots; 1827 tcg_target_ulong val; 1828 1829 ots = &s->temps[args[0]]; 1830 val = args[1]; 1831 1832 if (ots->fixed_reg) { 1833 /* for fixed registers, we do not do any constant 1834 propagation */ 1835 tcg_out_movi(s, ots->type, ots->reg, val); 1836 } else { 1837 /* The movi is not explicitly generated here */ 1838 if (ots->val_type == TEMP_VAL_REG) 1839 s->reg_to_temp[ots->reg] = -1; 1840 ots->val_type = TEMP_VAL_CONST; 1841 ots->val = val; 1842 } 1843 if (NEED_SYNC_ARG(0)) { 1844 temp_sync(s, args[0], s->reserved_regs); 1845 } 1846 if (IS_DEAD_ARG(0)) { 1847 temp_dead(s, args[0]); 1848 } 1849 } 1850 1851 static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def, 1852 const TCGArg *args, uint16_t dead_args, 1853 uint8_t sync_args) 1854 { 1855 TCGRegSet allocated_regs; 1856 TCGTemp *ts, *ots; 1857 TCGType otype, itype; 1858 1859 tcg_regset_set(allocated_regs, s->reserved_regs); 1860 ots = &s->temps[args[0]]; 1861 ts = &s->temps[args[1]]; 1862 1863 /* Note that otype != itype for no-op truncation. */ 1864 otype = ots->type; 1865 itype = ts->type; 1866 1867 /* If the source value is not in a register, and we're going to be 1868 forced to have it in a register in order to perform the copy, 1869 then copy the SOURCE value into its own register first. That way 1870 we don't have to reload SOURCE the next time it is used. */ 1871 if (((NEED_SYNC_ARG(0) || ots->fixed_reg) && ts->val_type != TEMP_VAL_REG) 1872 || ts->val_type == TEMP_VAL_MEM) { 1873 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[itype], 1874 allocated_regs); 1875 if (ts->val_type == TEMP_VAL_MEM) { 1876 tcg_out_ld(s, itype, ts->reg, ts->mem_reg, ts->mem_offset); 1877 ts->mem_coherent = 1; 1878 } else if (ts->val_type == TEMP_VAL_CONST) { 1879 tcg_out_movi(s, itype, ts->reg, ts->val); 1880 } 1881 s->reg_to_temp[ts->reg] = args[1]; 1882 ts->val_type = TEMP_VAL_REG; 1883 } 1884 1885 if (IS_DEAD_ARG(0) && !ots->fixed_reg) { 1886 /* mov to a non-saved dead register makes no sense (even with 1887 liveness analysis disabled). */ 1888 assert(NEED_SYNC_ARG(0)); 1889 /* The code above should have moved the temp to a register. */ 1890 assert(ts->val_type == TEMP_VAL_REG); 1891 if (!ots->mem_allocated) { 1892 temp_allocate_frame(s, args[0]); 1893 } 1894 tcg_out_st(s, otype, ts->reg, ots->mem_reg, ots->mem_offset); 1895 if (IS_DEAD_ARG(1)) { 1896 temp_dead(s, args[1]); 1897 } 1898 temp_dead(s, args[0]); 1899 } else if (ts->val_type == TEMP_VAL_CONST) { 1900 /* propagate constant */ 1901 if (ots->val_type == TEMP_VAL_REG) { 1902 s->reg_to_temp[ots->reg] = -1; 1903 } 1904 ots->val_type = TEMP_VAL_CONST; 1905 ots->val = ts->val; 1906 } else { 1907 /* The code in the first if block should have moved the 1908 temp to a register. */ 1909 assert(ts->val_type == TEMP_VAL_REG); 1910 if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) { 1911 /* the mov can be suppressed */ 1912 if (ots->val_type == TEMP_VAL_REG) { 1913 s->reg_to_temp[ots->reg] = -1; 1914 } 1915 ots->reg = ts->reg; 1916 temp_dead(s, args[1]); 1917 } else { 1918 if (ots->val_type != TEMP_VAL_REG) { 1919 /* When allocating a new register, make sure to not spill the 1920 input one. */ 1921 tcg_regset_set_reg(allocated_regs, ts->reg); 1922 ots->reg = tcg_reg_alloc(s, tcg_target_available_regs[otype], 1923 allocated_regs); 1924 } 1925 tcg_out_mov(s, otype, ots->reg, ts->reg); 1926 } 1927 ots->val_type = TEMP_VAL_REG; 1928 ots->mem_coherent = 0; 1929 s->reg_to_temp[ots->reg] = args[0]; 1930 if (NEED_SYNC_ARG(0)) { 1931 tcg_reg_sync(s, ots->reg); 1932 } 1933 } 1934 } 1935 1936 static void tcg_reg_alloc_op(TCGContext *s, 1937 const TCGOpDef *def, TCGOpcode opc, 1938 const TCGArg *args, uint16_t dead_args, 1939 uint8_t sync_args) 1940 { 1941 TCGRegSet allocated_regs; 1942 int i, k, nb_iargs, nb_oargs, reg; 1943 TCGArg arg; 1944 const TCGArgConstraint *arg_ct; 1945 TCGTemp *ts; 1946 TCGArg new_args[TCG_MAX_OP_ARGS]; 1947 int const_args[TCG_MAX_OP_ARGS]; 1948 1949 nb_oargs = def->nb_oargs; 1950 nb_iargs = def->nb_iargs; 1951 1952 /* copy constants */ 1953 memcpy(new_args + nb_oargs + nb_iargs, 1954 args + nb_oargs + nb_iargs, 1955 sizeof(TCGArg) * def->nb_cargs); 1956 1957 /* satisfy input constraints */ 1958 tcg_regset_set(allocated_regs, s->reserved_regs); 1959 for(k = 0; k < nb_iargs; k++) { 1960 i = def->sorted_args[nb_oargs + k]; 1961 arg = args[i]; 1962 arg_ct = &def->args_ct[i]; 1963 ts = &s->temps[arg]; 1964 if (ts->val_type == TEMP_VAL_MEM) { 1965 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 1966 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 1967 ts->val_type = TEMP_VAL_REG; 1968 ts->reg = reg; 1969 ts->mem_coherent = 1; 1970 s->reg_to_temp[reg] = arg; 1971 } else if (ts->val_type == TEMP_VAL_CONST) { 1972 if (tcg_target_const_match(ts->val, ts->type, arg_ct)) { 1973 /* constant is OK for instruction */ 1974 const_args[i] = 1; 1975 new_args[i] = ts->val; 1976 goto iarg_end; 1977 } else { 1978 /* need to move to a register */ 1979 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 1980 tcg_out_movi(s, ts->type, reg, ts->val); 1981 ts->val_type = TEMP_VAL_REG; 1982 ts->reg = reg; 1983 ts->mem_coherent = 0; 1984 s->reg_to_temp[reg] = arg; 1985 } 1986 } 1987 assert(ts->val_type == TEMP_VAL_REG); 1988 if (arg_ct->ct & TCG_CT_IALIAS) { 1989 if (ts->fixed_reg) { 1990 /* if fixed register, we must allocate a new register 1991 if the alias is not the same register */ 1992 if (arg != args[arg_ct->alias_index]) 1993 goto allocate_in_reg; 1994 } else { 1995 /* if the input is aliased to an output and if it is 1996 not dead after the instruction, we must allocate 1997 a new register and move it */ 1998 if (!IS_DEAD_ARG(i)) { 1999 goto allocate_in_reg; 2000 } 2001 } 2002 } 2003 reg = ts->reg; 2004 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) { 2005 /* nothing to do : the constraint is satisfied */ 2006 } else { 2007 allocate_in_reg: 2008 /* allocate a new register matching the constraint 2009 and move the temporary register into it */ 2010 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2011 tcg_out_mov(s, ts->type, reg, ts->reg); 2012 } 2013 new_args[i] = reg; 2014 const_args[i] = 0; 2015 tcg_regset_set_reg(allocated_regs, reg); 2016 iarg_end: ; 2017 } 2018 2019 /* mark dead temporaries and free the associated registers */ 2020 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { 2021 if (IS_DEAD_ARG(i)) { 2022 temp_dead(s, args[i]); 2023 } 2024 } 2025 2026 if (def->flags & TCG_OPF_BB_END) { 2027 tcg_reg_alloc_bb_end(s, allocated_regs); 2028 } else { 2029 if (def->flags & TCG_OPF_CALL_CLOBBER) { 2030 /* XXX: permit generic clobber register list ? */ 2031 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 2032 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { 2033 tcg_reg_free(s, reg); 2034 } 2035 } 2036 } 2037 if (def->flags & TCG_OPF_SIDE_EFFECTS) { 2038 /* sync globals if the op has side effects and might trigger 2039 an exception. */ 2040 sync_globals(s, allocated_regs); 2041 } 2042 2043 /* satisfy the output constraints */ 2044 tcg_regset_set(allocated_regs, s->reserved_regs); 2045 for(k = 0; k < nb_oargs; k++) { 2046 i = def->sorted_args[k]; 2047 arg = args[i]; 2048 arg_ct = &def->args_ct[i]; 2049 ts = &s->temps[arg]; 2050 if (arg_ct->ct & TCG_CT_ALIAS) { 2051 reg = new_args[arg_ct->alias_index]; 2052 } else { 2053 /* if fixed register, we try to use it */ 2054 reg = ts->reg; 2055 if (ts->fixed_reg && 2056 tcg_regset_test_reg(arg_ct->u.regs, reg)) { 2057 goto oarg_end; 2058 } 2059 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2060 } 2061 tcg_regset_set_reg(allocated_regs, reg); 2062 /* if a fixed register is used, then a move will be done afterwards */ 2063 if (!ts->fixed_reg) { 2064 if (ts->val_type == TEMP_VAL_REG) { 2065 s->reg_to_temp[ts->reg] = -1; 2066 } 2067 ts->val_type = TEMP_VAL_REG; 2068 ts->reg = reg; 2069 /* temp value is modified, so the value kept in memory is 2070 potentially not the same */ 2071 ts->mem_coherent = 0; 2072 s->reg_to_temp[reg] = arg; 2073 } 2074 oarg_end: 2075 new_args[i] = reg; 2076 } 2077 } 2078 2079 /* emit instruction */ 2080 tcg_out_op(s, opc, new_args, const_args); 2081 2082 /* move the outputs in the correct register if needed */ 2083 for(i = 0; i < nb_oargs; i++) { 2084 ts = &s->temps[args[i]]; 2085 reg = new_args[i]; 2086 if (ts->fixed_reg && ts->reg != reg) { 2087 tcg_out_mov(s, ts->type, ts->reg, reg); 2088 } 2089 if (NEED_SYNC_ARG(i)) { 2090 tcg_reg_sync(s, reg); 2091 } 2092 if (IS_DEAD_ARG(i)) { 2093 temp_dead(s, args[i]); 2094 } 2095 } 2096 } 2097 2098 #ifdef TCG_TARGET_STACK_GROWSUP 2099 #define STACK_DIR(x) (-(x)) 2100 #else 2101 #define STACK_DIR(x) (x) 2102 #endif 2103 2104 static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs, 2105 const TCGArg * const args, uint16_t dead_args, 2106 uint8_t sync_args) 2107 { 2108 int flags, nb_regs, i, reg; 2109 TCGArg arg; 2110 TCGTemp *ts; 2111 intptr_t stack_offset; 2112 size_t call_stack_size; 2113 tcg_insn_unit *func_addr; 2114 int allocate_args; 2115 TCGRegSet allocated_regs; 2116 2117 func_addr = (tcg_insn_unit *)(intptr_t)args[nb_oargs + nb_iargs]; 2118 flags = args[nb_oargs + nb_iargs + 1]; 2119 2120 nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs); 2121 if (nb_regs > nb_iargs) { 2122 nb_regs = nb_iargs; 2123 } 2124 2125 /* assign stack slots first */ 2126 call_stack_size = (nb_iargs - nb_regs) * sizeof(tcg_target_long); 2127 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) & 2128 ~(TCG_TARGET_STACK_ALIGN - 1); 2129 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE); 2130 if (allocate_args) { 2131 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed, 2132 preallocate call stack */ 2133 tcg_abort(); 2134 } 2135 2136 stack_offset = TCG_TARGET_CALL_STACK_OFFSET; 2137 for(i = nb_regs; i < nb_iargs; i++) { 2138 arg = args[nb_oargs + i]; 2139 #ifdef TCG_TARGET_STACK_GROWSUP 2140 stack_offset -= sizeof(tcg_target_long); 2141 #endif 2142 if (arg != TCG_CALL_DUMMY_ARG) { 2143 ts = &s->temps[arg]; 2144 if (ts->val_type == TEMP_VAL_REG) { 2145 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset); 2146 } else if (ts->val_type == TEMP_VAL_MEM) { 2147 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 2148 s->reserved_regs); 2149 /* XXX: not correct if reading values from the stack */ 2150 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2151 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); 2152 } else if (ts->val_type == TEMP_VAL_CONST) { 2153 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 2154 s->reserved_regs); 2155 /* XXX: sign extend may be needed on some targets */ 2156 tcg_out_movi(s, ts->type, reg, ts->val); 2157 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); 2158 } else { 2159 tcg_abort(); 2160 } 2161 } 2162 #ifndef TCG_TARGET_STACK_GROWSUP 2163 stack_offset += sizeof(tcg_target_long); 2164 #endif 2165 } 2166 2167 /* assign input registers */ 2168 tcg_regset_set(allocated_regs, s->reserved_regs); 2169 for(i = 0; i < nb_regs; i++) { 2170 arg = args[nb_oargs + i]; 2171 if (arg != TCG_CALL_DUMMY_ARG) { 2172 ts = &s->temps[arg]; 2173 reg = tcg_target_call_iarg_regs[i]; 2174 tcg_reg_free(s, reg); 2175 if (ts->val_type == TEMP_VAL_REG) { 2176 if (ts->reg != reg) { 2177 tcg_out_mov(s, ts->type, reg, ts->reg); 2178 } 2179 } else if (ts->val_type == TEMP_VAL_MEM) { 2180 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); 2181 } else if (ts->val_type == TEMP_VAL_CONST) { 2182 /* XXX: sign extend ? */ 2183 tcg_out_movi(s, ts->type, reg, ts->val); 2184 } else { 2185 tcg_abort(); 2186 } 2187 tcg_regset_set_reg(allocated_regs, reg); 2188 } 2189 } 2190 2191 /* mark dead temporaries and free the associated registers */ 2192 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) { 2193 if (IS_DEAD_ARG(i)) { 2194 temp_dead(s, args[i]); 2195 } 2196 } 2197 2198 /* clobber call registers */ 2199 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 2200 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { 2201 tcg_reg_free(s, reg); 2202 } 2203 } 2204 2205 /* Save globals if they might be written by the helper, sync them if 2206 they might be read. */ 2207 if (flags & TCG_CALL_NO_READ_GLOBALS) { 2208 /* Nothing to do */ 2209 } else if (flags & TCG_CALL_NO_WRITE_GLOBALS) { 2210 sync_globals(s, allocated_regs); 2211 } else { 2212 save_globals(s, allocated_regs); 2213 } 2214 2215 tcg_out_call(s, func_addr); 2216 2217 /* assign output registers and emit moves if needed */ 2218 for(i = 0; i < nb_oargs; i++) { 2219 arg = args[i]; 2220 ts = &s->temps[arg]; 2221 reg = tcg_target_call_oarg_regs[i]; 2222 assert(s->reg_to_temp[reg] == -1); 2223 2224 if (ts->fixed_reg) { 2225 if (ts->reg != reg) { 2226 tcg_out_mov(s, ts->type, ts->reg, reg); 2227 } 2228 } else { 2229 if (ts->val_type == TEMP_VAL_REG) { 2230 s->reg_to_temp[ts->reg] = -1; 2231 } 2232 ts->val_type = TEMP_VAL_REG; 2233 ts->reg = reg; 2234 ts->mem_coherent = 0; 2235 s->reg_to_temp[reg] = arg; 2236 if (NEED_SYNC_ARG(i)) { 2237 tcg_reg_sync(s, reg); 2238 } 2239 if (IS_DEAD_ARG(i)) { 2240 temp_dead(s, args[i]); 2241 } 2242 } 2243 } 2244 } 2245 2246 #ifdef CONFIG_PROFILER 2247 2248 static int64_t tcg_table_op_count[NB_OPS]; 2249 2250 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf) 2251 { 2252 int i; 2253 2254 for (i = 0; i < NB_OPS; i++) { 2255 cpu_fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, 2256 tcg_table_op_count[i]); 2257 } 2258 } 2259 #else 2260 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf) 2261 { 2262 cpu_fprintf(f, "[TCG profiler not compiled]\n"); 2263 } 2264 #endif 2265 2266 2267 static inline int tcg_gen_code_common(TCGContext *s, 2268 tcg_insn_unit *gen_code_buf, 2269 long search_pc) 2270 { 2271 int oi, oi_next; 2272 2273 #ifdef DEBUG_DISAS 2274 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { 2275 qemu_log("OP:\n"); 2276 tcg_dump_ops(s); 2277 qemu_log("\n"); 2278 } 2279 #endif 2280 2281 #ifdef CONFIG_PROFILER 2282 s->opt_time -= profile_getclock(); 2283 #endif 2284 2285 #ifdef USE_TCG_OPTIMIZATIONS 2286 tcg_optimize(s); 2287 #endif 2288 2289 #ifdef CONFIG_PROFILER 2290 s->opt_time += profile_getclock(); 2291 s->la_time -= profile_getclock(); 2292 #endif 2293 2294 tcg_liveness_analysis(s); 2295 2296 #ifdef CONFIG_PROFILER 2297 s->la_time += profile_getclock(); 2298 #endif 2299 2300 #ifdef DEBUG_DISAS 2301 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) { 2302 qemu_log("OP after optimization and liveness analysis:\n"); 2303 tcg_dump_ops(s); 2304 qemu_log("\n"); 2305 } 2306 #endif 2307 2308 tcg_reg_alloc_start(s); 2309 2310 s->code_buf = gen_code_buf; 2311 s->code_ptr = gen_code_buf; 2312 2313 tcg_out_tb_init(s); 2314 2315 for (oi = s->gen_first_op_idx; oi >= 0; oi = oi_next) { 2316 TCGOp * const op = &s->gen_op_buf[oi]; 2317 TCGArg * const args = &s->gen_opparam_buf[op->args]; 2318 TCGOpcode opc = op->opc; 2319 const TCGOpDef *def = &tcg_op_defs[opc]; 2320 uint16_t dead_args = s->op_dead_args[oi]; 2321 uint8_t sync_args = s->op_sync_args[oi]; 2322 2323 oi_next = op->next; 2324 #ifdef CONFIG_PROFILER 2325 tcg_table_op_count[opc]++; 2326 #endif 2327 2328 switch (opc) { 2329 case INDEX_op_mov_i32: 2330 case INDEX_op_mov_i64: 2331 tcg_reg_alloc_mov(s, def, args, dead_args, sync_args); 2332 break; 2333 case INDEX_op_movi_i32: 2334 case INDEX_op_movi_i64: 2335 tcg_reg_alloc_movi(s, args, dead_args, sync_args); 2336 break; 2337 case INDEX_op_debug_insn_start: 2338 break; 2339 case INDEX_op_discard: 2340 temp_dead(s, args[0]); 2341 break; 2342 case INDEX_op_set_label: 2343 tcg_reg_alloc_bb_end(s, s->reserved_regs); 2344 tcg_out_label(s, arg_label(args[0]), s->code_ptr); 2345 break; 2346 case INDEX_op_call: 2347 tcg_reg_alloc_call(s, op->callo, op->calli, args, 2348 dead_args, sync_args); 2349 break; 2350 default: 2351 /* Sanity check that we've not introduced any unhandled opcodes. */ 2352 if (def->flags & TCG_OPF_NOT_PRESENT) { 2353 tcg_abort(); 2354 } 2355 /* Note: in order to speed up the code, it would be much 2356 faster to have specialized register allocator functions for 2357 some common argument patterns */ 2358 tcg_reg_alloc_op(s, def, opc, args, dead_args, sync_args); 2359 break; 2360 } 2361 if (search_pc >= 0 && search_pc < tcg_current_code_size(s)) { 2362 return oi; 2363 } 2364 #ifndef NDEBUG 2365 check_regs(s); 2366 #endif 2367 } 2368 2369 /* Generate TB finalization at the end of block */ 2370 tcg_out_tb_finalize(s); 2371 return -1; 2372 } 2373 2374 int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf) 2375 { 2376 #ifdef CONFIG_PROFILER 2377 { 2378 int n; 2379 2380 n = s->gen_last_op_idx + 1; 2381 s->op_count += n; 2382 if (n > s->op_count_max) { 2383 s->op_count_max = n; 2384 } 2385 2386 n = s->nb_temps; 2387 s->temp_count += n; 2388 if (n > s->temp_count_max) { 2389 s->temp_count_max = n; 2390 } 2391 } 2392 #endif 2393 2394 tcg_gen_code_common(s, gen_code_buf, -1); 2395 2396 /* flush instruction cache */ 2397 flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr); 2398 2399 return tcg_current_code_size(s); 2400 } 2401 2402 /* Return the index of the micro operation such as the pc after is < 2403 offset bytes from the start of the TB. The contents of gen_code_buf must 2404 not be changed, though writing the same values is ok. 2405 Return -1 if not found. */ 2406 int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf, 2407 long offset) 2408 { 2409 return tcg_gen_code_common(s, gen_code_buf, offset); 2410 } 2411 2412 #ifdef CONFIG_PROFILER 2413 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) 2414 { 2415 TCGContext *s = &tcg_ctx; 2416 int64_t tot; 2417 2418 tot = s->interm_time + s->code_time; 2419 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n", 2420 tot, tot / 2.4e9); 2421 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n", 2422 s->tb_count, 2423 s->tb_count1 - s->tb_count, 2424 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0); 2425 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n", 2426 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max); 2427 cpu_fprintf(f, "deleted ops/TB %0.2f\n", 2428 s->tb_count ? 2429 (double)s->del_op_count / s->tb_count : 0); 2430 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n", 2431 s->tb_count ? 2432 (double)s->temp_count / s->tb_count : 0, 2433 s->temp_count_max); 2434 2435 cpu_fprintf(f, "cycles/op %0.1f\n", 2436 s->op_count ? (double)tot / s->op_count : 0); 2437 cpu_fprintf(f, "cycles/in byte %0.1f\n", 2438 s->code_in_len ? (double)tot / s->code_in_len : 0); 2439 cpu_fprintf(f, "cycles/out byte %0.1f\n", 2440 s->code_out_len ? (double)tot / s->code_out_len : 0); 2441 if (tot == 0) 2442 tot = 1; 2443 cpu_fprintf(f, " gen_interm time %0.1f%%\n", 2444 (double)s->interm_time / tot * 100.0); 2445 cpu_fprintf(f, " gen_code time %0.1f%%\n", 2446 (double)s->code_time / tot * 100.0); 2447 cpu_fprintf(f, "optim./code time %0.1f%%\n", 2448 (double)s->opt_time / (s->code_time ? s->code_time : 1) 2449 * 100.0); 2450 cpu_fprintf(f, "liveness/code time %0.1f%%\n", 2451 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0); 2452 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n", 2453 s->restore_count); 2454 cpu_fprintf(f, " avg cycles %0.1f\n", 2455 s->restore_count ? (double)s->restore_time / s->restore_count : 0); 2456 } 2457 #else 2458 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) 2459 { 2460 cpu_fprintf(f, "[TCG profiler not compiled]\n"); 2461 } 2462 #endif 2463 2464 #ifdef ELF_HOST_MACHINE 2465 /* In order to use this feature, the backend needs to do three things: 2466 2467 (1) Define ELF_HOST_MACHINE to indicate both what value to 2468 put into the ELF image and to indicate support for the feature. 2469 2470 (2) Define tcg_register_jit. This should create a buffer containing 2471 the contents of a .debug_frame section that describes the post- 2472 prologue unwind info for the tcg machine. 2473 2474 (3) Call tcg_register_jit_int, with the constructed .debug_frame. 2475 */ 2476 2477 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */ 2478 typedef enum { 2479 JIT_NOACTION = 0, 2480 JIT_REGISTER_FN, 2481 JIT_UNREGISTER_FN 2482 } jit_actions_t; 2483 2484 struct jit_code_entry { 2485 struct jit_code_entry *next_entry; 2486 struct jit_code_entry *prev_entry; 2487 const void *symfile_addr; 2488 uint64_t symfile_size; 2489 }; 2490 2491 struct jit_descriptor { 2492 uint32_t version; 2493 uint32_t action_flag; 2494 struct jit_code_entry *relevant_entry; 2495 struct jit_code_entry *first_entry; 2496 }; 2497 2498 void __jit_debug_register_code(void) __attribute__((noinline)); 2499 void __jit_debug_register_code(void) 2500 { 2501 asm(""); 2502 } 2503 2504 /* Must statically initialize the version, because GDB may check 2505 the version before we can set it. */ 2506 struct jit_descriptor __jit_debug_descriptor = { 1, 0, 0, 0 }; 2507 2508 /* End GDB interface. */ 2509 2510 static int find_string(const char *strtab, const char *str) 2511 { 2512 const char *p = strtab + 1; 2513 2514 while (1) { 2515 if (strcmp(p, str) == 0) { 2516 return p - strtab; 2517 } 2518 p += strlen(p) + 1; 2519 } 2520 } 2521 2522 static void tcg_register_jit_int(void *buf_ptr, size_t buf_size, 2523 const void *debug_frame, 2524 size_t debug_frame_size) 2525 { 2526 struct __attribute__((packed)) DebugInfo { 2527 uint32_t len; 2528 uint16_t version; 2529 uint32_t abbrev; 2530 uint8_t ptr_size; 2531 uint8_t cu_die; 2532 uint16_t cu_lang; 2533 uintptr_t cu_low_pc; 2534 uintptr_t cu_high_pc; 2535 uint8_t fn_die; 2536 char fn_name[16]; 2537 uintptr_t fn_low_pc; 2538 uintptr_t fn_high_pc; 2539 uint8_t cu_eoc; 2540 }; 2541 2542 struct ElfImage { 2543 ElfW(Ehdr) ehdr; 2544 ElfW(Phdr) phdr; 2545 ElfW(Shdr) shdr[7]; 2546 ElfW(Sym) sym[2]; 2547 struct DebugInfo di; 2548 uint8_t da[24]; 2549 char str[80]; 2550 }; 2551 2552 struct ElfImage *img; 2553 2554 static const struct ElfImage img_template = { 2555 .ehdr = { 2556 .e_ident[EI_MAG0] = ELFMAG0, 2557 .e_ident[EI_MAG1] = ELFMAG1, 2558 .e_ident[EI_MAG2] = ELFMAG2, 2559 .e_ident[EI_MAG3] = ELFMAG3, 2560 .e_ident[EI_CLASS] = ELF_CLASS, 2561 .e_ident[EI_DATA] = ELF_DATA, 2562 .e_ident[EI_VERSION] = EV_CURRENT, 2563 .e_type = ET_EXEC, 2564 .e_machine = ELF_HOST_MACHINE, 2565 .e_version = EV_CURRENT, 2566 .e_phoff = offsetof(struct ElfImage, phdr), 2567 .e_shoff = offsetof(struct ElfImage, shdr), 2568 .e_ehsize = sizeof(ElfW(Shdr)), 2569 .e_phentsize = sizeof(ElfW(Phdr)), 2570 .e_phnum = 1, 2571 .e_shentsize = sizeof(ElfW(Shdr)), 2572 .e_shnum = ARRAY_SIZE(img->shdr), 2573 .e_shstrndx = ARRAY_SIZE(img->shdr) - 1, 2574 #ifdef ELF_HOST_FLAGS 2575 .e_flags = ELF_HOST_FLAGS, 2576 #endif 2577 #ifdef ELF_OSABI 2578 .e_ident[EI_OSABI] = ELF_OSABI, 2579 #endif 2580 }, 2581 .phdr = { 2582 .p_type = PT_LOAD, 2583 .p_flags = PF_X, 2584 }, 2585 .shdr = { 2586 [0] = { .sh_type = SHT_NULL }, 2587 /* Trick: The contents of code_gen_buffer are not present in 2588 this fake ELF file; that got allocated elsewhere. Therefore 2589 we mark .text as SHT_NOBITS (similar to .bss) so that readers 2590 will not look for contents. We can record any address. */ 2591 [1] = { /* .text */ 2592 .sh_type = SHT_NOBITS, 2593 .sh_flags = SHF_EXECINSTR | SHF_ALLOC, 2594 }, 2595 [2] = { /* .debug_info */ 2596 .sh_type = SHT_PROGBITS, 2597 .sh_offset = offsetof(struct ElfImage, di), 2598 .sh_size = sizeof(struct DebugInfo), 2599 }, 2600 [3] = { /* .debug_abbrev */ 2601 .sh_type = SHT_PROGBITS, 2602 .sh_offset = offsetof(struct ElfImage, da), 2603 .sh_size = sizeof(img->da), 2604 }, 2605 [4] = { /* .debug_frame */ 2606 .sh_type = SHT_PROGBITS, 2607 .sh_offset = sizeof(struct ElfImage), 2608 }, 2609 [5] = { /* .symtab */ 2610 .sh_type = SHT_SYMTAB, 2611 .sh_offset = offsetof(struct ElfImage, sym), 2612 .sh_size = sizeof(img->sym), 2613 .sh_info = 1, 2614 .sh_link = ARRAY_SIZE(img->shdr) - 1, 2615 .sh_entsize = sizeof(ElfW(Sym)), 2616 }, 2617 [6] = { /* .strtab */ 2618 .sh_type = SHT_STRTAB, 2619 .sh_offset = offsetof(struct ElfImage, str), 2620 .sh_size = sizeof(img->str), 2621 } 2622 }, 2623 .sym = { 2624 [1] = { /* code_gen_buffer */ 2625 .st_info = ELF_ST_INFO(STB_GLOBAL, STT_FUNC), 2626 .st_shndx = 1, 2627 } 2628 }, 2629 .di = { 2630 .len = sizeof(struct DebugInfo) - 4, 2631 .version = 2, 2632 .ptr_size = sizeof(void *), 2633 .cu_die = 1, 2634 .cu_lang = 0x8001, /* DW_LANG_Mips_Assembler */ 2635 .fn_die = 2, 2636 .fn_name = "code_gen_buffer" 2637 }, 2638 .da = { 2639 1, /* abbrev number (the cu) */ 2640 0x11, 1, /* DW_TAG_compile_unit, has children */ 2641 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */ 2642 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ 2643 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ 2644 0, 0, /* end of abbrev */ 2645 2, /* abbrev number (the fn) */ 2646 0x2e, 0, /* DW_TAG_subprogram, no children */ 2647 0x3, 0x8, /* DW_AT_name, DW_FORM_string */ 2648 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ 2649 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ 2650 0, 0, /* end of abbrev */ 2651 0 /* no more abbrev */ 2652 }, 2653 .str = "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0" 2654 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer", 2655 }; 2656 2657 /* We only need a single jit entry; statically allocate it. */ 2658 static struct jit_code_entry one_entry; 2659 2660 uintptr_t buf = (uintptr_t)buf_ptr; 2661 size_t img_size = sizeof(struct ElfImage) + debug_frame_size; 2662 DebugFrameHeader *dfh; 2663 2664 img = g_malloc(img_size); 2665 *img = img_template; 2666 2667 img->phdr.p_vaddr = buf; 2668 img->phdr.p_paddr = buf; 2669 img->phdr.p_memsz = buf_size; 2670 2671 img->shdr[1].sh_name = find_string(img->str, ".text"); 2672 img->shdr[1].sh_addr = buf; 2673 img->shdr[1].sh_size = buf_size; 2674 2675 img->shdr[2].sh_name = find_string(img->str, ".debug_info"); 2676 img->shdr[3].sh_name = find_string(img->str, ".debug_abbrev"); 2677 2678 img->shdr[4].sh_name = find_string(img->str, ".debug_frame"); 2679 img->shdr[4].sh_size = debug_frame_size; 2680 2681 img->shdr[5].sh_name = find_string(img->str, ".symtab"); 2682 img->shdr[6].sh_name = find_string(img->str, ".strtab"); 2683 2684 img->sym[1].st_name = find_string(img->str, "code_gen_buffer"); 2685 img->sym[1].st_value = buf; 2686 img->sym[1].st_size = buf_size; 2687 2688 img->di.cu_low_pc = buf; 2689 img->di.cu_high_pc = buf + buf_size; 2690 img->di.fn_low_pc = buf; 2691 img->di.fn_high_pc = buf + buf_size; 2692 2693 dfh = (DebugFrameHeader *)(img + 1); 2694 memcpy(dfh, debug_frame, debug_frame_size); 2695 dfh->fde.func_start = buf; 2696 dfh->fde.func_len = buf_size; 2697 2698 #ifdef DEBUG_JIT 2699 /* Enable this block to be able to debug the ELF image file creation. 2700 One can use readelf, objdump, or other inspection utilities. */ 2701 { 2702 FILE *f = fopen("/tmp/qemu.jit", "w+b"); 2703 if (f) { 2704 if (fwrite(img, img_size, 1, f) != img_size) { 2705 /* Avoid stupid unused return value warning for fwrite. */ 2706 } 2707 fclose(f); 2708 } 2709 } 2710 #endif 2711 2712 one_entry.symfile_addr = img; 2713 one_entry.symfile_size = img_size; 2714 2715 __jit_debug_descriptor.action_flag = JIT_REGISTER_FN; 2716 __jit_debug_descriptor.relevant_entry = &one_entry; 2717 __jit_debug_descriptor.first_entry = &one_entry; 2718 __jit_debug_register_code(); 2719 } 2720 #else 2721 /* No support for the feature. Provide the entry point expected by exec.c, 2722 and implement the internal function we declared earlier. */ 2723 2724 static void tcg_register_jit_int(void *buf, size_t size, 2725 const void *debug_frame, 2726 size_t debug_frame_size) 2727 { 2728 } 2729 2730 void tcg_register_jit(void *buf, size_t buf_size) 2731 { 2732 } 2733 #endif /* ELF_HOST_MACHINE */ 2734