xref: /openbmc/qemu/tcg/sparc64/tcg-target-has.h (revision 6aba25ebb9eb6e1e86398294694aa0ab1f12076f)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Define target-specific opcode support
4  * Copyright (c) 2008 Fabrice Bellard
5  */
6 
7 #ifndef TCG_TARGET_HAS_H
8 #define TCG_TARGET_HAS_H
9 
10 #if defined(__VIS__) && __VIS__ >= 0x300
11 #define use_vis3_instructions  1
12 #else
13 extern bool use_vis3_instructions;
14 #endif
15 
16 /* optional instructions */
17 #define TCG_TARGET_HAS_div_i32		1
18 #define TCG_TARGET_HAS_rem_i32		0
19 #define TCG_TARGET_HAS_rot_i32          0
20 #define TCG_TARGET_HAS_bswap16_i32      0
21 #define TCG_TARGET_HAS_bswap32_i32      0
22 #define TCG_TARGET_HAS_not_i32          1
23 #define TCG_TARGET_HAS_eqv_i32          0
24 #define TCG_TARGET_HAS_nand_i32         0
25 #define TCG_TARGET_HAS_nor_i32          0
26 #define TCG_TARGET_HAS_clz_i32          0
27 #define TCG_TARGET_HAS_ctz_i32          0
28 #define TCG_TARGET_HAS_ctpop_i32        0
29 #define TCG_TARGET_HAS_extract2_i32     0
30 #define TCG_TARGET_HAS_negsetcond_i32   1
31 #define TCG_TARGET_HAS_add2_i32         1
32 #define TCG_TARGET_HAS_sub2_i32         1
33 #define TCG_TARGET_HAS_mulu2_i32        1
34 #define TCG_TARGET_HAS_muls2_i32        1
35 #define TCG_TARGET_HAS_muluh_i32        0
36 #define TCG_TARGET_HAS_mulsh_i32        0
37 #define TCG_TARGET_HAS_qemu_st8_i32     0
38 
39 #define TCG_TARGET_HAS_extr_i64_i32     0
40 #define TCG_TARGET_HAS_div_i64          1
41 #define TCG_TARGET_HAS_rem_i64          0
42 #define TCG_TARGET_HAS_rot_i64          0
43 #define TCG_TARGET_HAS_bswap16_i64      0
44 #define TCG_TARGET_HAS_bswap32_i64      0
45 #define TCG_TARGET_HAS_bswap64_i64      0
46 #define TCG_TARGET_HAS_not_i64          1
47 #define TCG_TARGET_HAS_eqv_i64          0
48 #define TCG_TARGET_HAS_nand_i64         0
49 #define TCG_TARGET_HAS_nor_i64          0
50 #define TCG_TARGET_HAS_clz_i64          0
51 #define TCG_TARGET_HAS_ctz_i64          0
52 #define TCG_TARGET_HAS_ctpop_i64        0
53 #define TCG_TARGET_HAS_extract2_i64     0
54 #define TCG_TARGET_HAS_negsetcond_i64   1
55 #define TCG_TARGET_HAS_add2_i64         1
56 #define TCG_TARGET_HAS_sub2_i64         1
57 #define TCG_TARGET_HAS_mulu2_i64        0
58 #define TCG_TARGET_HAS_muls2_i64        0
59 #define TCG_TARGET_HAS_muluh_i64        use_vis3_instructions
60 #define TCG_TARGET_HAS_mulsh_i64        0
61 
62 #define TCG_TARGET_HAS_qemu_ldst_i128   0
63 
64 #define TCG_TARGET_HAS_tst              1
65 
66 #define TCG_TARGET_extract_valid(type, ofs, len) \
67     ((type) == TCG_TYPE_I64 && (ofs) + (len) == 32)
68 
69 #define TCG_TARGET_sextract_valid  TCG_TARGET_extract_valid
70 
71 #define TCG_TARGET_deposit_valid(type, ofs, len) 0
72 
73 #endif
74