1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Define target-specific opcode support 4 * Copyright (c) 2009 Ulrich Hecht <uli@suse.de> 5 */ 6 7 #ifndef TCG_TARGET_HAS_H 8 #define TCG_TARGET_HAS_H 9 10 /* Facilities required for proper operation; checked at startup. */ 11 12 #define FACILITY_ZARCH_ACTIVE 2 13 #define FACILITY_LONG_DISP 18 14 #define FACILITY_EXT_IMM 21 15 #define FACILITY_GEN_INST_EXT 34 16 #define FACILITY_45 45 17 18 /* Facilities that are checked at runtime. */ 19 20 #define FACILITY_LOAD_ON_COND2 53 21 #define FACILITY_MISC_INSN_EXT2 58 22 #define FACILITY_MISC_INSN_EXT3 61 23 #define FACILITY_VECTOR 129 24 #define FACILITY_VECTOR_ENH1 135 25 26 extern uint64_t s390_facilities[3]; 27 28 #define HAVE_FACILITY(X) \ 29 ((s390_facilities[FACILITY_##X / 64] >> (63 - FACILITY_##X % 64)) & 1) 30 31 /* optional instructions */ 32 #define TCG_TARGET_HAS_div2_i32 1 33 #define TCG_TARGET_HAS_rot_i32 1 34 #define TCG_TARGET_HAS_bswap16_i32 1 35 #define TCG_TARGET_HAS_bswap32_i32 1 36 #define TCG_TARGET_HAS_not_i32 HAVE_FACILITY(MISC_INSN_EXT3) 37 #define TCG_TARGET_HAS_clz_i32 0 38 #define TCG_TARGET_HAS_ctz_i32 0 39 #define TCG_TARGET_HAS_ctpop_i32 1 40 #define TCG_TARGET_HAS_extract2_i32 0 41 #define TCG_TARGET_HAS_negsetcond_i32 1 42 #define TCG_TARGET_HAS_add2_i32 1 43 #define TCG_TARGET_HAS_sub2_i32 1 44 #define TCG_TARGET_HAS_mulu2_i32 0 45 #define TCG_TARGET_HAS_muls2_i32 0 46 #define TCG_TARGET_HAS_muluh_i32 0 47 #define TCG_TARGET_HAS_mulsh_i32 0 48 #define TCG_TARGET_HAS_extr_i64_i32 0 49 #define TCG_TARGET_HAS_qemu_st8_i32 0 50 51 #define TCG_TARGET_HAS_div2_i64 1 52 #define TCG_TARGET_HAS_rot_i64 1 53 #define TCG_TARGET_HAS_bswap16_i64 1 54 #define TCG_TARGET_HAS_bswap32_i64 1 55 #define TCG_TARGET_HAS_bswap64_i64 1 56 #define TCG_TARGET_HAS_not_i64 HAVE_FACILITY(MISC_INSN_EXT3) 57 #define TCG_TARGET_HAS_clz_i64 1 58 #define TCG_TARGET_HAS_ctz_i64 0 59 #define TCG_TARGET_HAS_ctpop_i64 1 60 #define TCG_TARGET_HAS_extract2_i64 0 61 #define TCG_TARGET_HAS_negsetcond_i64 1 62 #define TCG_TARGET_HAS_add2_i64 1 63 #define TCG_TARGET_HAS_sub2_i64 1 64 #define TCG_TARGET_HAS_mulu2_i64 1 65 #define TCG_TARGET_HAS_muls2_i64 HAVE_FACILITY(MISC_INSN_EXT2) 66 #define TCG_TARGET_HAS_muluh_i64 0 67 #define TCG_TARGET_HAS_mulsh_i64 0 68 69 #define TCG_TARGET_HAS_qemu_ldst_i128 1 70 71 #define TCG_TARGET_HAS_tst 1 72 73 #define TCG_TARGET_HAS_v64 HAVE_FACILITY(VECTOR) 74 #define TCG_TARGET_HAS_v128 HAVE_FACILITY(VECTOR) 75 #define TCG_TARGET_HAS_v256 0 76 77 #define TCG_TARGET_HAS_andc_vec 1 78 #define TCG_TARGET_HAS_orc_vec HAVE_FACILITY(VECTOR_ENH1) 79 #define TCG_TARGET_HAS_nand_vec HAVE_FACILITY(VECTOR_ENH1) 80 #define TCG_TARGET_HAS_nor_vec 1 81 #define TCG_TARGET_HAS_eqv_vec HAVE_FACILITY(VECTOR_ENH1) 82 #define TCG_TARGET_HAS_not_vec 1 83 #define TCG_TARGET_HAS_neg_vec 1 84 #define TCG_TARGET_HAS_abs_vec 1 85 #define TCG_TARGET_HAS_roti_vec 1 86 #define TCG_TARGET_HAS_rots_vec 1 87 #define TCG_TARGET_HAS_rotv_vec 1 88 #define TCG_TARGET_HAS_shi_vec 1 89 #define TCG_TARGET_HAS_shs_vec 1 90 #define TCG_TARGET_HAS_shv_vec 1 91 #define TCG_TARGET_HAS_mul_vec 1 92 #define TCG_TARGET_HAS_sat_vec 0 93 #define TCG_TARGET_HAS_minmax_vec 1 94 #define TCG_TARGET_HAS_bitsel_vec 1 95 #define TCG_TARGET_HAS_cmpsel_vec 1 96 #define TCG_TARGET_HAS_tst_vec 0 97 98 #define TCG_TARGET_extract_valid(type, ofs, len) 1 99 #define TCG_TARGET_deposit_valid(type, ofs, len) 1 100 101 static inline bool 102 tcg_target_sextract_valid(TCGType type, unsigned ofs, unsigned len) 103 { 104 if (ofs == 0) { 105 switch (len) { 106 case 8: 107 case 16: 108 return true; 109 case 32: 110 return type == TCG_TYPE_I64; 111 } 112 } 113 return false; 114 } 115 #define TCG_TARGET_sextract_valid tcg_target_sextract_valid 116 117 #endif 118