1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Define RISC-V target-specific operand constraints. 4 * Copyright (c) 2021 Linaro 5 */ 6 7 /* 8 * Define constraint letters for register sets: 9 * REGS(letter, register_mask) 10 */ 11 REGS('r', ALL_GENERAL_REGS) 12 REGS('v', ALL_VECTOR_REGS) 13 14 /* 15 * Define constraint letters for constants: 16 * CONST(letter, TCG_CT_CONST_* bit set) 17 */ 18 CONST('I', TCG_CT_CONST_S12) 19 CONST('J', TCG_CT_CONST_J12) 20 CONST('K', TCG_CT_CONST_S5) 21 CONST('L', TCG_CT_CONST_CMP_VI) 22 CONST('N', TCG_CT_CONST_N12) 23 CONST('M', TCG_CT_CONST_M12) 24 CONST('Z', TCG_CT_CONST_ZERO) 25