xref: /openbmc/qemu/tcg/riscv/tcg-target-con-set.h (revision 327d4b7f)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Define RISC-V target-specific constraint sets.
4  * Copyright (c) 2021 Linaro
5  */
6 
7 /*
8  * C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
9  * Each operand should be a sequence of constraint letters as defined by
10  * tcg-target-con-str.h; the constraint combination is inclusive or.
11  */
12 C_O0_I1(r)
13 C_O0_I2(LZ, L)
14 C_O0_I2(rZ, r)
15 C_O0_I2(rZ, rZ)
16 C_O0_I3(LZ, L, L)
17 C_O0_I3(LZ, LZ, L)
18 C_O0_I4(LZ, LZ, L, L)
19 C_O0_I4(rZ, rZ, rZ, rZ)
20 C_O1_I1(r, L)
21 C_O1_I1(r, r)
22 C_O1_I2(r, L, L)
23 C_O1_I2(r, r, ri)
24 C_O1_I2(r, r, rI)
25 C_O1_I2(r, rZ, rN)
26 C_O1_I2(r, rZ, rZ)
27 C_O1_I4(r, rZ, rZ, rZ, rZ)
28 C_O2_I1(r, r, L)
29 C_O2_I2(r, r, L, L)
30 C_O2_I4(r, r, rZ, rZ, rM, rM)
31