xref: /openbmc/qemu/tcg/ppc/tcg-target-reg-bits.h (revision 764a6ee9)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Define target-specific register size
4  * Copyright (c) 2008 Fabrice Bellard
5  */
6 
7 #ifndef TCG_TARGET_REG_BITS_H
8 #define TCG_TARGET_REG_BITS_H
9 
10 #ifdef _ARCH_PPC64
11 # define TCG_TARGET_REG_BITS  64
12 #else
13 # define TCG_TARGET_REG_BITS  32
14 #endif
15 
16 #endif
17