xref: /openbmc/qemu/tcg/ppc/tcg-target-has.h (revision 76f42780292c16a0d2f36cbbfbaf57495cd4d5e8)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Define target-specific opcode support
4  * Copyright (c) 2008 Fabrice Bellard
5  */
6 
7 #ifndef TCG_TARGET_HAS_H
8 #define TCG_TARGET_HAS_H
9 
10 #include "host/cpuinfo.h"
11 
12 #define have_isa_2_06  (cpuinfo & CPUINFO_V2_06)
13 #define have_isa_2_07  (cpuinfo & CPUINFO_V2_07)
14 #define have_isa_3_00  (cpuinfo & CPUINFO_V3_0)
15 #define have_isa_3_10  (cpuinfo & CPUINFO_V3_1)
16 #define have_altivec   (cpuinfo & CPUINFO_ALTIVEC)
17 #define have_vsx       (cpuinfo & CPUINFO_VSX)
18 
19 /* optional instructions */
20 #define TCG_TARGET_HAS_qemu_st8_i32     0
21 
22 #if TCG_TARGET_REG_BITS == 64
23 #define TCG_TARGET_HAS_add2_i32         0
24 #define TCG_TARGET_HAS_sub2_i32         0
25 #define TCG_TARGET_HAS_extr_i64_i32     0
26 #define TCG_TARGET_HAS_add2_i64         1
27 #define TCG_TARGET_HAS_sub2_i64         1
28 #else
29 #define TCG_TARGET_HAS_add2_i32         1
30 #define TCG_TARGET_HAS_sub2_i32         1
31 #endif
32 
33 #define TCG_TARGET_HAS_qemu_ldst_i128   \
34     (TCG_TARGET_REG_BITS == 64 && have_isa_2_07)
35 
36 #define TCG_TARGET_HAS_tst              1
37 
38 /*
39  * While technically Altivec could support V64, it has no 64-bit store
40  * instruction and substituting two 32-bit stores makes the generated
41  * code quite large.
42  */
43 #define TCG_TARGET_HAS_v64              have_vsx
44 #define TCG_TARGET_HAS_v128             have_altivec
45 #define TCG_TARGET_HAS_v256             0
46 
47 #define TCG_TARGET_HAS_andc_vec         1
48 #define TCG_TARGET_HAS_orc_vec          have_isa_2_07
49 #define TCG_TARGET_HAS_nand_vec         have_isa_2_07
50 #define TCG_TARGET_HAS_nor_vec          1
51 #define TCG_TARGET_HAS_eqv_vec          have_isa_2_07
52 #define TCG_TARGET_HAS_not_vec          1
53 #define TCG_TARGET_HAS_neg_vec          have_isa_3_00
54 #define TCG_TARGET_HAS_abs_vec          0
55 #define TCG_TARGET_HAS_roti_vec         0
56 #define TCG_TARGET_HAS_rots_vec         0
57 #define TCG_TARGET_HAS_rotv_vec         1
58 #define TCG_TARGET_HAS_shi_vec          0
59 #define TCG_TARGET_HAS_shs_vec          0
60 #define TCG_TARGET_HAS_shv_vec          1
61 #define TCG_TARGET_HAS_mul_vec          1
62 #define TCG_TARGET_HAS_sat_vec          1
63 #define TCG_TARGET_HAS_minmax_vec       1
64 #define TCG_TARGET_HAS_bitsel_vec       have_vsx
65 #define TCG_TARGET_HAS_cmpsel_vec       1
66 #define TCG_TARGET_HAS_tst_vec          0
67 
68 #define TCG_TARGET_extract_valid(type, ofs, len)   1
69 #define TCG_TARGET_deposit_valid(type, ofs, len)   1
70 
71 static inline bool
72 tcg_target_sextract_valid(TCGType type, unsigned ofs, unsigned len)
73 {
74     if (type == TCG_TYPE_I64 && ofs + len == 32) {
75         return true;
76     }
77     return ofs == 0 && (len == 8 || len == 16);
78 }
79 #define TCG_TARGET_sextract_valid  tcg_target_sextract_valid
80 
81 #endif
82