1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Define PowerPC target-specific operand constraints. 4 * Copyright (c) 2021 Linaro 5 */ 6 7 /* 8 * Define constraint letters for register sets: 9 * REGS(letter, register_mask) 10 */ 11 REGS('r', ALL_GENERAL_REGS) 12 REGS('v', ALL_VECTOR_REGS) 13 REGS('A', 1u << TCG_REG_R3) 14 REGS('B', 1u << TCG_REG_R4) 15 REGS('C', 1u << TCG_REG_R5) 16 REGS('D', 1u << TCG_REG_R6) 17 REGS('L', ALL_QLOAD_REGS) 18 REGS('S', ALL_QSTORE_REGS) 19 20 /* 21 * Define constraint letters for constants: 22 * CONST(letter, TCG_CT_CONST_* bit set) 23 */ 24 CONST('I', TCG_CT_CONST_S16) 25 CONST('J', TCG_CT_CONST_U16) 26 CONST('M', TCG_CT_CONST_MONE) 27 CONST('T', TCG_CT_CONST_S32) 28 CONST('U', TCG_CT_CONST_U32) 29 CONST('W', TCG_CT_CONST_WSZ) 30 CONST('Z', TCG_CT_CONST_ZERO) 31