xref: /openbmc/qemu/tcg/loongarch64/tcg-target-has.h (revision 005a87e148dc20f59835b328336240759703d63d)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Define target-specific opcode support
4  * Copyright (c) 2021 WANG Xuerui <git@xen0n.name>
5  */
6 
7 #ifndef TCG_TARGET_HAS_H
8 #define TCG_TARGET_HAS_H
9 
10 #include "host/cpuinfo.h"
11 
12 /* optional instructions */
13 #define TCG_TARGET_HAS_negsetcond_i32   0
14 #define TCG_TARGET_HAS_extract2_i32     0
15 #define TCG_TARGET_HAS_add2_i32         0
16 #define TCG_TARGET_HAS_sub2_i32         0
17 #define TCG_TARGET_HAS_mulu2_i32        0
18 #define TCG_TARGET_HAS_muls2_i32        0
19 #define TCG_TARGET_HAS_bswap16_i32      1
20 #define TCG_TARGET_HAS_bswap32_i32      1
21 #define TCG_TARGET_HAS_clz_i32          1
22 #define TCG_TARGET_HAS_ctz_i32          1
23 #define TCG_TARGET_HAS_ctpop_i32        0
24 #define TCG_TARGET_HAS_qemu_st8_i32     0
25 
26 /* 64-bit operations */
27 #define TCG_TARGET_HAS_negsetcond_i64   0
28 #define TCG_TARGET_HAS_extract2_i64     0
29 #define TCG_TARGET_HAS_extr_i64_i32     1
30 #define TCG_TARGET_HAS_bswap16_i64      1
31 #define TCG_TARGET_HAS_bswap32_i64      1
32 #define TCG_TARGET_HAS_bswap64_i64      1
33 #define TCG_TARGET_HAS_clz_i64          1
34 #define TCG_TARGET_HAS_ctz_i64          1
35 #define TCG_TARGET_HAS_ctpop_i64        0
36 #define TCG_TARGET_HAS_add2_i64         0
37 #define TCG_TARGET_HAS_sub2_i64         0
38 #define TCG_TARGET_HAS_mulu2_i64        0
39 #define TCG_TARGET_HAS_muls2_i64        0
40 
41 #define TCG_TARGET_HAS_qemu_ldst_i128   (cpuinfo & CPUINFO_LSX)
42 
43 #define TCG_TARGET_HAS_tst              0
44 
45 #define TCG_TARGET_HAS_v64              (cpuinfo & CPUINFO_LSX)
46 #define TCG_TARGET_HAS_v128             (cpuinfo & CPUINFO_LSX)
47 #define TCG_TARGET_HAS_v256             (cpuinfo & CPUINFO_LASX)
48 
49 #define TCG_TARGET_HAS_not_vec          1
50 #define TCG_TARGET_HAS_neg_vec          1
51 #define TCG_TARGET_HAS_abs_vec          0
52 #define TCG_TARGET_HAS_andc_vec         1
53 #define TCG_TARGET_HAS_orc_vec          1
54 #define TCG_TARGET_HAS_nand_vec         0
55 #define TCG_TARGET_HAS_nor_vec          1
56 #define TCG_TARGET_HAS_eqv_vec          0
57 #define TCG_TARGET_HAS_mul_vec          1
58 #define TCG_TARGET_HAS_shi_vec          1
59 #define TCG_TARGET_HAS_shs_vec          0
60 #define TCG_TARGET_HAS_shv_vec          1
61 #define TCG_TARGET_HAS_roti_vec         1
62 #define TCG_TARGET_HAS_rots_vec         0
63 #define TCG_TARGET_HAS_rotv_vec         1
64 #define TCG_TARGET_HAS_sat_vec          1
65 #define TCG_TARGET_HAS_minmax_vec       1
66 #define TCG_TARGET_HAS_bitsel_vec       1
67 #define TCG_TARGET_HAS_cmpsel_vec       0
68 #define TCG_TARGET_HAS_tst_vec          0
69 
70 #define TCG_TARGET_extract_valid(type, ofs, len)   1
71 #define TCG_TARGET_deposit_valid(type, ofs, len)   1
72 
73 static inline bool
74 tcg_target_sextract_valid(TCGType type, unsigned ofs, unsigned len)
75 {
76     if (type == TCG_TYPE_I64 && ofs + len == 32) {
77         return true;
78     }
79     return ofs == 0 && (len == 8 || len == 16);
80 }
81 #define TCG_TARGET_sextract_valid  tcg_target_sextract_valid
82 
83 #endif
84