1/* SPDX-License-Identifier: MIT */ 2/* 3 * LoongArch instruction formats, opcodes, and encoders for TCG use. 4 * 5 * This file is auto-generated by genqemutcgdefs from 6 * https://github.com/loongson-community/loongarch-opcodes, 7 * from commit 7f353fb69bd99ce6edfad7ad63948c4bb526f0bf. 8 * DO NOT EDIT. 9 */ 10 11typedef enum { 12 OPC_MOVGR2SCR = 0x00000800, 13 OPC_MOVSCR2GR = 0x00000c00, 14 OPC_CLZ_W = 0x00001400, 15 OPC_CTZ_W = 0x00001c00, 16 OPC_CLZ_D = 0x00002400, 17 OPC_CTZ_D = 0x00002c00, 18 OPC_REVB_2H = 0x00003000, 19 OPC_REVB_2W = 0x00003800, 20 OPC_REVB_D = 0x00003c00, 21 OPC_SEXT_H = 0x00005800, 22 OPC_SEXT_B = 0x00005c00, 23 OPC_ADD_W = 0x00100000, 24 OPC_ADD_D = 0x00108000, 25 OPC_SUB_W = 0x00110000, 26 OPC_SUB_D = 0x00118000, 27 OPC_SLT = 0x00120000, 28 OPC_SLTU = 0x00128000, 29 OPC_MASKEQZ = 0x00130000, 30 OPC_MASKNEZ = 0x00138000, 31 OPC_NOR = 0x00140000, 32 OPC_AND = 0x00148000, 33 OPC_OR = 0x00150000, 34 OPC_XOR = 0x00158000, 35 OPC_ORN = 0x00160000, 36 OPC_ANDN = 0x00168000, 37 OPC_SLL_W = 0x00170000, 38 OPC_SRL_W = 0x00178000, 39 OPC_SRA_W = 0x00180000, 40 OPC_SLL_D = 0x00188000, 41 OPC_SRL_D = 0x00190000, 42 OPC_SRA_D = 0x00198000, 43 OPC_ROTR_B = 0x001a0000, 44 OPC_ROTR_H = 0x001a8000, 45 OPC_ROTR_W = 0x001b0000, 46 OPC_ROTR_D = 0x001b8000, 47 OPC_MUL_W = 0x001c0000, 48 OPC_MULH_W = 0x001c8000, 49 OPC_MULH_WU = 0x001d0000, 50 OPC_MUL_D = 0x001d8000, 51 OPC_MULH_D = 0x001e0000, 52 OPC_MULH_DU = 0x001e8000, 53 OPC_DIV_W = 0x00200000, 54 OPC_MOD_W = 0x00208000, 55 OPC_DIV_WU = 0x00210000, 56 OPC_MOD_WU = 0x00218000, 57 OPC_DIV_D = 0x00220000, 58 OPC_MOD_D = 0x00228000, 59 OPC_DIV_DU = 0x00230000, 60 OPC_MOD_DU = 0x00238000, 61 OPC_SLLI_W = 0x00408000, 62 OPC_SLLI_D = 0x00410000, 63 OPC_SRLI_W = 0x00448000, 64 OPC_SRLI_D = 0x00450000, 65 OPC_SRAI_W = 0x00488000, 66 OPC_SRAI_D = 0x00490000, 67 OPC_ROTRI_B = 0x004c2000, 68 OPC_ROTRI_H = 0x004c4000, 69 OPC_ROTRI_W = 0x004c8000, 70 OPC_ROTRI_D = 0x004d0000, 71 OPC_BSTRINS_W = 0x00600000, 72 OPC_BSTRPICK_W = 0x00608000, 73 OPC_BSTRINS_D = 0x00800000, 74 OPC_BSTRPICK_D = 0x00c00000, 75 OPC_FMOV_D = 0x01149800, 76 OPC_MOVGR2FR_D = 0x0114a800, 77 OPC_MOVFR2GR_D = 0x0114b800, 78 OPC_SLTI = 0x02000000, 79 OPC_SLTUI = 0x02400000, 80 OPC_ADDI_W = 0x02800000, 81 OPC_ADDI_D = 0x02c00000, 82 OPC_CU52I_D = 0x03000000, 83 OPC_ANDI = 0x03400000, 84 OPC_ORI = 0x03800000, 85 OPC_XORI = 0x03c00000, 86 OPC_VBITSEL_V = 0x0d100000, 87 OPC_XVBITSEL_V = 0x0d200000, 88 OPC_VSHUF_B = 0x0d500000, 89 OPC_XVSHUF_B = 0x0d600000, 90 OPC_ADDU16I_D = 0x10000000, 91 OPC_LU12I_W = 0x14000000, 92 OPC_CU32I_D = 0x16000000, 93 OPC_PCADDU2I = 0x18000000, 94 OPC_PCALAU12I = 0x1a000000, 95 OPC_PCADDU12I = 0x1c000000, 96 OPC_PCADDU18I = 0x1e000000, 97 OPC_LD_B = 0x28000000, 98 OPC_LD_H = 0x28400000, 99 OPC_LD_W = 0x28800000, 100 OPC_LD_D = 0x28c00000, 101 OPC_ST_B = 0x29000000, 102 OPC_ST_H = 0x29400000, 103 OPC_ST_W = 0x29800000, 104 OPC_ST_D = 0x29c00000, 105 OPC_LD_BU = 0x2a000000, 106 OPC_LD_HU = 0x2a400000, 107 OPC_LD_WU = 0x2a800000, 108 OPC_FLD_S = 0x2b000000, 109 OPC_FST_S = 0x2b400000, 110 OPC_FLD_D = 0x2b800000, 111 OPC_FST_D = 0x2bc00000, 112 OPC_VLD = 0x2c000000, 113 OPC_VST = 0x2c400000, 114 OPC_XVLD = 0x2c800000, 115 OPC_XVST = 0x2cc00000, 116 OPC_VLDREPL_D = 0x30100000, 117 OPC_VLDREPL_W = 0x30200000, 118 OPC_VLDREPL_H = 0x30400000, 119 OPC_VLDREPL_B = 0x30800000, 120 OPC_VSTELM_D = 0x31100000, 121 OPC_VSTELM_W = 0x31200000, 122 OPC_VSTELM_H = 0x31400000, 123 OPC_VSTELM_B = 0x31800000, 124 OPC_XVLDREPL_D = 0x32100000, 125 OPC_XVLDREPL_W = 0x32200000, 126 OPC_XVLDREPL_H = 0x32400000, 127 OPC_XVLDREPL_B = 0x32800000, 128 OPC_XVSTELM_D = 0x33100000, 129 OPC_XVSTELM_W = 0x33200000, 130 OPC_XVSTELM_H = 0x33400000, 131 OPC_XVSTELM_B = 0x33800000, 132 OPC_LDX_B = 0x38000000, 133 OPC_LDX_H = 0x38040000, 134 OPC_LDX_W = 0x38080000, 135 OPC_LDX_D = 0x380c0000, 136 OPC_STX_B = 0x38100000, 137 OPC_STX_H = 0x38140000, 138 OPC_STX_W = 0x38180000, 139 OPC_STX_D = 0x381c0000, 140 OPC_LDX_BU = 0x38200000, 141 OPC_LDX_HU = 0x38240000, 142 OPC_LDX_WU = 0x38280000, 143 OPC_FLDX_S = 0x38300000, 144 OPC_FLDX_D = 0x38340000, 145 OPC_FSTX_S = 0x38380000, 146 OPC_FSTX_D = 0x383c0000, 147 OPC_VLDX = 0x38400000, 148 OPC_VSTX = 0x38440000, 149 OPC_XVLDX = 0x38480000, 150 OPC_XVSTX = 0x384c0000, 151 OPC_DBAR = 0x38720000, 152 OPC_JISCR0 = 0x48000200, 153 OPC_JISCR1 = 0x48000300, 154 OPC_JIRL = 0x4c000000, 155 OPC_B = 0x50000000, 156 OPC_BL = 0x54000000, 157 OPC_BEQ = 0x58000000, 158 OPC_BNE = 0x5c000000, 159 OPC_BGT = 0x60000000, 160 OPC_BLE = 0x64000000, 161 OPC_BGTU = 0x68000000, 162 OPC_BLEU = 0x6c000000, 163 OPC_VSEQ_B = 0x70000000, 164 OPC_VSEQ_H = 0x70008000, 165 OPC_VSEQ_W = 0x70010000, 166 OPC_VSEQ_D = 0x70018000, 167 OPC_VSLE_B = 0x70020000, 168 OPC_VSLE_H = 0x70028000, 169 OPC_VSLE_W = 0x70030000, 170 OPC_VSLE_D = 0x70038000, 171 OPC_VSLE_BU = 0x70040000, 172 OPC_VSLE_HU = 0x70048000, 173 OPC_VSLE_WU = 0x70050000, 174 OPC_VSLE_DU = 0x70058000, 175 OPC_VSLT_B = 0x70060000, 176 OPC_VSLT_H = 0x70068000, 177 OPC_VSLT_W = 0x70070000, 178 OPC_VSLT_D = 0x70078000, 179 OPC_VSLT_BU = 0x70080000, 180 OPC_VSLT_HU = 0x70088000, 181 OPC_VSLT_WU = 0x70090000, 182 OPC_VSLT_DU = 0x70098000, 183 OPC_VADD_B = 0x700a0000, 184 OPC_VADD_H = 0x700a8000, 185 OPC_VADD_W = 0x700b0000, 186 OPC_VADD_D = 0x700b8000, 187 OPC_VSUB_B = 0x700c0000, 188 OPC_VSUB_H = 0x700c8000, 189 OPC_VSUB_W = 0x700d0000, 190 OPC_VSUB_D = 0x700d8000, 191 OPC_VSADD_B = 0x70460000, 192 OPC_VSADD_H = 0x70468000, 193 OPC_VSADD_W = 0x70470000, 194 OPC_VSADD_D = 0x70478000, 195 OPC_VSSUB_B = 0x70480000, 196 OPC_VSSUB_H = 0x70488000, 197 OPC_VSSUB_W = 0x70490000, 198 OPC_VSSUB_D = 0x70498000, 199 OPC_VSADD_BU = 0x704a0000, 200 OPC_VSADD_HU = 0x704a8000, 201 OPC_VSADD_WU = 0x704b0000, 202 OPC_VSADD_DU = 0x704b8000, 203 OPC_VSSUB_BU = 0x704c0000, 204 OPC_VSSUB_HU = 0x704c8000, 205 OPC_VSSUB_WU = 0x704d0000, 206 OPC_VSSUB_DU = 0x704d8000, 207 OPC_VMAX_B = 0x70700000, 208 OPC_VMAX_H = 0x70708000, 209 OPC_VMAX_W = 0x70710000, 210 OPC_VMAX_D = 0x70718000, 211 OPC_VMIN_B = 0x70720000, 212 OPC_VMIN_H = 0x70728000, 213 OPC_VMIN_W = 0x70730000, 214 OPC_VMIN_D = 0x70738000, 215 OPC_VMAX_BU = 0x70740000, 216 OPC_VMAX_HU = 0x70748000, 217 OPC_VMAX_WU = 0x70750000, 218 OPC_VMAX_DU = 0x70758000, 219 OPC_VMIN_BU = 0x70760000, 220 OPC_VMIN_HU = 0x70768000, 221 OPC_VMIN_WU = 0x70770000, 222 OPC_VMIN_DU = 0x70778000, 223 OPC_VMUL_B = 0x70840000, 224 OPC_VMUL_H = 0x70848000, 225 OPC_VMUL_W = 0x70850000, 226 OPC_VMUL_D = 0x70858000, 227 OPC_VSLL_B = 0x70e80000, 228 OPC_VSLL_H = 0x70e88000, 229 OPC_VSLL_W = 0x70e90000, 230 OPC_VSLL_D = 0x70e98000, 231 OPC_VSRL_B = 0x70ea0000, 232 OPC_VSRL_H = 0x70ea8000, 233 OPC_VSRL_W = 0x70eb0000, 234 OPC_VSRL_D = 0x70eb8000, 235 OPC_VSRA_B = 0x70ec0000, 236 OPC_VSRA_H = 0x70ec8000, 237 OPC_VSRA_W = 0x70ed0000, 238 OPC_VSRA_D = 0x70ed8000, 239 OPC_VROTR_B = 0x70ee0000, 240 OPC_VROTR_H = 0x70ee8000, 241 OPC_VROTR_W = 0x70ef0000, 242 OPC_VROTR_D = 0x70ef8000, 243 OPC_VREPLVE_B = 0x71220000, 244 OPC_VREPLVE_H = 0x71228000, 245 OPC_VREPLVE_W = 0x71230000, 246 OPC_VREPLVE_D = 0x71238000, 247 OPC_VAND_V = 0x71260000, 248 OPC_VOR_V = 0x71268000, 249 OPC_VXOR_V = 0x71270000, 250 OPC_VNOR_V = 0x71278000, 251 OPC_VANDN_V = 0x71280000, 252 OPC_VORN_V = 0x71288000, 253 OPC_VSEQI_B = 0x72800000, 254 OPC_VSEQI_H = 0x72808000, 255 OPC_VSEQI_W = 0x72810000, 256 OPC_VSEQI_D = 0x72818000, 257 OPC_VSLEI_B = 0x72820000, 258 OPC_VSLEI_H = 0x72828000, 259 OPC_VSLEI_W = 0x72830000, 260 OPC_VSLEI_D = 0x72838000, 261 OPC_VSLEI_BU = 0x72840000, 262 OPC_VSLEI_HU = 0x72848000, 263 OPC_VSLEI_WU = 0x72850000, 264 OPC_VSLEI_DU = 0x72858000, 265 OPC_VSLTI_B = 0x72860000, 266 OPC_VSLTI_H = 0x72868000, 267 OPC_VSLTI_W = 0x72870000, 268 OPC_VSLTI_D = 0x72878000, 269 OPC_VSLTI_BU = 0x72880000, 270 OPC_VSLTI_HU = 0x72888000, 271 OPC_VSLTI_WU = 0x72890000, 272 OPC_VSLTI_DU = 0x72898000, 273 OPC_VADDI_BU = 0x728a0000, 274 OPC_VADDI_HU = 0x728a8000, 275 OPC_VADDI_WU = 0x728b0000, 276 OPC_VADDI_DU = 0x728b8000, 277 OPC_VSUBI_BU = 0x728c0000, 278 OPC_VSUBI_HU = 0x728c8000, 279 OPC_VSUBI_WU = 0x728d0000, 280 OPC_VSUBI_DU = 0x728d8000, 281 OPC_VMAXI_B = 0x72900000, 282 OPC_VMAXI_H = 0x72908000, 283 OPC_VMAXI_W = 0x72910000, 284 OPC_VMAXI_D = 0x72918000, 285 OPC_VMINI_B = 0x72920000, 286 OPC_VMINI_H = 0x72928000, 287 OPC_VMINI_W = 0x72930000, 288 OPC_VMINI_D = 0x72938000, 289 OPC_VMAXI_BU = 0x72940000, 290 OPC_VMAXI_HU = 0x72948000, 291 OPC_VMAXI_WU = 0x72950000, 292 OPC_VMAXI_DU = 0x72958000, 293 OPC_VMINI_BU = 0x72960000, 294 OPC_VMINI_HU = 0x72968000, 295 OPC_VMINI_WU = 0x72970000, 296 OPC_VMINI_DU = 0x72978000, 297 OPC_VNEG_B = 0x729c3000, 298 OPC_VNEG_H = 0x729c3400, 299 OPC_VNEG_W = 0x729c3800, 300 OPC_VNEG_D = 0x729c3c00, 301 OPC_VREPLGR2VR_B = 0x729f0000, 302 OPC_VREPLGR2VR_H = 0x729f0400, 303 OPC_VREPLGR2VR_W = 0x729f0800, 304 OPC_VREPLGR2VR_D = 0x729f0c00, 305 OPC_VROTRI_B = 0x72a02000, 306 OPC_VROTRI_H = 0x72a04000, 307 OPC_VROTRI_W = 0x72a08000, 308 OPC_VROTRI_D = 0x72a10000, 309 OPC_VINSGR2VR_B = 0x72eb8000, 310 OPC_VINSGR2VR_H = 0x72ebc000, 311 OPC_VINSGR2VR_W = 0x72ebe000, 312 OPC_VINSGR2VR_D = 0x72ebf000, 313 OPC_VPICKVE2GR_B = 0x72ef8000, 314 OPC_VPICKVE2GR_H = 0x72efc000, 315 OPC_VPICKVE2GR_W = 0x72efe000, 316 OPC_VPICKVE2GR_D = 0x72eff000, 317 OPC_VPICKVE2GR_BU = 0x72f38000, 318 OPC_VPICKVE2GR_HU = 0x72f3c000, 319 OPC_VPICKVE2GR_WU = 0x72f3e000, 320 OPC_VPICKVE2GR_DU = 0x72f3f000, 321 OPC_VREPLVEI_B = 0x72f78000, 322 OPC_VREPLVEI_H = 0x72f7c000, 323 OPC_VREPLVEI_W = 0x72f7e000, 324 OPC_VREPLVEI_D = 0x72f7f000, 325 OPC_VBITCLRI_B = 0x73102000, 326 OPC_VBITCLRI_H = 0x73104000, 327 OPC_VBITCLRI_W = 0x73108000, 328 OPC_VBITCLRI_D = 0x73110000, 329 OPC_VBITSETI_B = 0x73142000, 330 OPC_VBITSETI_H = 0x73144000, 331 OPC_VBITSETI_W = 0x73148000, 332 OPC_VBITSETI_D = 0x73150000, 333 OPC_VBITREVI_B = 0x73182000, 334 OPC_VBITREVI_H = 0x73184000, 335 OPC_VBITREVI_W = 0x73188000, 336 OPC_VBITREVI_D = 0x73190000, 337 OPC_VSLLI_B = 0x732c2000, 338 OPC_VSLLI_H = 0x732c4000, 339 OPC_VSLLI_W = 0x732c8000, 340 OPC_VSLLI_D = 0x732d0000, 341 OPC_VSRLI_B = 0x73302000, 342 OPC_VSRLI_H = 0x73304000, 343 OPC_VSRLI_W = 0x73308000, 344 OPC_VSRLI_D = 0x73310000, 345 OPC_VSRAI_B = 0x73342000, 346 OPC_VSRAI_H = 0x73344000, 347 OPC_VSRAI_W = 0x73348000, 348 OPC_VSRAI_D = 0x73350000, 349 OPC_VBITSELI_B = 0x73c40000, 350 OPC_VANDI_B = 0x73d00000, 351 OPC_VORI_B = 0x73d40000, 352 OPC_VXORI_B = 0x73d80000, 353 OPC_VNORI_B = 0x73dc0000, 354 OPC_VLDI = 0x73e00000, 355 OPC_XVSEQ_B = 0x74000000, 356 OPC_XVSEQ_H = 0x74008000, 357 OPC_XVSEQ_W = 0x74010000, 358 OPC_XVSEQ_D = 0x74018000, 359 OPC_XVSLE_B = 0x74020000, 360 OPC_XVSLE_H = 0x74028000, 361 OPC_XVSLE_W = 0x74030000, 362 OPC_XVSLE_D = 0x74038000, 363 OPC_XVSLE_BU = 0x74040000, 364 OPC_XVSLE_HU = 0x74048000, 365 OPC_XVSLE_WU = 0x74050000, 366 OPC_XVSLE_DU = 0x74058000, 367 OPC_XVSLT_B = 0x74060000, 368 OPC_XVSLT_H = 0x74068000, 369 OPC_XVSLT_W = 0x74070000, 370 OPC_XVSLT_D = 0x74078000, 371 OPC_XVSLT_BU = 0x74080000, 372 OPC_XVSLT_HU = 0x74088000, 373 OPC_XVSLT_WU = 0x74090000, 374 OPC_XVSLT_DU = 0x74098000, 375 OPC_XVADD_B = 0x740a0000, 376 OPC_XVADD_H = 0x740a8000, 377 OPC_XVADD_W = 0x740b0000, 378 OPC_XVADD_D = 0x740b8000, 379 OPC_XVSUB_B = 0x740c0000, 380 OPC_XVSUB_H = 0x740c8000, 381 OPC_XVSUB_W = 0x740d0000, 382 OPC_XVSUB_D = 0x740d8000, 383 OPC_XVSADD_B = 0x74460000, 384 OPC_XVSADD_H = 0x74468000, 385 OPC_XVSADD_W = 0x74470000, 386 OPC_XVSADD_D = 0x74478000, 387 OPC_XVSSUB_B = 0x74480000, 388 OPC_XVSSUB_H = 0x74488000, 389 OPC_XVSSUB_W = 0x74490000, 390 OPC_XVSSUB_D = 0x74498000, 391 OPC_XVSADD_BU = 0x744a0000, 392 OPC_XVSADD_HU = 0x744a8000, 393 OPC_XVSADD_WU = 0x744b0000, 394 OPC_XVSADD_DU = 0x744b8000, 395 OPC_XVSSUB_BU = 0x744c0000, 396 OPC_XVSSUB_HU = 0x744c8000, 397 OPC_XVSSUB_WU = 0x744d0000, 398 OPC_XVSSUB_DU = 0x744d8000, 399 OPC_XVMAX_B = 0x74700000, 400 OPC_XVMAX_H = 0x74708000, 401 OPC_XVMAX_W = 0x74710000, 402 OPC_XVMAX_D = 0x74718000, 403 OPC_XVMIN_B = 0x74720000, 404 OPC_XVMIN_H = 0x74728000, 405 OPC_XVMIN_W = 0x74730000, 406 OPC_XVMIN_D = 0x74738000, 407 OPC_XVMAX_BU = 0x74740000, 408 OPC_XVMAX_HU = 0x74748000, 409 OPC_XVMAX_WU = 0x74750000, 410 OPC_XVMAX_DU = 0x74758000, 411 OPC_XVMIN_BU = 0x74760000, 412 OPC_XVMIN_HU = 0x74768000, 413 OPC_XVMIN_WU = 0x74770000, 414 OPC_XVMIN_DU = 0x74778000, 415 OPC_XVMUL_B = 0x74840000, 416 OPC_XVMUL_H = 0x74848000, 417 OPC_XVMUL_W = 0x74850000, 418 OPC_XVMUL_D = 0x74858000, 419 OPC_XVSLL_B = 0x74e80000, 420 OPC_XVSLL_H = 0x74e88000, 421 OPC_XVSLL_W = 0x74e90000, 422 OPC_XVSLL_D = 0x74e98000, 423 OPC_XVSRL_B = 0x74ea0000, 424 OPC_XVSRL_H = 0x74ea8000, 425 OPC_XVSRL_W = 0x74eb0000, 426 OPC_XVSRL_D = 0x74eb8000, 427 OPC_XVSRA_B = 0x74ec0000, 428 OPC_XVSRA_H = 0x74ec8000, 429 OPC_XVSRA_W = 0x74ed0000, 430 OPC_XVSRA_D = 0x74ed8000, 431 OPC_XVROTR_B = 0x74ee0000, 432 OPC_XVROTR_H = 0x74ee8000, 433 OPC_XVROTR_W = 0x74ef0000, 434 OPC_XVROTR_D = 0x74ef8000, 435 OPC_XVREPLVE_B = 0x75220000, 436 OPC_XVREPLVE_H = 0x75228000, 437 OPC_XVREPLVE_W = 0x75230000, 438 OPC_XVREPLVE_D = 0x75238000, 439 OPC_XVAND_V = 0x75260000, 440 OPC_XVOR_V = 0x75268000, 441 OPC_XVXOR_V = 0x75270000, 442 OPC_XVNOR_V = 0x75278000, 443 OPC_XVANDN_V = 0x75280000, 444 OPC_XVORN_V = 0x75288000, 445 OPC_XVSEQI_B = 0x76800000, 446 OPC_XVSEQI_H = 0x76808000, 447 OPC_XVSEQI_W = 0x76810000, 448 OPC_XVSEQI_D = 0x76818000, 449 OPC_XVSLEI_B = 0x76820000, 450 OPC_XVSLEI_H = 0x76828000, 451 OPC_XVSLEI_W = 0x76830000, 452 OPC_XVSLEI_D = 0x76838000, 453 OPC_XVSLEI_BU = 0x76840000, 454 OPC_XVSLEI_HU = 0x76848000, 455 OPC_XVSLEI_WU = 0x76850000, 456 OPC_XVSLEI_DU = 0x76858000, 457 OPC_XVSLTI_B = 0x76860000, 458 OPC_XVSLTI_H = 0x76868000, 459 OPC_XVSLTI_W = 0x76870000, 460 OPC_XVSLTI_D = 0x76878000, 461 OPC_XVSLTI_BU = 0x76880000, 462 OPC_XVSLTI_HU = 0x76888000, 463 OPC_XVSLTI_WU = 0x76890000, 464 OPC_XVSLTI_DU = 0x76898000, 465 OPC_XVADDI_BU = 0x768a0000, 466 OPC_XVADDI_HU = 0x768a8000, 467 OPC_XVADDI_WU = 0x768b0000, 468 OPC_XVADDI_DU = 0x768b8000, 469 OPC_XVSUBI_BU = 0x768c0000, 470 OPC_XVSUBI_HU = 0x768c8000, 471 OPC_XVSUBI_WU = 0x768d0000, 472 OPC_XVSUBI_DU = 0x768d8000, 473 OPC_XVMAXI_B = 0x76900000, 474 OPC_XVMAXI_H = 0x76908000, 475 OPC_XVMAXI_W = 0x76910000, 476 OPC_XVMAXI_D = 0x76918000, 477 OPC_XVMINI_B = 0x76920000, 478 OPC_XVMINI_H = 0x76928000, 479 OPC_XVMINI_W = 0x76930000, 480 OPC_XVMINI_D = 0x76938000, 481 OPC_XVMAXI_BU = 0x76940000, 482 OPC_XVMAXI_HU = 0x76948000, 483 OPC_XVMAXI_WU = 0x76950000, 484 OPC_XVMAXI_DU = 0x76958000, 485 OPC_XVMINI_BU = 0x76960000, 486 OPC_XVMINI_HU = 0x76968000, 487 OPC_XVMINI_WU = 0x76970000, 488 OPC_XVMINI_DU = 0x76978000, 489 OPC_XVNEG_B = 0x769c3000, 490 OPC_XVNEG_H = 0x769c3400, 491 OPC_XVNEG_W = 0x769c3800, 492 OPC_XVNEG_D = 0x769c3c00, 493 OPC_XVREPLGR2VR_B = 0x769f0000, 494 OPC_XVREPLGR2VR_H = 0x769f0400, 495 OPC_XVREPLGR2VR_W = 0x769f0800, 496 OPC_XVREPLGR2VR_D = 0x769f0c00, 497 OPC_XVROTRI_B = 0x76a02000, 498 OPC_XVROTRI_H = 0x76a04000, 499 OPC_XVROTRI_W = 0x76a08000, 500 OPC_XVROTRI_D = 0x76a10000, 501 OPC_XVINSGR2VR_W = 0x76ebc000, 502 OPC_XVINSGR2VR_D = 0x76ebe000, 503 OPC_XVPICKVE2GR_W = 0x76efc000, 504 OPC_XVPICKVE2GR_D = 0x76efe000, 505 OPC_XVPICKVE2GR_WU = 0x76f3c000, 506 OPC_XVPICKVE2GR_DU = 0x76f3e000, 507 OPC_XVREPL128VEI_B = 0x76f78000, 508 OPC_XVREPL128VEI_H = 0x76f7c000, 509 OPC_XVREPL128VEI_W = 0x76f7e000, 510 OPC_XVREPL128VEI_D = 0x76f7f000, 511 OPC_XVREPLVE0_B = 0x77070000, 512 OPC_XVREPLVE0_H = 0x77078000, 513 OPC_XVREPLVE0_W = 0x7707c000, 514 OPC_XVREPLVE0_D = 0x7707e000, 515 OPC_XVREPLVE0_Q = 0x7707f000, 516 OPC_XVBITCLRI_B = 0x77102000, 517 OPC_XVBITCLRI_H = 0x77104000, 518 OPC_XVBITCLRI_W = 0x77108000, 519 OPC_XVBITCLRI_D = 0x77110000, 520 OPC_XVBITSETI_B = 0x77142000, 521 OPC_XVBITSETI_H = 0x77144000, 522 OPC_XVBITSETI_W = 0x77148000, 523 OPC_XVBITSETI_D = 0x77150000, 524 OPC_XVBITREVI_B = 0x77182000, 525 OPC_XVBITREVI_H = 0x77184000, 526 OPC_XVBITREVI_W = 0x77188000, 527 OPC_XVBITREVI_D = 0x77190000, 528 OPC_XVSLLI_B = 0x772c2000, 529 OPC_XVSLLI_H = 0x772c4000, 530 OPC_XVSLLI_W = 0x772c8000, 531 OPC_XVSLLI_D = 0x772d0000, 532 OPC_XVSRLI_B = 0x77302000, 533 OPC_XVSRLI_H = 0x77304000, 534 OPC_XVSRLI_W = 0x77308000, 535 OPC_XVSRLI_D = 0x77310000, 536 OPC_XVSRAI_B = 0x77342000, 537 OPC_XVSRAI_H = 0x77344000, 538 OPC_XVSRAI_W = 0x77348000, 539 OPC_XVSRAI_D = 0x77350000, 540 OPC_XVBITSELI_B = 0x77c40000, 541 OPC_XVANDI_B = 0x77d00000, 542 OPC_XVORI_B = 0x77d40000, 543 OPC_XVXORI_B = 0x77d80000, 544 OPC_XVNORI_B = 0x77dc0000, 545 OPC_XVLDI = 0x77e00000, 546} LoongArchInsn; 547 548static int32_t __attribute__((unused)) 549encode_d_slot(LoongArchInsn opc, uint32_t d) 550{ 551 return opc | d; 552} 553 554static int32_t __attribute__((unused)) 555encode_dj_slots(LoongArchInsn opc, uint32_t d, uint32_t j) 556{ 557 return opc | d | j << 5; 558} 559 560static int32_t __attribute__((unused)) 561encode_djk_slots(LoongArchInsn opc, uint32_t d, uint32_t j, uint32_t k) 562{ 563 return opc | d | j << 5 | k << 10; 564} 565 566static int32_t __attribute__((unused)) 567encode_djka_slots(LoongArchInsn opc, uint32_t d, uint32_t j, uint32_t k, 568 uint32_t a) 569{ 570 return opc | d | j << 5 | k << 10 | a << 15; 571} 572 573static int32_t __attribute__((unused)) 574encode_djkm_slots(LoongArchInsn opc, uint32_t d, uint32_t j, uint32_t k, 575 uint32_t m) 576{ 577 return opc | d | j << 5 | k << 10 | m << 16; 578} 579 580static int32_t __attribute__((unused)) 581encode_djkn_slots(LoongArchInsn opc, uint32_t d, uint32_t j, uint32_t k, 582 uint32_t n) 583{ 584 return opc | d | j << 5 | k << 10 | n << 18; 585} 586 587static int32_t __attribute__((unused)) 588encode_dk_slots(LoongArchInsn opc, uint32_t d, uint32_t k) 589{ 590 return opc | d | k << 10; 591} 592 593static int32_t __attribute__((unused)) 594encode_dfj_insn(LoongArchInsn opc, TCGReg d, TCGReg fj) 595{ 596 tcg_debug_assert(d >= 0 && d <= 0x1f); 597 tcg_debug_assert(fj >= 0x20 && fj <= 0x3f); 598 return encode_dj_slots(opc, d, fj & 0x1f); 599} 600 601static int32_t __attribute__((unused)) 602encode_dj_insn(LoongArchInsn opc, TCGReg d, TCGReg j) 603{ 604 tcg_debug_assert(d >= 0 && d <= 0x1f); 605 tcg_debug_assert(j >= 0 && j <= 0x1f); 606 return encode_dj_slots(opc, d, j); 607} 608 609static int32_t __attribute__((unused)) 610encode_djk_insn(LoongArchInsn opc, TCGReg d, TCGReg j, TCGReg k) 611{ 612 tcg_debug_assert(d >= 0 && d <= 0x1f); 613 tcg_debug_assert(j >= 0 && j <= 0x1f); 614 tcg_debug_assert(k >= 0 && k <= 0x1f); 615 return encode_djk_slots(opc, d, j, k); 616} 617 618static int32_t __attribute__((unused)) 619encode_djsk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, int32_t sk12) 620{ 621 tcg_debug_assert(d >= 0 && d <= 0x1f); 622 tcg_debug_assert(j >= 0 && j <= 0x1f); 623 tcg_debug_assert(sk12 >= -0x800 && sk12 <= 0x7ff); 624 return encode_djk_slots(opc, d, j, sk12 & 0xfff); 625} 626 627static int32_t __attribute__((unused)) 628encode_djsk16_insn(LoongArchInsn opc, TCGReg d, TCGReg j, int32_t sk16) 629{ 630 tcg_debug_assert(d >= 0 && d <= 0x1f); 631 tcg_debug_assert(j >= 0 && j <= 0x1f); 632 tcg_debug_assert(sk16 >= -0x8000 && sk16 <= 0x7fff); 633 return encode_djk_slots(opc, d, j, sk16 & 0xffff); 634} 635 636static int32_t __attribute__((unused)) 637encode_djuk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk12) 638{ 639 tcg_debug_assert(d >= 0 && d <= 0x1f); 640 tcg_debug_assert(j >= 0 && j <= 0x1f); 641 tcg_debug_assert(uk12 <= 0xfff); 642 return encode_djk_slots(opc, d, j, uk12); 643} 644 645static int32_t __attribute__((unused)) 646encode_djuk3_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk3) 647{ 648 tcg_debug_assert(d >= 0 && d <= 0x1f); 649 tcg_debug_assert(j >= 0 && j <= 0x1f); 650 tcg_debug_assert(uk3 <= 0x7); 651 return encode_djk_slots(opc, d, j, uk3); 652} 653 654static int32_t __attribute__((unused)) 655encode_djuk4_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk4) 656{ 657 tcg_debug_assert(d >= 0 && d <= 0x1f); 658 tcg_debug_assert(j >= 0 && j <= 0x1f); 659 tcg_debug_assert(uk4 <= 0xf); 660 return encode_djk_slots(opc, d, j, uk4); 661} 662 663static int32_t __attribute__((unused)) 664encode_djuk5_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk5) 665{ 666 tcg_debug_assert(d >= 0 && d <= 0x1f); 667 tcg_debug_assert(j >= 0 && j <= 0x1f); 668 tcg_debug_assert(uk5 <= 0x1f); 669 return encode_djk_slots(opc, d, j, uk5); 670} 671 672static int32_t __attribute__((unused)) 673encode_djuk5um5_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk5, 674 uint32_t um5) 675{ 676 tcg_debug_assert(d >= 0 && d <= 0x1f); 677 tcg_debug_assert(j >= 0 && j <= 0x1f); 678 tcg_debug_assert(uk5 <= 0x1f); 679 tcg_debug_assert(um5 <= 0x1f); 680 return encode_djkm_slots(opc, d, j, uk5, um5); 681} 682 683static int32_t __attribute__((unused)) 684encode_djuk6_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk6) 685{ 686 tcg_debug_assert(d >= 0 && d <= 0x1f); 687 tcg_debug_assert(j >= 0 && j <= 0x1f); 688 tcg_debug_assert(uk6 <= 0x3f); 689 return encode_djk_slots(opc, d, j, uk6); 690} 691 692static int32_t __attribute__((unused)) 693encode_djuk6um6_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk6, 694 uint32_t um6) 695{ 696 tcg_debug_assert(d >= 0 && d <= 0x1f); 697 tcg_debug_assert(j >= 0 && j <= 0x1f); 698 tcg_debug_assert(uk6 <= 0x3f); 699 tcg_debug_assert(um6 <= 0x3f); 700 return encode_djkm_slots(opc, d, j, uk6, um6); 701} 702 703static int32_t __attribute__((unused)) 704encode_dsj20_insn(LoongArchInsn opc, TCGReg d, int32_t sj20) 705{ 706 tcg_debug_assert(d >= 0 && d <= 0x1f); 707 tcg_debug_assert(sj20 >= -0x80000 && sj20 <= 0x7ffff); 708 return encode_dj_slots(opc, d, sj20 & 0xfffff); 709} 710 711static int32_t __attribute__((unused)) 712encode_dtj_insn(LoongArchInsn opc, TCGReg d, TCGReg tj) 713{ 714 tcg_debug_assert(d >= 0 && d <= 0x1f); 715 tcg_debug_assert(tj >= 0 && tj <= 0x3); 716 return encode_dj_slots(opc, d, tj); 717} 718 719static int32_t __attribute__((unused)) 720encode_dvjuk1_insn(LoongArchInsn opc, TCGReg d, TCGReg vj, uint32_t uk1) 721{ 722 tcg_debug_assert(d >= 0 && d <= 0x1f); 723 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 724 tcg_debug_assert(uk1 <= 0x1); 725 return encode_djk_slots(opc, d, vj & 0x1f, uk1); 726} 727 728static int32_t __attribute__((unused)) 729encode_dvjuk2_insn(LoongArchInsn opc, TCGReg d, TCGReg vj, uint32_t uk2) 730{ 731 tcg_debug_assert(d >= 0 && d <= 0x1f); 732 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 733 tcg_debug_assert(uk2 <= 0x3); 734 return encode_djk_slots(opc, d, vj & 0x1f, uk2); 735} 736 737static int32_t __attribute__((unused)) 738encode_dvjuk3_insn(LoongArchInsn opc, TCGReg d, TCGReg vj, uint32_t uk3) 739{ 740 tcg_debug_assert(d >= 0 && d <= 0x1f); 741 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 742 tcg_debug_assert(uk3 <= 0x7); 743 return encode_djk_slots(opc, d, vj & 0x1f, uk3); 744} 745 746static int32_t __attribute__((unused)) 747encode_dvjuk4_insn(LoongArchInsn opc, TCGReg d, TCGReg vj, uint32_t uk4) 748{ 749 tcg_debug_assert(d >= 0 && d <= 0x1f); 750 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 751 tcg_debug_assert(uk4 <= 0xf); 752 return encode_djk_slots(opc, d, vj & 0x1f, uk4); 753} 754 755static int32_t __attribute__((unused)) 756encode_dxjuk2_insn(LoongArchInsn opc, TCGReg d, TCGReg xj, uint32_t uk2) 757{ 758 tcg_debug_assert(d >= 0 && d <= 0x1f); 759 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 760 tcg_debug_assert(uk2 <= 0x3); 761 return encode_djk_slots(opc, d, xj & 0x1f, uk2); 762} 763 764static int32_t __attribute__((unused)) 765encode_dxjuk3_insn(LoongArchInsn opc, TCGReg d, TCGReg xj, uint32_t uk3) 766{ 767 tcg_debug_assert(d >= 0 && d <= 0x1f); 768 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 769 tcg_debug_assert(uk3 <= 0x7); 770 return encode_djk_slots(opc, d, xj & 0x1f, uk3); 771} 772 773static int32_t __attribute__((unused)) 774encode_fdfj_insn(LoongArchInsn opc, TCGReg fd, TCGReg fj) 775{ 776 tcg_debug_assert(fd >= 0x20 && fd <= 0x3f); 777 tcg_debug_assert(fj >= 0x20 && fj <= 0x3f); 778 return encode_dj_slots(opc, fd & 0x1f, fj & 0x1f); 779} 780 781static int32_t __attribute__((unused)) 782encode_fdj_insn(LoongArchInsn opc, TCGReg fd, TCGReg j) 783{ 784 tcg_debug_assert(fd >= 0x20 && fd <= 0x3f); 785 tcg_debug_assert(j >= 0 && j <= 0x1f); 786 return encode_dj_slots(opc, fd & 0x1f, j); 787} 788 789static int32_t __attribute__((unused)) 790encode_fdjk_insn(LoongArchInsn opc, TCGReg fd, TCGReg j, TCGReg k) 791{ 792 tcg_debug_assert(fd >= 0x20 && fd <= 0x3f); 793 tcg_debug_assert(j >= 0 && j <= 0x1f); 794 tcg_debug_assert(k >= 0 && k <= 0x1f); 795 return encode_djk_slots(opc, fd & 0x1f, j, k); 796} 797 798static int32_t __attribute__((unused)) 799encode_fdjsk12_insn(LoongArchInsn opc, TCGReg fd, TCGReg j, int32_t sk12) 800{ 801 tcg_debug_assert(fd >= 0x20 && fd <= 0x3f); 802 tcg_debug_assert(j >= 0 && j <= 0x1f); 803 tcg_debug_assert(sk12 >= -0x800 && sk12 <= 0x7ff); 804 return encode_djk_slots(opc, fd & 0x1f, j, sk12 & 0xfff); 805} 806 807static int32_t __attribute__((unused)) 808encode_sd10k16_insn(LoongArchInsn opc, int32_t sd10k16) 809{ 810 tcg_debug_assert(sd10k16 >= -0x2000000 && sd10k16 <= 0x1ffffff); 811 return encode_dk_slots(opc, (sd10k16 >> 16) & 0x3ff, sd10k16 & 0xffff); 812} 813 814static int32_t __attribute__((unused)) 815encode_sd5k16_insn(LoongArchInsn opc, int32_t sd5k16) 816{ 817 tcg_debug_assert(sd5k16 >= -0x100000 && sd5k16 <= 0xfffff); 818 return encode_dk_slots(opc, (sd5k16 >> 16) & 0x1f, sd5k16 & 0xffff); 819} 820 821static int32_t __attribute__((unused)) 822encode_tdj_insn(LoongArchInsn opc, TCGReg td, TCGReg j) 823{ 824 tcg_debug_assert(td >= 0 && td <= 0x3); 825 tcg_debug_assert(j >= 0 && j <= 0x1f); 826 return encode_dj_slots(opc, td, j); 827} 828 829static int32_t __attribute__((unused)) 830encode_ud15_insn(LoongArchInsn opc, uint32_t ud15) 831{ 832 tcg_debug_assert(ud15 <= 0x7fff); 833 return encode_d_slot(opc, ud15); 834} 835 836static int32_t __attribute__((unused)) 837encode_vdj_insn(LoongArchInsn opc, TCGReg vd, TCGReg j) 838{ 839 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 840 tcg_debug_assert(j >= 0 && j <= 0x1f); 841 return encode_dj_slots(opc, vd & 0x1f, j); 842} 843 844static int32_t __attribute__((unused)) 845encode_vdjk_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, TCGReg k) 846{ 847 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 848 tcg_debug_assert(j >= 0 && j <= 0x1f); 849 tcg_debug_assert(k >= 0 && k <= 0x1f); 850 return encode_djk_slots(opc, vd & 0x1f, j, k); 851} 852 853static int32_t __attribute__((unused)) 854encode_vdjsk10_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk10) 855{ 856 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 857 tcg_debug_assert(j >= 0 && j <= 0x1f); 858 tcg_debug_assert(sk10 >= -0x200 && sk10 <= 0x1ff); 859 return encode_djk_slots(opc, vd & 0x1f, j, sk10 & 0x3ff); 860} 861 862static int32_t __attribute__((unused)) 863encode_vdjsk11_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk11) 864{ 865 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 866 tcg_debug_assert(j >= 0 && j <= 0x1f); 867 tcg_debug_assert(sk11 >= -0x400 && sk11 <= 0x3ff); 868 return encode_djk_slots(opc, vd & 0x1f, j, sk11 & 0x7ff); 869} 870 871static int32_t __attribute__((unused)) 872encode_vdjsk12_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk12) 873{ 874 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 875 tcg_debug_assert(j >= 0 && j <= 0x1f); 876 tcg_debug_assert(sk12 >= -0x800 && sk12 <= 0x7ff); 877 return encode_djk_slots(opc, vd & 0x1f, j, sk12 & 0xfff); 878} 879 880static int32_t __attribute__((unused)) 881encode_vdjsk8un1_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk8, 882 uint32_t un1) 883{ 884 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 885 tcg_debug_assert(j >= 0 && j <= 0x1f); 886 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f); 887 tcg_debug_assert(un1 <= 0x1); 888 return encode_djkn_slots(opc, vd & 0x1f, j, sk8 & 0xff, un1); 889} 890 891static int32_t __attribute__((unused)) 892encode_vdjsk8un2_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk8, 893 uint32_t un2) 894{ 895 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 896 tcg_debug_assert(j >= 0 && j <= 0x1f); 897 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f); 898 tcg_debug_assert(un2 <= 0x3); 899 return encode_djkn_slots(opc, vd & 0x1f, j, sk8 & 0xff, un2); 900} 901 902static int32_t __attribute__((unused)) 903encode_vdjsk8un3_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk8, 904 uint32_t un3) 905{ 906 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 907 tcg_debug_assert(j >= 0 && j <= 0x1f); 908 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f); 909 tcg_debug_assert(un3 <= 0x7); 910 return encode_djkn_slots(opc, vd & 0x1f, j, sk8 & 0xff, un3); 911} 912 913static int32_t __attribute__((unused)) 914encode_vdjsk8un4_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk8, 915 uint32_t un4) 916{ 917 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 918 tcg_debug_assert(j >= 0 && j <= 0x1f); 919 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f); 920 tcg_debug_assert(un4 <= 0xf); 921 return encode_djkn_slots(opc, vd & 0x1f, j, sk8 & 0xff, un4); 922} 923 924static int32_t __attribute__((unused)) 925encode_vdjsk9_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk9) 926{ 927 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 928 tcg_debug_assert(j >= 0 && j <= 0x1f); 929 tcg_debug_assert(sk9 >= -0x100 && sk9 <= 0xff); 930 return encode_djk_slots(opc, vd & 0x1f, j, sk9 & 0x1ff); 931} 932 933static int32_t __attribute__((unused)) 934encode_vdjuk1_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, uint32_t uk1) 935{ 936 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 937 tcg_debug_assert(j >= 0 && j <= 0x1f); 938 tcg_debug_assert(uk1 <= 0x1); 939 return encode_djk_slots(opc, vd & 0x1f, j, uk1); 940} 941 942static int32_t __attribute__((unused)) 943encode_vdjuk2_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, uint32_t uk2) 944{ 945 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 946 tcg_debug_assert(j >= 0 && j <= 0x1f); 947 tcg_debug_assert(uk2 <= 0x3); 948 return encode_djk_slots(opc, vd & 0x1f, j, uk2); 949} 950 951static int32_t __attribute__((unused)) 952encode_vdjuk3_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, uint32_t uk3) 953{ 954 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 955 tcg_debug_assert(j >= 0 && j <= 0x1f); 956 tcg_debug_assert(uk3 <= 0x7); 957 return encode_djk_slots(opc, vd & 0x1f, j, uk3); 958} 959 960static int32_t __attribute__((unused)) 961encode_vdjuk4_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, uint32_t uk4) 962{ 963 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 964 tcg_debug_assert(j >= 0 && j <= 0x1f); 965 tcg_debug_assert(uk4 <= 0xf); 966 return encode_djk_slots(opc, vd & 0x1f, j, uk4); 967} 968 969static int32_t __attribute__((unused)) 970encode_vdsj13_insn(LoongArchInsn opc, TCGReg vd, int32_t sj13) 971{ 972 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 973 tcg_debug_assert(sj13 >= -0x1000 && sj13 <= 0xfff); 974 return encode_dj_slots(opc, vd & 0x1f, sj13 & 0x1fff); 975} 976 977static int32_t __attribute__((unused)) 978encode_vdvj_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj) 979{ 980 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 981 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 982 return encode_dj_slots(opc, vd & 0x1f, vj & 0x1f); 983} 984 985static int32_t __attribute__((unused)) 986encode_vdvjk_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, TCGReg k) 987{ 988 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 989 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 990 tcg_debug_assert(k >= 0 && k <= 0x1f); 991 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, k); 992} 993 994static int32_t __attribute__((unused)) 995encode_vdvjsk5_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, int32_t sk5) 996{ 997 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 998 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 999 tcg_debug_assert(sk5 >= -0x10 && sk5 <= 0xf); 1000 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, sk5 & 0x1f); 1001} 1002 1003static int32_t __attribute__((unused)) 1004encode_vdvjuk1_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk1) 1005{ 1006 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 1007 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 1008 tcg_debug_assert(uk1 <= 0x1); 1009 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk1); 1010} 1011 1012static int32_t __attribute__((unused)) 1013encode_vdvjuk2_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk2) 1014{ 1015 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 1016 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 1017 tcg_debug_assert(uk2 <= 0x3); 1018 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk2); 1019} 1020 1021static int32_t __attribute__((unused)) 1022encode_vdvjuk3_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk3) 1023{ 1024 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 1025 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 1026 tcg_debug_assert(uk3 <= 0x7); 1027 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk3); 1028} 1029 1030static int32_t __attribute__((unused)) 1031encode_vdvjuk4_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk4) 1032{ 1033 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 1034 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 1035 tcg_debug_assert(uk4 <= 0xf); 1036 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk4); 1037} 1038 1039static int32_t __attribute__((unused)) 1040encode_vdvjuk5_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk5) 1041{ 1042 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 1043 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 1044 tcg_debug_assert(uk5 <= 0x1f); 1045 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk5); 1046} 1047 1048static int32_t __attribute__((unused)) 1049encode_vdvjuk6_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk6) 1050{ 1051 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 1052 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 1053 tcg_debug_assert(uk6 <= 0x3f); 1054 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk6); 1055} 1056 1057static int32_t __attribute__((unused)) 1058encode_vdvjuk8_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk8) 1059{ 1060 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 1061 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 1062 tcg_debug_assert(uk8 <= 0xff); 1063 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk8); 1064} 1065 1066static int32_t __attribute__((unused)) 1067encode_vdvjvk_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, TCGReg vk) 1068{ 1069 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 1070 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 1071 tcg_debug_assert(vk >= 0x20 && vk <= 0x3f); 1072 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, vk & 0x1f); 1073} 1074 1075static int32_t __attribute__((unused)) 1076encode_vdvjvkva_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, TCGReg vk, 1077 TCGReg va) 1078{ 1079 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f); 1080 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f); 1081 tcg_debug_assert(vk >= 0x20 && vk <= 0x3f); 1082 tcg_debug_assert(va >= 0x20 && va <= 0x3f); 1083 return encode_djka_slots(opc, vd & 0x1f, vj & 0x1f, vk & 0x1f, va & 0x1f); 1084} 1085 1086static int32_t __attribute__((unused)) 1087encode_xdj_insn(LoongArchInsn opc, TCGReg xd, TCGReg j) 1088{ 1089 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1090 tcg_debug_assert(j >= 0 && j <= 0x1f); 1091 return encode_dj_slots(opc, xd & 0x1f, j); 1092} 1093 1094static int32_t __attribute__((unused)) 1095encode_xdjk_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, TCGReg k) 1096{ 1097 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1098 tcg_debug_assert(j >= 0 && j <= 0x1f); 1099 tcg_debug_assert(k >= 0 && k <= 0x1f); 1100 return encode_djk_slots(opc, xd & 0x1f, j, k); 1101} 1102 1103static int32_t __attribute__((unused)) 1104encode_xdjsk10_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk10) 1105{ 1106 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1107 tcg_debug_assert(j >= 0 && j <= 0x1f); 1108 tcg_debug_assert(sk10 >= -0x200 && sk10 <= 0x1ff); 1109 return encode_djk_slots(opc, xd & 0x1f, j, sk10 & 0x3ff); 1110} 1111 1112static int32_t __attribute__((unused)) 1113encode_xdjsk11_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk11) 1114{ 1115 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1116 tcg_debug_assert(j >= 0 && j <= 0x1f); 1117 tcg_debug_assert(sk11 >= -0x400 && sk11 <= 0x3ff); 1118 return encode_djk_slots(opc, xd & 0x1f, j, sk11 & 0x7ff); 1119} 1120 1121static int32_t __attribute__((unused)) 1122encode_xdjsk12_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk12) 1123{ 1124 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1125 tcg_debug_assert(j >= 0 && j <= 0x1f); 1126 tcg_debug_assert(sk12 >= -0x800 && sk12 <= 0x7ff); 1127 return encode_djk_slots(opc, xd & 0x1f, j, sk12 & 0xfff); 1128} 1129 1130static int32_t __attribute__((unused)) 1131encode_xdjsk8un2_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk8, 1132 uint32_t un2) 1133{ 1134 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1135 tcg_debug_assert(j >= 0 && j <= 0x1f); 1136 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f); 1137 tcg_debug_assert(un2 <= 0x3); 1138 return encode_djkn_slots(opc, xd & 0x1f, j, sk8 & 0xff, un2); 1139} 1140 1141static int32_t __attribute__((unused)) 1142encode_xdjsk8un3_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk8, 1143 uint32_t un3) 1144{ 1145 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1146 tcg_debug_assert(j >= 0 && j <= 0x1f); 1147 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f); 1148 tcg_debug_assert(un3 <= 0x7); 1149 return encode_djkn_slots(opc, xd & 0x1f, j, sk8 & 0xff, un3); 1150} 1151 1152static int32_t __attribute__((unused)) 1153encode_xdjsk8un4_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk8, 1154 uint32_t un4) 1155{ 1156 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1157 tcg_debug_assert(j >= 0 && j <= 0x1f); 1158 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f); 1159 tcg_debug_assert(un4 <= 0xf); 1160 return encode_djkn_slots(opc, xd & 0x1f, j, sk8 & 0xff, un4); 1161} 1162 1163static int32_t __attribute__((unused)) 1164encode_xdjsk8un5_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk8, 1165 uint32_t un5) 1166{ 1167 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1168 tcg_debug_assert(j >= 0 && j <= 0x1f); 1169 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f); 1170 tcg_debug_assert(un5 <= 0x1f); 1171 return encode_djkn_slots(opc, xd & 0x1f, j, sk8 & 0xff, un5); 1172} 1173 1174static int32_t __attribute__((unused)) 1175encode_xdjsk9_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk9) 1176{ 1177 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1178 tcg_debug_assert(j >= 0 && j <= 0x1f); 1179 tcg_debug_assert(sk9 >= -0x100 && sk9 <= 0xff); 1180 return encode_djk_slots(opc, xd & 0x1f, j, sk9 & 0x1ff); 1181} 1182 1183static int32_t __attribute__((unused)) 1184encode_xdjuk2_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, uint32_t uk2) 1185{ 1186 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1187 tcg_debug_assert(j >= 0 && j <= 0x1f); 1188 tcg_debug_assert(uk2 <= 0x3); 1189 return encode_djk_slots(opc, xd & 0x1f, j, uk2); 1190} 1191 1192static int32_t __attribute__((unused)) 1193encode_xdjuk3_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, uint32_t uk3) 1194{ 1195 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1196 tcg_debug_assert(j >= 0 && j <= 0x1f); 1197 tcg_debug_assert(uk3 <= 0x7); 1198 return encode_djk_slots(opc, xd & 0x1f, j, uk3); 1199} 1200 1201static int32_t __attribute__((unused)) 1202encode_xdsj13_insn(LoongArchInsn opc, TCGReg xd, int32_t sj13) 1203{ 1204 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1205 tcg_debug_assert(sj13 >= -0x1000 && sj13 <= 0xfff); 1206 return encode_dj_slots(opc, xd & 0x1f, sj13 & 0x1fff); 1207} 1208 1209static int32_t __attribute__((unused)) 1210encode_xdxj_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj) 1211{ 1212 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1213 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 1214 return encode_dj_slots(opc, xd & 0x1f, xj & 0x1f); 1215} 1216 1217static int32_t __attribute__((unused)) 1218encode_xdxjk_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, TCGReg k) 1219{ 1220 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1221 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 1222 tcg_debug_assert(k >= 0 && k <= 0x1f); 1223 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, k); 1224} 1225 1226static int32_t __attribute__((unused)) 1227encode_xdxjsk5_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, int32_t sk5) 1228{ 1229 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1230 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 1231 tcg_debug_assert(sk5 >= -0x10 && sk5 <= 0xf); 1232 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, sk5 & 0x1f); 1233} 1234 1235static int32_t __attribute__((unused)) 1236encode_xdxjuk1_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk1) 1237{ 1238 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1239 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 1240 tcg_debug_assert(uk1 <= 0x1); 1241 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk1); 1242} 1243 1244static int32_t __attribute__((unused)) 1245encode_xdxjuk2_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk2) 1246{ 1247 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1248 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 1249 tcg_debug_assert(uk2 <= 0x3); 1250 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk2); 1251} 1252 1253static int32_t __attribute__((unused)) 1254encode_xdxjuk3_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk3) 1255{ 1256 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1257 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 1258 tcg_debug_assert(uk3 <= 0x7); 1259 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk3); 1260} 1261 1262static int32_t __attribute__((unused)) 1263encode_xdxjuk4_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk4) 1264{ 1265 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1266 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 1267 tcg_debug_assert(uk4 <= 0xf); 1268 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk4); 1269} 1270 1271static int32_t __attribute__((unused)) 1272encode_xdxjuk5_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk5) 1273{ 1274 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1275 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 1276 tcg_debug_assert(uk5 <= 0x1f); 1277 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk5); 1278} 1279 1280static int32_t __attribute__((unused)) 1281encode_xdxjuk6_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk6) 1282{ 1283 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1284 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 1285 tcg_debug_assert(uk6 <= 0x3f); 1286 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk6); 1287} 1288 1289static int32_t __attribute__((unused)) 1290encode_xdxjuk8_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk8) 1291{ 1292 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1293 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 1294 tcg_debug_assert(uk8 <= 0xff); 1295 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk8); 1296} 1297 1298static int32_t __attribute__((unused)) 1299encode_xdxjxk_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, TCGReg xk) 1300{ 1301 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1302 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 1303 tcg_debug_assert(xk >= 0x20 && xk <= 0x3f); 1304 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, xk & 0x1f); 1305} 1306 1307static int32_t __attribute__((unused)) 1308encode_xdxjxkxa_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, TCGReg xk, 1309 TCGReg xa) 1310{ 1311 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f); 1312 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f); 1313 tcg_debug_assert(xk >= 0x20 && xk <= 0x3f); 1314 tcg_debug_assert(xa >= 0x20 && xa <= 0x3f); 1315 return encode_djka_slots(opc, xd & 0x1f, xj & 0x1f, xk & 0x1f, xa & 0x1f); 1316} 1317 1318/* Emits the `movgr2scr td, j` instruction. */ 1319static void __attribute__((unused)) 1320tcg_out_opc_movgr2scr(TCGContext *s, TCGReg td, TCGReg j) 1321{ 1322 tcg_out32(s, encode_tdj_insn(OPC_MOVGR2SCR, td, j)); 1323} 1324 1325/* Emits the `movscr2gr d, tj` instruction. */ 1326static void __attribute__((unused)) 1327tcg_out_opc_movscr2gr(TCGContext *s, TCGReg d, TCGReg tj) 1328{ 1329 tcg_out32(s, encode_dtj_insn(OPC_MOVSCR2GR, d, tj)); 1330} 1331 1332/* Emits the `clz.w d, j` instruction. */ 1333static void __attribute__((unused)) 1334tcg_out_opc_clz_w(TCGContext *s, TCGReg d, TCGReg j) 1335{ 1336 tcg_out32(s, encode_dj_insn(OPC_CLZ_W, d, j)); 1337} 1338 1339/* Emits the `ctz.w d, j` instruction. */ 1340static void __attribute__((unused)) 1341tcg_out_opc_ctz_w(TCGContext *s, TCGReg d, TCGReg j) 1342{ 1343 tcg_out32(s, encode_dj_insn(OPC_CTZ_W, d, j)); 1344} 1345 1346/* Emits the `clz.d d, j` instruction. */ 1347static void __attribute__((unused)) 1348tcg_out_opc_clz_d(TCGContext *s, TCGReg d, TCGReg j) 1349{ 1350 tcg_out32(s, encode_dj_insn(OPC_CLZ_D, d, j)); 1351} 1352 1353/* Emits the `ctz.d d, j` instruction. */ 1354static void __attribute__((unused)) 1355tcg_out_opc_ctz_d(TCGContext *s, TCGReg d, TCGReg j) 1356{ 1357 tcg_out32(s, encode_dj_insn(OPC_CTZ_D, d, j)); 1358} 1359 1360/* Emits the `revb.2h d, j` instruction. */ 1361static void __attribute__((unused)) 1362tcg_out_opc_revb_2h(TCGContext *s, TCGReg d, TCGReg j) 1363{ 1364 tcg_out32(s, encode_dj_insn(OPC_REVB_2H, d, j)); 1365} 1366 1367/* Emits the `revb.2w d, j` instruction. */ 1368static void __attribute__((unused)) 1369tcg_out_opc_revb_2w(TCGContext *s, TCGReg d, TCGReg j) 1370{ 1371 tcg_out32(s, encode_dj_insn(OPC_REVB_2W, d, j)); 1372} 1373 1374/* Emits the `revb.d d, j` instruction. */ 1375static void __attribute__((unused)) 1376tcg_out_opc_revb_d(TCGContext *s, TCGReg d, TCGReg j) 1377{ 1378 tcg_out32(s, encode_dj_insn(OPC_REVB_D, d, j)); 1379} 1380 1381/* Emits the `sext.h d, j` instruction. */ 1382static void __attribute__((unused)) 1383tcg_out_opc_sext_h(TCGContext *s, TCGReg d, TCGReg j) 1384{ 1385 tcg_out32(s, encode_dj_insn(OPC_SEXT_H, d, j)); 1386} 1387 1388/* Emits the `sext.b d, j` instruction. */ 1389static void __attribute__((unused)) 1390tcg_out_opc_sext_b(TCGContext *s, TCGReg d, TCGReg j) 1391{ 1392 tcg_out32(s, encode_dj_insn(OPC_SEXT_B, d, j)); 1393} 1394 1395/* Emits the `add.w d, j, k` instruction. */ 1396static void __attribute__((unused)) 1397tcg_out_opc_add_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1398{ 1399 tcg_out32(s, encode_djk_insn(OPC_ADD_W, d, j, k)); 1400} 1401 1402/* Emits the `add.d d, j, k` instruction. */ 1403static void __attribute__((unused)) 1404tcg_out_opc_add_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1405{ 1406 tcg_out32(s, encode_djk_insn(OPC_ADD_D, d, j, k)); 1407} 1408 1409/* Emits the `sub.w d, j, k` instruction. */ 1410static void __attribute__((unused)) 1411tcg_out_opc_sub_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1412{ 1413 tcg_out32(s, encode_djk_insn(OPC_SUB_W, d, j, k)); 1414} 1415 1416/* Emits the `sub.d d, j, k` instruction. */ 1417static void __attribute__((unused)) 1418tcg_out_opc_sub_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1419{ 1420 tcg_out32(s, encode_djk_insn(OPC_SUB_D, d, j, k)); 1421} 1422 1423/* Emits the `slt d, j, k` instruction. */ 1424static void __attribute__((unused)) 1425tcg_out_opc_slt(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1426{ 1427 tcg_out32(s, encode_djk_insn(OPC_SLT, d, j, k)); 1428} 1429 1430/* Emits the `sltu d, j, k` instruction. */ 1431static void __attribute__((unused)) 1432tcg_out_opc_sltu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1433{ 1434 tcg_out32(s, encode_djk_insn(OPC_SLTU, d, j, k)); 1435} 1436 1437/* Emits the `maskeqz d, j, k` instruction. */ 1438static void __attribute__((unused)) 1439tcg_out_opc_maskeqz(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1440{ 1441 tcg_out32(s, encode_djk_insn(OPC_MASKEQZ, d, j, k)); 1442} 1443 1444/* Emits the `masknez d, j, k` instruction. */ 1445static void __attribute__((unused)) 1446tcg_out_opc_masknez(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1447{ 1448 tcg_out32(s, encode_djk_insn(OPC_MASKNEZ, d, j, k)); 1449} 1450 1451/* Emits the `nor d, j, k` instruction. */ 1452static void __attribute__((unused)) 1453tcg_out_opc_nor(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1454{ 1455 tcg_out32(s, encode_djk_insn(OPC_NOR, d, j, k)); 1456} 1457 1458/* Emits the `and d, j, k` instruction. */ 1459static void __attribute__((unused)) 1460tcg_out_opc_and(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1461{ 1462 tcg_out32(s, encode_djk_insn(OPC_AND, d, j, k)); 1463} 1464 1465/* Emits the `or d, j, k` instruction. */ 1466static void __attribute__((unused)) 1467tcg_out_opc_or(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1468{ 1469 tcg_out32(s, encode_djk_insn(OPC_OR, d, j, k)); 1470} 1471 1472/* Emits the `xor d, j, k` instruction. */ 1473static void __attribute__((unused)) 1474tcg_out_opc_xor(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1475{ 1476 tcg_out32(s, encode_djk_insn(OPC_XOR, d, j, k)); 1477} 1478 1479/* Emits the `orn d, j, k` instruction. */ 1480static void __attribute__((unused)) 1481tcg_out_opc_orn(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1482{ 1483 tcg_out32(s, encode_djk_insn(OPC_ORN, d, j, k)); 1484} 1485 1486/* Emits the `andn d, j, k` instruction. */ 1487static void __attribute__((unused)) 1488tcg_out_opc_andn(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1489{ 1490 tcg_out32(s, encode_djk_insn(OPC_ANDN, d, j, k)); 1491} 1492 1493/* Emits the `sll.w d, j, k` instruction. */ 1494static void __attribute__((unused)) 1495tcg_out_opc_sll_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1496{ 1497 tcg_out32(s, encode_djk_insn(OPC_SLL_W, d, j, k)); 1498} 1499 1500/* Emits the `srl.w d, j, k` instruction. */ 1501static void __attribute__((unused)) 1502tcg_out_opc_srl_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1503{ 1504 tcg_out32(s, encode_djk_insn(OPC_SRL_W, d, j, k)); 1505} 1506 1507/* Emits the `sra.w d, j, k` instruction. */ 1508static void __attribute__((unused)) 1509tcg_out_opc_sra_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1510{ 1511 tcg_out32(s, encode_djk_insn(OPC_SRA_W, d, j, k)); 1512} 1513 1514/* Emits the `sll.d d, j, k` instruction. */ 1515static void __attribute__((unused)) 1516tcg_out_opc_sll_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1517{ 1518 tcg_out32(s, encode_djk_insn(OPC_SLL_D, d, j, k)); 1519} 1520 1521/* Emits the `srl.d d, j, k` instruction. */ 1522static void __attribute__((unused)) 1523tcg_out_opc_srl_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1524{ 1525 tcg_out32(s, encode_djk_insn(OPC_SRL_D, d, j, k)); 1526} 1527 1528/* Emits the `sra.d d, j, k` instruction. */ 1529static void __attribute__((unused)) 1530tcg_out_opc_sra_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1531{ 1532 tcg_out32(s, encode_djk_insn(OPC_SRA_D, d, j, k)); 1533} 1534 1535/* Emits the `rotr.b d, j, k` instruction. */ 1536static void __attribute__((unused)) 1537tcg_out_opc_rotr_b(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1538{ 1539 tcg_out32(s, encode_djk_insn(OPC_ROTR_B, d, j, k)); 1540} 1541 1542/* Emits the `rotr.h d, j, k` instruction. */ 1543static void __attribute__((unused)) 1544tcg_out_opc_rotr_h(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1545{ 1546 tcg_out32(s, encode_djk_insn(OPC_ROTR_H, d, j, k)); 1547} 1548 1549/* Emits the `rotr.w d, j, k` instruction. */ 1550static void __attribute__((unused)) 1551tcg_out_opc_rotr_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1552{ 1553 tcg_out32(s, encode_djk_insn(OPC_ROTR_W, d, j, k)); 1554} 1555 1556/* Emits the `rotr.d d, j, k` instruction. */ 1557static void __attribute__((unused)) 1558tcg_out_opc_rotr_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1559{ 1560 tcg_out32(s, encode_djk_insn(OPC_ROTR_D, d, j, k)); 1561} 1562 1563/* Emits the `mul.w d, j, k` instruction. */ 1564static void __attribute__((unused)) 1565tcg_out_opc_mul_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1566{ 1567 tcg_out32(s, encode_djk_insn(OPC_MUL_W, d, j, k)); 1568} 1569 1570/* Emits the `mulh.w d, j, k` instruction. */ 1571static void __attribute__((unused)) 1572tcg_out_opc_mulh_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1573{ 1574 tcg_out32(s, encode_djk_insn(OPC_MULH_W, d, j, k)); 1575} 1576 1577/* Emits the `mulh.wu d, j, k` instruction. */ 1578static void __attribute__((unused)) 1579tcg_out_opc_mulh_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1580{ 1581 tcg_out32(s, encode_djk_insn(OPC_MULH_WU, d, j, k)); 1582} 1583 1584/* Emits the `mul.d d, j, k` instruction. */ 1585static void __attribute__((unused)) 1586tcg_out_opc_mul_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1587{ 1588 tcg_out32(s, encode_djk_insn(OPC_MUL_D, d, j, k)); 1589} 1590 1591/* Emits the `mulh.d d, j, k` instruction. */ 1592static void __attribute__((unused)) 1593tcg_out_opc_mulh_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1594{ 1595 tcg_out32(s, encode_djk_insn(OPC_MULH_D, d, j, k)); 1596} 1597 1598/* Emits the `mulh.du d, j, k` instruction. */ 1599static void __attribute__((unused)) 1600tcg_out_opc_mulh_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1601{ 1602 tcg_out32(s, encode_djk_insn(OPC_MULH_DU, d, j, k)); 1603} 1604 1605/* Emits the `div.w d, j, k` instruction. */ 1606static void __attribute__((unused)) 1607tcg_out_opc_div_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1608{ 1609 tcg_out32(s, encode_djk_insn(OPC_DIV_W, d, j, k)); 1610} 1611 1612/* Emits the `mod.w d, j, k` instruction. */ 1613static void __attribute__((unused)) 1614tcg_out_opc_mod_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1615{ 1616 tcg_out32(s, encode_djk_insn(OPC_MOD_W, d, j, k)); 1617} 1618 1619/* Emits the `div.wu d, j, k` instruction. */ 1620static void __attribute__((unused)) 1621tcg_out_opc_div_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1622{ 1623 tcg_out32(s, encode_djk_insn(OPC_DIV_WU, d, j, k)); 1624} 1625 1626/* Emits the `mod.wu d, j, k` instruction. */ 1627static void __attribute__((unused)) 1628tcg_out_opc_mod_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1629{ 1630 tcg_out32(s, encode_djk_insn(OPC_MOD_WU, d, j, k)); 1631} 1632 1633/* Emits the `div.d d, j, k` instruction. */ 1634static void __attribute__((unused)) 1635tcg_out_opc_div_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1636{ 1637 tcg_out32(s, encode_djk_insn(OPC_DIV_D, d, j, k)); 1638} 1639 1640/* Emits the `mod.d d, j, k` instruction. */ 1641static void __attribute__((unused)) 1642tcg_out_opc_mod_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1643{ 1644 tcg_out32(s, encode_djk_insn(OPC_MOD_D, d, j, k)); 1645} 1646 1647/* Emits the `div.du d, j, k` instruction. */ 1648static void __attribute__((unused)) 1649tcg_out_opc_div_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1650{ 1651 tcg_out32(s, encode_djk_insn(OPC_DIV_DU, d, j, k)); 1652} 1653 1654/* Emits the `mod.du d, j, k` instruction. */ 1655static void __attribute__((unused)) 1656tcg_out_opc_mod_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 1657{ 1658 tcg_out32(s, encode_djk_insn(OPC_MOD_DU, d, j, k)); 1659} 1660 1661/* Emits the `slli.w d, j, uk5` instruction. */ 1662static void __attribute__((unused)) 1663tcg_out_opc_slli_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5) 1664{ 1665 tcg_out32(s, encode_djuk5_insn(OPC_SLLI_W, d, j, uk5)); 1666} 1667 1668/* Emits the `slli.d d, j, uk6` instruction. */ 1669static void __attribute__((unused)) 1670tcg_out_opc_slli_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6) 1671{ 1672 tcg_out32(s, encode_djuk6_insn(OPC_SLLI_D, d, j, uk6)); 1673} 1674 1675/* Emits the `srli.w d, j, uk5` instruction. */ 1676static void __attribute__((unused)) 1677tcg_out_opc_srli_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5) 1678{ 1679 tcg_out32(s, encode_djuk5_insn(OPC_SRLI_W, d, j, uk5)); 1680} 1681 1682/* Emits the `srli.d d, j, uk6` instruction. */ 1683static void __attribute__((unused)) 1684tcg_out_opc_srli_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6) 1685{ 1686 tcg_out32(s, encode_djuk6_insn(OPC_SRLI_D, d, j, uk6)); 1687} 1688 1689/* Emits the `srai.w d, j, uk5` instruction. */ 1690static void __attribute__((unused)) 1691tcg_out_opc_srai_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5) 1692{ 1693 tcg_out32(s, encode_djuk5_insn(OPC_SRAI_W, d, j, uk5)); 1694} 1695 1696/* Emits the `srai.d d, j, uk6` instruction. */ 1697static void __attribute__((unused)) 1698tcg_out_opc_srai_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6) 1699{ 1700 tcg_out32(s, encode_djuk6_insn(OPC_SRAI_D, d, j, uk6)); 1701} 1702 1703/* Emits the `rotri.b d, j, uk3` instruction. */ 1704static void __attribute__((unused)) 1705tcg_out_opc_rotri_b(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk3) 1706{ 1707 tcg_out32(s, encode_djuk3_insn(OPC_ROTRI_B, d, j, uk3)); 1708} 1709 1710/* Emits the `rotri.h d, j, uk4` instruction. */ 1711static void __attribute__((unused)) 1712tcg_out_opc_rotri_h(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk4) 1713{ 1714 tcg_out32(s, encode_djuk4_insn(OPC_ROTRI_H, d, j, uk4)); 1715} 1716 1717/* Emits the `rotri.w d, j, uk5` instruction. */ 1718static void __attribute__((unused)) 1719tcg_out_opc_rotri_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5) 1720{ 1721 tcg_out32(s, encode_djuk5_insn(OPC_ROTRI_W, d, j, uk5)); 1722} 1723 1724/* Emits the `rotri.d d, j, uk6` instruction. */ 1725static void __attribute__((unused)) 1726tcg_out_opc_rotri_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6) 1727{ 1728 tcg_out32(s, encode_djuk6_insn(OPC_ROTRI_D, d, j, uk6)); 1729} 1730 1731/* Emits the `bstrins.w d, j, uk5, um5` instruction. */ 1732static void __attribute__((unused)) 1733tcg_out_opc_bstrins_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5, 1734 uint32_t um5) 1735{ 1736 tcg_out32(s, encode_djuk5um5_insn(OPC_BSTRINS_W, d, j, uk5, um5)); 1737} 1738 1739/* Emits the `bstrpick.w d, j, uk5, um5` instruction. */ 1740static void __attribute__((unused)) 1741tcg_out_opc_bstrpick_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5, 1742 uint32_t um5) 1743{ 1744 tcg_out32(s, encode_djuk5um5_insn(OPC_BSTRPICK_W, d, j, uk5, um5)); 1745} 1746 1747/* Emits the `bstrins.d d, j, uk6, um6` instruction. */ 1748static void __attribute__((unused)) 1749tcg_out_opc_bstrins_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6, 1750 uint32_t um6) 1751{ 1752 tcg_out32(s, encode_djuk6um6_insn(OPC_BSTRINS_D, d, j, uk6, um6)); 1753} 1754 1755/* Emits the `bstrpick.d d, j, uk6, um6` instruction. */ 1756static void __attribute__((unused)) 1757tcg_out_opc_bstrpick_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6, 1758 uint32_t um6) 1759{ 1760 tcg_out32(s, encode_djuk6um6_insn(OPC_BSTRPICK_D, d, j, uk6, um6)); 1761} 1762 1763/* Emits the `fmov.d fd, fj` instruction. */ 1764static void __attribute__((unused)) 1765tcg_out_opc_fmov_d(TCGContext *s, TCGReg fd, TCGReg fj) 1766{ 1767 tcg_out32(s, encode_fdfj_insn(OPC_FMOV_D, fd, fj)); 1768} 1769 1770/* Emits the `movgr2fr.d fd, j` instruction. */ 1771static void __attribute__((unused)) 1772tcg_out_opc_movgr2fr_d(TCGContext *s, TCGReg fd, TCGReg j) 1773{ 1774 tcg_out32(s, encode_fdj_insn(OPC_MOVGR2FR_D, fd, j)); 1775} 1776 1777/* Emits the `movfr2gr.d d, fj` instruction. */ 1778static void __attribute__((unused)) 1779tcg_out_opc_movfr2gr_d(TCGContext *s, TCGReg d, TCGReg fj) 1780{ 1781 tcg_out32(s, encode_dfj_insn(OPC_MOVFR2GR_D, d, fj)); 1782} 1783 1784/* Emits the `slti d, j, sk12` instruction. */ 1785static void __attribute__((unused)) 1786tcg_out_opc_slti(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1787{ 1788 tcg_out32(s, encode_djsk12_insn(OPC_SLTI, d, j, sk12)); 1789} 1790 1791/* Emits the `sltui d, j, sk12` instruction. */ 1792static void __attribute__((unused)) 1793tcg_out_opc_sltui(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1794{ 1795 tcg_out32(s, encode_djsk12_insn(OPC_SLTUI, d, j, sk12)); 1796} 1797 1798/* Emits the `addi.w d, j, sk12` instruction. */ 1799static void __attribute__((unused)) 1800tcg_out_opc_addi_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1801{ 1802 tcg_out32(s, encode_djsk12_insn(OPC_ADDI_W, d, j, sk12)); 1803} 1804 1805/* Emits the `addi.d d, j, sk12` instruction. */ 1806static void __attribute__((unused)) 1807tcg_out_opc_addi_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1808{ 1809 tcg_out32(s, encode_djsk12_insn(OPC_ADDI_D, d, j, sk12)); 1810} 1811 1812/* Emits the `cu52i.d d, j, sk12` instruction. */ 1813static void __attribute__((unused)) 1814tcg_out_opc_cu52i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1815{ 1816 tcg_out32(s, encode_djsk12_insn(OPC_CU52I_D, d, j, sk12)); 1817} 1818 1819/* Emits the `andi d, j, uk12` instruction. */ 1820static void __attribute__((unused)) 1821tcg_out_opc_andi(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12) 1822{ 1823 tcg_out32(s, encode_djuk12_insn(OPC_ANDI, d, j, uk12)); 1824} 1825 1826/* Emits the `ori d, j, uk12` instruction. */ 1827static void __attribute__((unused)) 1828tcg_out_opc_ori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12) 1829{ 1830 tcg_out32(s, encode_djuk12_insn(OPC_ORI, d, j, uk12)); 1831} 1832 1833/* Emits the `xori d, j, uk12` instruction. */ 1834static void __attribute__((unused)) 1835tcg_out_opc_xori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12) 1836{ 1837 tcg_out32(s, encode_djuk12_insn(OPC_XORI, d, j, uk12)); 1838} 1839 1840/* Emits the `vbitsel.v vd, vj, vk, va` instruction. */ 1841static void __attribute__((unused)) 1842tcg_out_opc_vbitsel_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va) 1843{ 1844 tcg_out32(s, encode_vdvjvkva_insn(OPC_VBITSEL_V, vd, vj, vk, va)); 1845} 1846 1847/* Emits the `xvbitsel.v xd, xj, xk, xa` instruction. */ 1848static void __attribute__((unused)) 1849tcg_out_opc_xvbitsel_v(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk, 1850 TCGReg xa) 1851{ 1852 tcg_out32(s, encode_xdxjxkxa_insn(OPC_XVBITSEL_V, xd, xj, xk, xa)); 1853} 1854 1855/* Emits the `vshuf.b vd, vj, vk, va` instruction. */ 1856static void __attribute__((unused)) 1857tcg_out_opc_vshuf_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va) 1858{ 1859 tcg_out32(s, encode_vdvjvkva_insn(OPC_VSHUF_B, vd, vj, vk, va)); 1860} 1861 1862/* Emits the `xvshuf.b xd, xj, xk, xa` instruction. */ 1863static void __attribute__((unused)) 1864tcg_out_opc_xvshuf_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk, TCGReg xa) 1865{ 1866 tcg_out32(s, encode_xdxjxkxa_insn(OPC_XVSHUF_B, xd, xj, xk, xa)); 1867} 1868 1869/* Emits the `addu16i.d d, j, sk16` instruction. */ 1870static void __attribute__((unused)) 1871tcg_out_opc_addu16i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) 1872{ 1873 tcg_out32(s, encode_djsk16_insn(OPC_ADDU16I_D, d, j, sk16)); 1874} 1875 1876/* Emits the `lu12i.w d, sj20` instruction. */ 1877static void __attribute__((unused)) 1878tcg_out_opc_lu12i_w(TCGContext *s, TCGReg d, int32_t sj20) 1879{ 1880 tcg_out32(s, encode_dsj20_insn(OPC_LU12I_W, d, sj20)); 1881} 1882 1883/* Emits the `cu32i.d d, sj20` instruction. */ 1884static void __attribute__((unused)) 1885tcg_out_opc_cu32i_d(TCGContext *s, TCGReg d, int32_t sj20) 1886{ 1887 tcg_out32(s, encode_dsj20_insn(OPC_CU32I_D, d, sj20)); 1888} 1889 1890/* Emits the `pcaddu2i d, sj20` instruction. */ 1891static void __attribute__((unused)) 1892tcg_out_opc_pcaddu2i(TCGContext *s, TCGReg d, int32_t sj20) 1893{ 1894 tcg_out32(s, encode_dsj20_insn(OPC_PCADDU2I, d, sj20)); 1895} 1896 1897/* Emits the `pcalau12i d, sj20` instruction. */ 1898static void __attribute__((unused)) 1899tcg_out_opc_pcalau12i(TCGContext *s, TCGReg d, int32_t sj20) 1900{ 1901 tcg_out32(s, encode_dsj20_insn(OPC_PCALAU12I, d, sj20)); 1902} 1903 1904/* Emits the `pcaddu12i d, sj20` instruction. */ 1905static void __attribute__((unused)) 1906tcg_out_opc_pcaddu12i(TCGContext *s, TCGReg d, int32_t sj20) 1907{ 1908 tcg_out32(s, encode_dsj20_insn(OPC_PCADDU12I, d, sj20)); 1909} 1910 1911/* Emits the `pcaddu18i d, sj20` instruction. */ 1912static void __attribute__((unused)) 1913tcg_out_opc_pcaddu18i(TCGContext *s, TCGReg d, int32_t sj20) 1914{ 1915 tcg_out32(s, encode_dsj20_insn(OPC_PCADDU18I, d, sj20)); 1916} 1917 1918/* Emits the `ld.b d, j, sk12` instruction. */ 1919static void __attribute__((unused)) 1920tcg_out_opc_ld_b(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1921{ 1922 tcg_out32(s, encode_djsk12_insn(OPC_LD_B, d, j, sk12)); 1923} 1924 1925/* Emits the `ld.h d, j, sk12` instruction. */ 1926static void __attribute__((unused)) 1927tcg_out_opc_ld_h(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1928{ 1929 tcg_out32(s, encode_djsk12_insn(OPC_LD_H, d, j, sk12)); 1930} 1931 1932/* Emits the `ld.w d, j, sk12` instruction. */ 1933static void __attribute__((unused)) 1934tcg_out_opc_ld_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1935{ 1936 tcg_out32(s, encode_djsk12_insn(OPC_LD_W, d, j, sk12)); 1937} 1938 1939/* Emits the `ld.d d, j, sk12` instruction. */ 1940static void __attribute__((unused)) 1941tcg_out_opc_ld_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1942{ 1943 tcg_out32(s, encode_djsk12_insn(OPC_LD_D, d, j, sk12)); 1944} 1945 1946/* Emits the `st.b d, j, sk12` instruction. */ 1947static void __attribute__((unused)) 1948tcg_out_opc_st_b(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1949{ 1950 tcg_out32(s, encode_djsk12_insn(OPC_ST_B, d, j, sk12)); 1951} 1952 1953/* Emits the `st.h d, j, sk12` instruction. */ 1954static void __attribute__((unused)) 1955tcg_out_opc_st_h(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1956{ 1957 tcg_out32(s, encode_djsk12_insn(OPC_ST_H, d, j, sk12)); 1958} 1959 1960/* Emits the `st.w d, j, sk12` instruction. */ 1961static void __attribute__((unused)) 1962tcg_out_opc_st_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1963{ 1964 tcg_out32(s, encode_djsk12_insn(OPC_ST_W, d, j, sk12)); 1965} 1966 1967/* Emits the `st.d d, j, sk12` instruction. */ 1968static void __attribute__((unused)) 1969tcg_out_opc_st_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1970{ 1971 tcg_out32(s, encode_djsk12_insn(OPC_ST_D, d, j, sk12)); 1972} 1973 1974/* Emits the `ld.bu d, j, sk12` instruction. */ 1975static void __attribute__((unused)) 1976tcg_out_opc_ld_bu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1977{ 1978 tcg_out32(s, encode_djsk12_insn(OPC_LD_BU, d, j, sk12)); 1979} 1980 1981/* Emits the `ld.hu d, j, sk12` instruction. */ 1982static void __attribute__((unused)) 1983tcg_out_opc_ld_hu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1984{ 1985 tcg_out32(s, encode_djsk12_insn(OPC_LD_HU, d, j, sk12)); 1986} 1987 1988/* Emits the `ld.wu d, j, sk12` instruction. */ 1989static void __attribute__((unused)) 1990tcg_out_opc_ld_wu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) 1991{ 1992 tcg_out32(s, encode_djsk12_insn(OPC_LD_WU, d, j, sk12)); 1993} 1994 1995/* Emits the `fld.s fd, j, sk12` instruction. */ 1996static void __attribute__((unused)) 1997tcg_out_opc_fld_s(TCGContext *s, TCGReg fd, TCGReg j, int32_t sk12) 1998{ 1999 tcg_out32(s, encode_fdjsk12_insn(OPC_FLD_S, fd, j, sk12)); 2000} 2001 2002/* Emits the `fst.s fd, j, sk12` instruction. */ 2003static void __attribute__((unused)) 2004tcg_out_opc_fst_s(TCGContext *s, TCGReg fd, TCGReg j, int32_t sk12) 2005{ 2006 tcg_out32(s, encode_fdjsk12_insn(OPC_FST_S, fd, j, sk12)); 2007} 2008 2009/* Emits the `fld.d fd, j, sk12` instruction. */ 2010static void __attribute__((unused)) 2011tcg_out_opc_fld_d(TCGContext *s, TCGReg fd, TCGReg j, int32_t sk12) 2012{ 2013 tcg_out32(s, encode_fdjsk12_insn(OPC_FLD_D, fd, j, sk12)); 2014} 2015 2016/* Emits the `fst.d fd, j, sk12` instruction. */ 2017static void __attribute__((unused)) 2018tcg_out_opc_fst_d(TCGContext *s, TCGReg fd, TCGReg j, int32_t sk12) 2019{ 2020 tcg_out32(s, encode_fdjsk12_insn(OPC_FST_D, fd, j, sk12)); 2021} 2022 2023/* Emits the `vld vd, j, sk12` instruction. */ 2024static void __attribute__((unused)) 2025tcg_out_opc_vld(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk12) 2026{ 2027 tcg_out32(s, encode_vdjsk12_insn(OPC_VLD, vd, j, sk12)); 2028} 2029 2030/* Emits the `vst vd, j, sk12` instruction. */ 2031static void __attribute__((unused)) 2032tcg_out_opc_vst(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk12) 2033{ 2034 tcg_out32(s, encode_vdjsk12_insn(OPC_VST, vd, j, sk12)); 2035} 2036 2037/* Emits the `xvld xd, j, sk12` instruction. */ 2038static void __attribute__((unused)) 2039tcg_out_opc_xvld(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk12) 2040{ 2041 tcg_out32(s, encode_xdjsk12_insn(OPC_XVLD, xd, j, sk12)); 2042} 2043 2044/* Emits the `xvst xd, j, sk12` instruction. */ 2045static void __attribute__((unused)) 2046tcg_out_opc_xvst(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk12) 2047{ 2048 tcg_out32(s, encode_xdjsk12_insn(OPC_XVST, xd, j, sk12)); 2049} 2050 2051/* Emits the `vldrepl.d vd, j, sk9` instruction. */ 2052static void __attribute__((unused)) 2053tcg_out_opc_vldrepl_d(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk9) 2054{ 2055 tcg_out32(s, encode_vdjsk9_insn(OPC_VLDREPL_D, vd, j, sk9)); 2056} 2057 2058/* Emits the `vldrepl.w vd, j, sk10` instruction. */ 2059static void __attribute__((unused)) 2060tcg_out_opc_vldrepl_w(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk10) 2061{ 2062 tcg_out32(s, encode_vdjsk10_insn(OPC_VLDREPL_W, vd, j, sk10)); 2063} 2064 2065/* Emits the `vldrepl.h vd, j, sk11` instruction. */ 2066static void __attribute__((unused)) 2067tcg_out_opc_vldrepl_h(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk11) 2068{ 2069 tcg_out32(s, encode_vdjsk11_insn(OPC_VLDREPL_H, vd, j, sk11)); 2070} 2071 2072/* Emits the `vldrepl.b vd, j, sk12` instruction. */ 2073static void __attribute__((unused)) 2074tcg_out_opc_vldrepl_b(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk12) 2075{ 2076 tcg_out32(s, encode_vdjsk12_insn(OPC_VLDREPL_B, vd, j, sk12)); 2077} 2078 2079/* Emits the `vstelm.d vd, j, sk8, un1` instruction. */ 2080static void __attribute__((unused)) 2081tcg_out_opc_vstelm_d(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk8, 2082 uint32_t un1) 2083{ 2084 tcg_out32(s, encode_vdjsk8un1_insn(OPC_VSTELM_D, vd, j, sk8, un1)); 2085} 2086 2087/* Emits the `vstelm.w vd, j, sk8, un2` instruction. */ 2088static void __attribute__((unused)) 2089tcg_out_opc_vstelm_w(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk8, 2090 uint32_t un2) 2091{ 2092 tcg_out32(s, encode_vdjsk8un2_insn(OPC_VSTELM_W, vd, j, sk8, un2)); 2093} 2094 2095/* Emits the `vstelm.h vd, j, sk8, un3` instruction. */ 2096static void __attribute__((unused)) 2097tcg_out_opc_vstelm_h(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk8, 2098 uint32_t un3) 2099{ 2100 tcg_out32(s, encode_vdjsk8un3_insn(OPC_VSTELM_H, vd, j, sk8, un3)); 2101} 2102 2103/* Emits the `vstelm.b vd, j, sk8, un4` instruction. */ 2104static void __attribute__((unused)) 2105tcg_out_opc_vstelm_b(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk8, 2106 uint32_t un4) 2107{ 2108 tcg_out32(s, encode_vdjsk8un4_insn(OPC_VSTELM_B, vd, j, sk8, un4)); 2109} 2110 2111/* Emits the `xvldrepl.d xd, j, sk9` instruction. */ 2112static void __attribute__((unused)) 2113tcg_out_opc_xvldrepl_d(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk9) 2114{ 2115 tcg_out32(s, encode_xdjsk9_insn(OPC_XVLDREPL_D, xd, j, sk9)); 2116} 2117 2118/* Emits the `xvldrepl.w xd, j, sk10` instruction. */ 2119static void __attribute__((unused)) 2120tcg_out_opc_xvldrepl_w(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk10) 2121{ 2122 tcg_out32(s, encode_xdjsk10_insn(OPC_XVLDREPL_W, xd, j, sk10)); 2123} 2124 2125/* Emits the `xvldrepl.h xd, j, sk11` instruction. */ 2126static void __attribute__((unused)) 2127tcg_out_opc_xvldrepl_h(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk11) 2128{ 2129 tcg_out32(s, encode_xdjsk11_insn(OPC_XVLDREPL_H, xd, j, sk11)); 2130} 2131 2132/* Emits the `xvldrepl.b xd, j, sk12` instruction. */ 2133static void __attribute__((unused)) 2134tcg_out_opc_xvldrepl_b(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk12) 2135{ 2136 tcg_out32(s, encode_xdjsk12_insn(OPC_XVLDREPL_B, xd, j, sk12)); 2137} 2138 2139/* Emits the `xvstelm.d xd, j, sk8, un2` instruction. */ 2140static void __attribute__((unused)) 2141tcg_out_opc_xvstelm_d(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk8, 2142 uint32_t un2) 2143{ 2144 tcg_out32(s, encode_xdjsk8un2_insn(OPC_XVSTELM_D, xd, j, sk8, un2)); 2145} 2146 2147/* Emits the `xvstelm.w xd, j, sk8, un3` instruction. */ 2148static void __attribute__((unused)) 2149tcg_out_opc_xvstelm_w(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk8, 2150 uint32_t un3) 2151{ 2152 tcg_out32(s, encode_xdjsk8un3_insn(OPC_XVSTELM_W, xd, j, sk8, un3)); 2153} 2154 2155/* Emits the `xvstelm.h xd, j, sk8, un4` instruction. */ 2156static void __attribute__((unused)) 2157tcg_out_opc_xvstelm_h(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk8, 2158 uint32_t un4) 2159{ 2160 tcg_out32(s, encode_xdjsk8un4_insn(OPC_XVSTELM_H, xd, j, sk8, un4)); 2161} 2162 2163/* Emits the `xvstelm.b xd, j, sk8, un5` instruction. */ 2164static void __attribute__((unused)) 2165tcg_out_opc_xvstelm_b(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk8, 2166 uint32_t un5) 2167{ 2168 tcg_out32(s, encode_xdjsk8un5_insn(OPC_XVSTELM_B, xd, j, sk8, un5)); 2169} 2170 2171/* Emits the `ldx.b d, j, k` instruction. */ 2172static void __attribute__((unused)) 2173tcg_out_opc_ldx_b(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 2174{ 2175 tcg_out32(s, encode_djk_insn(OPC_LDX_B, d, j, k)); 2176} 2177 2178/* Emits the `ldx.h d, j, k` instruction. */ 2179static void __attribute__((unused)) 2180tcg_out_opc_ldx_h(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 2181{ 2182 tcg_out32(s, encode_djk_insn(OPC_LDX_H, d, j, k)); 2183} 2184 2185/* Emits the `ldx.w d, j, k` instruction. */ 2186static void __attribute__((unused)) 2187tcg_out_opc_ldx_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 2188{ 2189 tcg_out32(s, encode_djk_insn(OPC_LDX_W, d, j, k)); 2190} 2191 2192/* Emits the `ldx.d d, j, k` instruction. */ 2193static void __attribute__((unused)) 2194tcg_out_opc_ldx_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 2195{ 2196 tcg_out32(s, encode_djk_insn(OPC_LDX_D, d, j, k)); 2197} 2198 2199/* Emits the `stx.b d, j, k` instruction. */ 2200static void __attribute__((unused)) 2201tcg_out_opc_stx_b(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 2202{ 2203 tcg_out32(s, encode_djk_insn(OPC_STX_B, d, j, k)); 2204} 2205 2206/* Emits the `stx.h d, j, k` instruction. */ 2207static void __attribute__((unused)) 2208tcg_out_opc_stx_h(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 2209{ 2210 tcg_out32(s, encode_djk_insn(OPC_STX_H, d, j, k)); 2211} 2212 2213/* Emits the `stx.w d, j, k` instruction. */ 2214static void __attribute__((unused)) 2215tcg_out_opc_stx_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 2216{ 2217 tcg_out32(s, encode_djk_insn(OPC_STX_W, d, j, k)); 2218} 2219 2220/* Emits the `stx.d d, j, k` instruction. */ 2221static void __attribute__((unused)) 2222tcg_out_opc_stx_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 2223{ 2224 tcg_out32(s, encode_djk_insn(OPC_STX_D, d, j, k)); 2225} 2226 2227/* Emits the `ldx.bu d, j, k` instruction. */ 2228static void __attribute__((unused)) 2229tcg_out_opc_ldx_bu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 2230{ 2231 tcg_out32(s, encode_djk_insn(OPC_LDX_BU, d, j, k)); 2232} 2233 2234/* Emits the `ldx.hu d, j, k` instruction. */ 2235static void __attribute__((unused)) 2236tcg_out_opc_ldx_hu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 2237{ 2238 tcg_out32(s, encode_djk_insn(OPC_LDX_HU, d, j, k)); 2239} 2240 2241/* Emits the `ldx.wu d, j, k` instruction. */ 2242static void __attribute__((unused)) 2243tcg_out_opc_ldx_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) 2244{ 2245 tcg_out32(s, encode_djk_insn(OPC_LDX_WU, d, j, k)); 2246} 2247 2248/* Emits the `fldx.s fd, j, k` instruction. */ 2249static void __attribute__((unused)) 2250tcg_out_opc_fldx_s(TCGContext *s, TCGReg fd, TCGReg j, TCGReg k) 2251{ 2252 tcg_out32(s, encode_fdjk_insn(OPC_FLDX_S, fd, j, k)); 2253} 2254 2255/* Emits the `fldx.d fd, j, k` instruction. */ 2256static void __attribute__((unused)) 2257tcg_out_opc_fldx_d(TCGContext *s, TCGReg fd, TCGReg j, TCGReg k) 2258{ 2259 tcg_out32(s, encode_fdjk_insn(OPC_FLDX_D, fd, j, k)); 2260} 2261 2262/* Emits the `fstx.s fd, j, k` instruction. */ 2263static void __attribute__((unused)) 2264tcg_out_opc_fstx_s(TCGContext *s, TCGReg fd, TCGReg j, TCGReg k) 2265{ 2266 tcg_out32(s, encode_fdjk_insn(OPC_FSTX_S, fd, j, k)); 2267} 2268 2269/* Emits the `fstx.d fd, j, k` instruction. */ 2270static void __attribute__((unused)) 2271tcg_out_opc_fstx_d(TCGContext *s, TCGReg fd, TCGReg j, TCGReg k) 2272{ 2273 tcg_out32(s, encode_fdjk_insn(OPC_FSTX_D, fd, j, k)); 2274} 2275 2276/* Emits the `vldx vd, j, k` instruction. */ 2277static void __attribute__((unused)) 2278tcg_out_opc_vldx(TCGContext *s, TCGReg vd, TCGReg j, TCGReg k) 2279{ 2280 tcg_out32(s, encode_vdjk_insn(OPC_VLDX, vd, j, k)); 2281} 2282 2283/* Emits the `vstx vd, j, k` instruction. */ 2284static void __attribute__((unused)) 2285tcg_out_opc_vstx(TCGContext *s, TCGReg vd, TCGReg j, TCGReg k) 2286{ 2287 tcg_out32(s, encode_vdjk_insn(OPC_VSTX, vd, j, k)); 2288} 2289 2290/* Emits the `xvldx xd, j, k` instruction. */ 2291static void __attribute__((unused)) 2292tcg_out_opc_xvldx(TCGContext *s, TCGReg xd, TCGReg j, TCGReg k) 2293{ 2294 tcg_out32(s, encode_xdjk_insn(OPC_XVLDX, xd, j, k)); 2295} 2296 2297/* Emits the `xvstx xd, j, k` instruction. */ 2298static void __attribute__((unused)) 2299tcg_out_opc_xvstx(TCGContext *s, TCGReg xd, TCGReg j, TCGReg k) 2300{ 2301 tcg_out32(s, encode_xdjk_insn(OPC_XVSTX, xd, j, k)); 2302} 2303 2304/* Emits the `dbar ud15` instruction. */ 2305static void __attribute__((unused)) 2306tcg_out_opc_dbar(TCGContext *s, uint32_t ud15) 2307{ 2308 tcg_out32(s, encode_ud15_insn(OPC_DBAR, ud15)); 2309} 2310 2311/* Emits the `jiscr0 sd5k16` instruction. */ 2312static void __attribute__((unused)) 2313tcg_out_opc_jiscr0(TCGContext *s, int32_t sd5k16) 2314{ 2315 tcg_out32(s, encode_sd5k16_insn(OPC_JISCR0, sd5k16)); 2316} 2317 2318/* Emits the `jiscr1 sd5k16` instruction. */ 2319static void __attribute__((unused)) 2320tcg_out_opc_jiscr1(TCGContext *s, int32_t sd5k16) 2321{ 2322 tcg_out32(s, encode_sd5k16_insn(OPC_JISCR1, sd5k16)); 2323} 2324 2325/* Emits the `jirl d, j, sk16` instruction. */ 2326static void __attribute__((unused)) 2327tcg_out_opc_jirl(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) 2328{ 2329 tcg_out32(s, encode_djsk16_insn(OPC_JIRL, d, j, sk16)); 2330} 2331 2332/* Emits the `b sd10k16` instruction. */ 2333static void __attribute__((unused)) 2334tcg_out_opc_b(TCGContext *s, int32_t sd10k16) 2335{ 2336 tcg_out32(s, encode_sd10k16_insn(OPC_B, sd10k16)); 2337} 2338 2339/* Emits the `bl sd10k16` instruction. */ 2340static void __attribute__((unused)) 2341tcg_out_opc_bl(TCGContext *s, int32_t sd10k16) 2342{ 2343 tcg_out32(s, encode_sd10k16_insn(OPC_BL, sd10k16)); 2344} 2345 2346/* Emits the `beq d, j, sk16` instruction. */ 2347static void __attribute__((unused)) 2348tcg_out_opc_beq(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) 2349{ 2350 tcg_out32(s, encode_djsk16_insn(OPC_BEQ, d, j, sk16)); 2351} 2352 2353/* Emits the `bne d, j, sk16` instruction. */ 2354static void __attribute__((unused)) 2355tcg_out_opc_bne(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) 2356{ 2357 tcg_out32(s, encode_djsk16_insn(OPC_BNE, d, j, sk16)); 2358} 2359 2360/* Emits the `bgt d, j, sk16` instruction. */ 2361static void __attribute__((unused)) 2362tcg_out_opc_bgt(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) 2363{ 2364 tcg_out32(s, encode_djsk16_insn(OPC_BGT, d, j, sk16)); 2365} 2366 2367/* Emits the `ble d, j, sk16` instruction. */ 2368static void __attribute__((unused)) 2369tcg_out_opc_ble(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) 2370{ 2371 tcg_out32(s, encode_djsk16_insn(OPC_BLE, d, j, sk16)); 2372} 2373 2374/* Emits the `bgtu d, j, sk16` instruction. */ 2375static void __attribute__((unused)) 2376tcg_out_opc_bgtu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) 2377{ 2378 tcg_out32(s, encode_djsk16_insn(OPC_BGTU, d, j, sk16)); 2379} 2380 2381/* Emits the `bleu d, j, sk16` instruction. */ 2382static void __attribute__((unused)) 2383tcg_out_opc_bleu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) 2384{ 2385 tcg_out32(s, encode_djsk16_insn(OPC_BLEU, d, j, sk16)); 2386} 2387 2388/* Emits the `vseq.b vd, vj, vk` instruction. */ 2389static void __attribute__((unused)) 2390tcg_out_opc_vseq_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2391{ 2392 tcg_out32(s, encode_vdvjvk_insn(OPC_VSEQ_B, vd, vj, vk)); 2393} 2394 2395/* Emits the `vseq.h vd, vj, vk` instruction. */ 2396static void __attribute__((unused)) 2397tcg_out_opc_vseq_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2398{ 2399 tcg_out32(s, encode_vdvjvk_insn(OPC_VSEQ_H, vd, vj, vk)); 2400} 2401 2402/* Emits the `vseq.w vd, vj, vk` instruction. */ 2403static void __attribute__((unused)) 2404tcg_out_opc_vseq_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2405{ 2406 tcg_out32(s, encode_vdvjvk_insn(OPC_VSEQ_W, vd, vj, vk)); 2407} 2408 2409/* Emits the `vseq.d vd, vj, vk` instruction. */ 2410static void __attribute__((unused)) 2411tcg_out_opc_vseq_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2412{ 2413 tcg_out32(s, encode_vdvjvk_insn(OPC_VSEQ_D, vd, vj, vk)); 2414} 2415 2416/* Emits the `vsle.b vd, vj, vk` instruction. */ 2417static void __attribute__((unused)) 2418tcg_out_opc_vsle_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2419{ 2420 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_B, vd, vj, vk)); 2421} 2422 2423/* Emits the `vsle.h vd, vj, vk` instruction. */ 2424static void __attribute__((unused)) 2425tcg_out_opc_vsle_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2426{ 2427 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_H, vd, vj, vk)); 2428} 2429 2430/* Emits the `vsle.w vd, vj, vk` instruction. */ 2431static void __attribute__((unused)) 2432tcg_out_opc_vsle_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2433{ 2434 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_W, vd, vj, vk)); 2435} 2436 2437/* Emits the `vsle.d vd, vj, vk` instruction. */ 2438static void __attribute__((unused)) 2439tcg_out_opc_vsle_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2440{ 2441 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_D, vd, vj, vk)); 2442} 2443 2444/* Emits the `vsle.bu vd, vj, vk` instruction. */ 2445static void __attribute__((unused)) 2446tcg_out_opc_vsle_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2447{ 2448 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_BU, vd, vj, vk)); 2449} 2450 2451/* Emits the `vsle.hu vd, vj, vk` instruction. */ 2452static void __attribute__((unused)) 2453tcg_out_opc_vsle_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2454{ 2455 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_HU, vd, vj, vk)); 2456} 2457 2458/* Emits the `vsle.wu vd, vj, vk` instruction. */ 2459static void __attribute__((unused)) 2460tcg_out_opc_vsle_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2461{ 2462 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_WU, vd, vj, vk)); 2463} 2464 2465/* Emits the `vsle.du vd, vj, vk` instruction. */ 2466static void __attribute__((unused)) 2467tcg_out_opc_vsle_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2468{ 2469 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_DU, vd, vj, vk)); 2470} 2471 2472/* Emits the `vslt.b vd, vj, vk` instruction. */ 2473static void __attribute__((unused)) 2474tcg_out_opc_vslt_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2475{ 2476 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_B, vd, vj, vk)); 2477} 2478 2479/* Emits the `vslt.h vd, vj, vk` instruction. */ 2480static void __attribute__((unused)) 2481tcg_out_opc_vslt_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2482{ 2483 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_H, vd, vj, vk)); 2484} 2485 2486/* Emits the `vslt.w vd, vj, vk` instruction. */ 2487static void __attribute__((unused)) 2488tcg_out_opc_vslt_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2489{ 2490 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_W, vd, vj, vk)); 2491} 2492 2493/* Emits the `vslt.d vd, vj, vk` instruction. */ 2494static void __attribute__((unused)) 2495tcg_out_opc_vslt_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2496{ 2497 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_D, vd, vj, vk)); 2498} 2499 2500/* Emits the `vslt.bu vd, vj, vk` instruction. */ 2501static void __attribute__((unused)) 2502tcg_out_opc_vslt_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2503{ 2504 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_BU, vd, vj, vk)); 2505} 2506 2507/* Emits the `vslt.hu vd, vj, vk` instruction. */ 2508static void __attribute__((unused)) 2509tcg_out_opc_vslt_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2510{ 2511 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_HU, vd, vj, vk)); 2512} 2513 2514/* Emits the `vslt.wu vd, vj, vk` instruction. */ 2515static void __attribute__((unused)) 2516tcg_out_opc_vslt_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2517{ 2518 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_WU, vd, vj, vk)); 2519} 2520 2521/* Emits the `vslt.du vd, vj, vk` instruction. */ 2522static void __attribute__((unused)) 2523tcg_out_opc_vslt_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2524{ 2525 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_DU, vd, vj, vk)); 2526} 2527 2528/* Emits the `vadd.b vd, vj, vk` instruction. */ 2529static void __attribute__((unused)) 2530tcg_out_opc_vadd_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2531{ 2532 tcg_out32(s, encode_vdvjvk_insn(OPC_VADD_B, vd, vj, vk)); 2533} 2534 2535/* Emits the `vadd.h vd, vj, vk` instruction. */ 2536static void __attribute__((unused)) 2537tcg_out_opc_vadd_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2538{ 2539 tcg_out32(s, encode_vdvjvk_insn(OPC_VADD_H, vd, vj, vk)); 2540} 2541 2542/* Emits the `vadd.w vd, vj, vk` instruction. */ 2543static void __attribute__((unused)) 2544tcg_out_opc_vadd_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2545{ 2546 tcg_out32(s, encode_vdvjvk_insn(OPC_VADD_W, vd, vj, vk)); 2547} 2548 2549/* Emits the `vadd.d vd, vj, vk` instruction. */ 2550static void __attribute__((unused)) 2551tcg_out_opc_vadd_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2552{ 2553 tcg_out32(s, encode_vdvjvk_insn(OPC_VADD_D, vd, vj, vk)); 2554} 2555 2556/* Emits the `vsub.b vd, vj, vk` instruction. */ 2557static void __attribute__((unused)) 2558tcg_out_opc_vsub_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2559{ 2560 tcg_out32(s, encode_vdvjvk_insn(OPC_VSUB_B, vd, vj, vk)); 2561} 2562 2563/* Emits the `vsub.h vd, vj, vk` instruction. */ 2564static void __attribute__((unused)) 2565tcg_out_opc_vsub_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2566{ 2567 tcg_out32(s, encode_vdvjvk_insn(OPC_VSUB_H, vd, vj, vk)); 2568} 2569 2570/* Emits the `vsub.w vd, vj, vk` instruction. */ 2571static void __attribute__((unused)) 2572tcg_out_opc_vsub_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2573{ 2574 tcg_out32(s, encode_vdvjvk_insn(OPC_VSUB_W, vd, vj, vk)); 2575} 2576 2577/* Emits the `vsub.d vd, vj, vk` instruction. */ 2578static void __attribute__((unused)) 2579tcg_out_opc_vsub_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2580{ 2581 tcg_out32(s, encode_vdvjvk_insn(OPC_VSUB_D, vd, vj, vk)); 2582} 2583 2584/* Emits the `vsadd.b vd, vj, vk` instruction. */ 2585static void __attribute__((unused)) 2586tcg_out_opc_vsadd_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2587{ 2588 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_B, vd, vj, vk)); 2589} 2590 2591/* Emits the `vsadd.h vd, vj, vk` instruction. */ 2592static void __attribute__((unused)) 2593tcg_out_opc_vsadd_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2594{ 2595 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_H, vd, vj, vk)); 2596} 2597 2598/* Emits the `vsadd.w vd, vj, vk` instruction. */ 2599static void __attribute__((unused)) 2600tcg_out_opc_vsadd_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2601{ 2602 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_W, vd, vj, vk)); 2603} 2604 2605/* Emits the `vsadd.d vd, vj, vk` instruction. */ 2606static void __attribute__((unused)) 2607tcg_out_opc_vsadd_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2608{ 2609 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_D, vd, vj, vk)); 2610} 2611 2612/* Emits the `vssub.b vd, vj, vk` instruction. */ 2613static void __attribute__((unused)) 2614tcg_out_opc_vssub_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2615{ 2616 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_B, vd, vj, vk)); 2617} 2618 2619/* Emits the `vssub.h vd, vj, vk` instruction. */ 2620static void __attribute__((unused)) 2621tcg_out_opc_vssub_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2622{ 2623 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_H, vd, vj, vk)); 2624} 2625 2626/* Emits the `vssub.w vd, vj, vk` instruction. */ 2627static void __attribute__((unused)) 2628tcg_out_opc_vssub_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2629{ 2630 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_W, vd, vj, vk)); 2631} 2632 2633/* Emits the `vssub.d vd, vj, vk` instruction. */ 2634static void __attribute__((unused)) 2635tcg_out_opc_vssub_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2636{ 2637 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_D, vd, vj, vk)); 2638} 2639 2640/* Emits the `vsadd.bu vd, vj, vk` instruction. */ 2641static void __attribute__((unused)) 2642tcg_out_opc_vsadd_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2643{ 2644 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_BU, vd, vj, vk)); 2645} 2646 2647/* Emits the `vsadd.hu vd, vj, vk` instruction. */ 2648static void __attribute__((unused)) 2649tcg_out_opc_vsadd_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2650{ 2651 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_HU, vd, vj, vk)); 2652} 2653 2654/* Emits the `vsadd.wu vd, vj, vk` instruction. */ 2655static void __attribute__((unused)) 2656tcg_out_opc_vsadd_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2657{ 2658 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_WU, vd, vj, vk)); 2659} 2660 2661/* Emits the `vsadd.du vd, vj, vk` instruction. */ 2662static void __attribute__((unused)) 2663tcg_out_opc_vsadd_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2664{ 2665 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_DU, vd, vj, vk)); 2666} 2667 2668/* Emits the `vssub.bu vd, vj, vk` instruction. */ 2669static void __attribute__((unused)) 2670tcg_out_opc_vssub_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2671{ 2672 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_BU, vd, vj, vk)); 2673} 2674 2675/* Emits the `vssub.hu vd, vj, vk` instruction. */ 2676static void __attribute__((unused)) 2677tcg_out_opc_vssub_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2678{ 2679 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_HU, vd, vj, vk)); 2680} 2681 2682/* Emits the `vssub.wu vd, vj, vk` instruction. */ 2683static void __attribute__((unused)) 2684tcg_out_opc_vssub_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2685{ 2686 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_WU, vd, vj, vk)); 2687} 2688 2689/* Emits the `vssub.du vd, vj, vk` instruction. */ 2690static void __attribute__((unused)) 2691tcg_out_opc_vssub_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2692{ 2693 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_DU, vd, vj, vk)); 2694} 2695 2696/* Emits the `vmax.b vd, vj, vk` instruction. */ 2697static void __attribute__((unused)) 2698tcg_out_opc_vmax_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2699{ 2700 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_B, vd, vj, vk)); 2701} 2702 2703/* Emits the `vmax.h vd, vj, vk` instruction. */ 2704static void __attribute__((unused)) 2705tcg_out_opc_vmax_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2706{ 2707 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_H, vd, vj, vk)); 2708} 2709 2710/* Emits the `vmax.w vd, vj, vk` instruction. */ 2711static void __attribute__((unused)) 2712tcg_out_opc_vmax_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2713{ 2714 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_W, vd, vj, vk)); 2715} 2716 2717/* Emits the `vmax.d vd, vj, vk` instruction. */ 2718static void __attribute__((unused)) 2719tcg_out_opc_vmax_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2720{ 2721 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_D, vd, vj, vk)); 2722} 2723 2724/* Emits the `vmin.b vd, vj, vk` instruction. */ 2725static void __attribute__((unused)) 2726tcg_out_opc_vmin_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2727{ 2728 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_B, vd, vj, vk)); 2729} 2730 2731/* Emits the `vmin.h vd, vj, vk` instruction. */ 2732static void __attribute__((unused)) 2733tcg_out_opc_vmin_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2734{ 2735 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_H, vd, vj, vk)); 2736} 2737 2738/* Emits the `vmin.w vd, vj, vk` instruction. */ 2739static void __attribute__((unused)) 2740tcg_out_opc_vmin_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2741{ 2742 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_W, vd, vj, vk)); 2743} 2744 2745/* Emits the `vmin.d vd, vj, vk` instruction. */ 2746static void __attribute__((unused)) 2747tcg_out_opc_vmin_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2748{ 2749 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_D, vd, vj, vk)); 2750} 2751 2752/* Emits the `vmax.bu vd, vj, vk` instruction. */ 2753static void __attribute__((unused)) 2754tcg_out_opc_vmax_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2755{ 2756 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_BU, vd, vj, vk)); 2757} 2758 2759/* Emits the `vmax.hu vd, vj, vk` instruction. */ 2760static void __attribute__((unused)) 2761tcg_out_opc_vmax_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2762{ 2763 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_HU, vd, vj, vk)); 2764} 2765 2766/* Emits the `vmax.wu vd, vj, vk` instruction. */ 2767static void __attribute__((unused)) 2768tcg_out_opc_vmax_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2769{ 2770 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_WU, vd, vj, vk)); 2771} 2772 2773/* Emits the `vmax.du vd, vj, vk` instruction. */ 2774static void __attribute__((unused)) 2775tcg_out_opc_vmax_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2776{ 2777 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_DU, vd, vj, vk)); 2778} 2779 2780/* Emits the `vmin.bu vd, vj, vk` instruction. */ 2781static void __attribute__((unused)) 2782tcg_out_opc_vmin_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2783{ 2784 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_BU, vd, vj, vk)); 2785} 2786 2787/* Emits the `vmin.hu vd, vj, vk` instruction. */ 2788static void __attribute__((unused)) 2789tcg_out_opc_vmin_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2790{ 2791 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_HU, vd, vj, vk)); 2792} 2793 2794/* Emits the `vmin.wu vd, vj, vk` instruction. */ 2795static void __attribute__((unused)) 2796tcg_out_opc_vmin_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2797{ 2798 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_WU, vd, vj, vk)); 2799} 2800 2801/* Emits the `vmin.du vd, vj, vk` instruction. */ 2802static void __attribute__((unused)) 2803tcg_out_opc_vmin_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2804{ 2805 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_DU, vd, vj, vk)); 2806} 2807 2808/* Emits the `vmul.b vd, vj, vk` instruction. */ 2809static void __attribute__((unused)) 2810tcg_out_opc_vmul_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2811{ 2812 tcg_out32(s, encode_vdvjvk_insn(OPC_VMUL_B, vd, vj, vk)); 2813} 2814 2815/* Emits the `vmul.h vd, vj, vk` instruction. */ 2816static void __attribute__((unused)) 2817tcg_out_opc_vmul_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2818{ 2819 tcg_out32(s, encode_vdvjvk_insn(OPC_VMUL_H, vd, vj, vk)); 2820} 2821 2822/* Emits the `vmul.w vd, vj, vk` instruction. */ 2823static void __attribute__((unused)) 2824tcg_out_opc_vmul_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2825{ 2826 tcg_out32(s, encode_vdvjvk_insn(OPC_VMUL_W, vd, vj, vk)); 2827} 2828 2829/* Emits the `vmul.d vd, vj, vk` instruction. */ 2830static void __attribute__((unused)) 2831tcg_out_opc_vmul_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2832{ 2833 tcg_out32(s, encode_vdvjvk_insn(OPC_VMUL_D, vd, vj, vk)); 2834} 2835 2836/* Emits the `vsll.b vd, vj, vk` instruction. */ 2837static void __attribute__((unused)) 2838tcg_out_opc_vsll_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2839{ 2840 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLL_B, vd, vj, vk)); 2841} 2842 2843/* Emits the `vsll.h vd, vj, vk` instruction. */ 2844static void __attribute__((unused)) 2845tcg_out_opc_vsll_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2846{ 2847 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLL_H, vd, vj, vk)); 2848} 2849 2850/* Emits the `vsll.w vd, vj, vk` instruction. */ 2851static void __attribute__((unused)) 2852tcg_out_opc_vsll_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2853{ 2854 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLL_W, vd, vj, vk)); 2855} 2856 2857/* Emits the `vsll.d vd, vj, vk` instruction. */ 2858static void __attribute__((unused)) 2859tcg_out_opc_vsll_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2860{ 2861 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLL_D, vd, vj, vk)); 2862} 2863 2864/* Emits the `vsrl.b vd, vj, vk` instruction. */ 2865static void __attribute__((unused)) 2866tcg_out_opc_vsrl_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2867{ 2868 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRL_B, vd, vj, vk)); 2869} 2870 2871/* Emits the `vsrl.h vd, vj, vk` instruction. */ 2872static void __attribute__((unused)) 2873tcg_out_opc_vsrl_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2874{ 2875 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRL_H, vd, vj, vk)); 2876} 2877 2878/* Emits the `vsrl.w vd, vj, vk` instruction. */ 2879static void __attribute__((unused)) 2880tcg_out_opc_vsrl_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2881{ 2882 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRL_W, vd, vj, vk)); 2883} 2884 2885/* Emits the `vsrl.d vd, vj, vk` instruction. */ 2886static void __attribute__((unused)) 2887tcg_out_opc_vsrl_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2888{ 2889 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRL_D, vd, vj, vk)); 2890} 2891 2892/* Emits the `vsra.b vd, vj, vk` instruction. */ 2893static void __attribute__((unused)) 2894tcg_out_opc_vsra_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2895{ 2896 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRA_B, vd, vj, vk)); 2897} 2898 2899/* Emits the `vsra.h vd, vj, vk` instruction. */ 2900static void __attribute__((unused)) 2901tcg_out_opc_vsra_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2902{ 2903 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRA_H, vd, vj, vk)); 2904} 2905 2906/* Emits the `vsra.w vd, vj, vk` instruction. */ 2907static void __attribute__((unused)) 2908tcg_out_opc_vsra_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2909{ 2910 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRA_W, vd, vj, vk)); 2911} 2912 2913/* Emits the `vsra.d vd, vj, vk` instruction. */ 2914static void __attribute__((unused)) 2915tcg_out_opc_vsra_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2916{ 2917 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRA_D, vd, vj, vk)); 2918} 2919 2920/* Emits the `vrotr.b vd, vj, vk` instruction. */ 2921static void __attribute__((unused)) 2922tcg_out_opc_vrotr_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2923{ 2924 tcg_out32(s, encode_vdvjvk_insn(OPC_VROTR_B, vd, vj, vk)); 2925} 2926 2927/* Emits the `vrotr.h vd, vj, vk` instruction. */ 2928static void __attribute__((unused)) 2929tcg_out_opc_vrotr_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2930{ 2931 tcg_out32(s, encode_vdvjvk_insn(OPC_VROTR_H, vd, vj, vk)); 2932} 2933 2934/* Emits the `vrotr.w vd, vj, vk` instruction. */ 2935static void __attribute__((unused)) 2936tcg_out_opc_vrotr_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2937{ 2938 tcg_out32(s, encode_vdvjvk_insn(OPC_VROTR_W, vd, vj, vk)); 2939} 2940 2941/* Emits the `vrotr.d vd, vj, vk` instruction. */ 2942static void __attribute__((unused)) 2943tcg_out_opc_vrotr_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2944{ 2945 tcg_out32(s, encode_vdvjvk_insn(OPC_VROTR_D, vd, vj, vk)); 2946} 2947 2948/* Emits the `vreplve.b vd, vj, k` instruction. */ 2949static void __attribute__((unused)) 2950tcg_out_opc_vreplve_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg k) 2951{ 2952 tcg_out32(s, encode_vdvjk_insn(OPC_VREPLVE_B, vd, vj, k)); 2953} 2954 2955/* Emits the `vreplve.h vd, vj, k` instruction. */ 2956static void __attribute__((unused)) 2957tcg_out_opc_vreplve_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg k) 2958{ 2959 tcg_out32(s, encode_vdvjk_insn(OPC_VREPLVE_H, vd, vj, k)); 2960} 2961 2962/* Emits the `vreplve.w vd, vj, k` instruction. */ 2963static void __attribute__((unused)) 2964tcg_out_opc_vreplve_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg k) 2965{ 2966 tcg_out32(s, encode_vdvjk_insn(OPC_VREPLVE_W, vd, vj, k)); 2967} 2968 2969/* Emits the `vreplve.d vd, vj, k` instruction. */ 2970static void __attribute__((unused)) 2971tcg_out_opc_vreplve_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg k) 2972{ 2973 tcg_out32(s, encode_vdvjk_insn(OPC_VREPLVE_D, vd, vj, k)); 2974} 2975 2976/* Emits the `vand.v vd, vj, vk` instruction. */ 2977static void __attribute__((unused)) 2978tcg_out_opc_vand_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2979{ 2980 tcg_out32(s, encode_vdvjvk_insn(OPC_VAND_V, vd, vj, vk)); 2981} 2982 2983/* Emits the `vor.v vd, vj, vk` instruction. */ 2984static void __attribute__((unused)) 2985tcg_out_opc_vor_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2986{ 2987 tcg_out32(s, encode_vdvjvk_insn(OPC_VOR_V, vd, vj, vk)); 2988} 2989 2990/* Emits the `vxor.v vd, vj, vk` instruction. */ 2991static void __attribute__((unused)) 2992tcg_out_opc_vxor_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 2993{ 2994 tcg_out32(s, encode_vdvjvk_insn(OPC_VXOR_V, vd, vj, vk)); 2995} 2996 2997/* Emits the `vnor.v vd, vj, vk` instruction. */ 2998static void __attribute__((unused)) 2999tcg_out_opc_vnor_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 3000{ 3001 tcg_out32(s, encode_vdvjvk_insn(OPC_VNOR_V, vd, vj, vk)); 3002} 3003 3004/* Emits the `vandn.v vd, vj, vk` instruction. */ 3005static void __attribute__((unused)) 3006tcg_out_opc_vandn_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 3007{ 3008 tcg_out32(s, encode_vdvjvk_insn(OPC_VANDN_V, vd, vj, vk)); 3009} 3010 3011/* Emits the `vorn.v vd, vj, vk` instruction. */ 3012static void __attribute__((unused)) 3013tcg_out_opc_vorn_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk) 3014{ 3015 tcg_out32(s, encode_vdvjvk_insn(OPC_VORN_V, vd, vj, vk)); 3016} 3017 3018/* Emits the `vseqi.b vd, vj, sk5` instruction. */ 3019static void __attribute__((unused)) 3020tcg_out_opc_vseqi_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3021{ 3022 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSEQI_B, vd, vj, sk5)); 3023} 3024 3025/* Emits the `vseqi.h vd, vj, sk5` instruction. */ 3026static void __attribute__((unused)) 3027tcg_out_opc_vseqi_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3028{ 3029 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSEQI_H, vd, vj, sk5)); 3030} 3031 3032/* Emits the `vseqi.w vd, vj, sk5` instruction. */ 3033static void __attribute__((unused)) 3034tcg_out_opc_vseqi_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3035{ 3036 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSEQI_W, vd, vj, sk5)); 3037} 3038 3039/* Emits the `vseqi.d vd, vj, sk5` instruction. */ 3040static void __attribute__((unused)) 3041tcg_out_opc_vseqi_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3042{ 3043 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSEQI_D, vd, vj, sk5)); 3044} 3045 3046/* Emits the `vslei.b vd, vj, sk5` instruction. */ 3047static void __attribute__((unused)) 3048tcg_out_opc_vslei_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3049{ 3050 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLEI_B, vd, vj, sk5)); 3051} 3052 3053/* Emits the `vslei.h vd, vj, sk5` instruction. */ 3054static void __attribute__((unused)) 3055tcg_out_opc_vslei_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3056{ 3057 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLEI_H, vd, vj, sk5)); 3058} 3059 3060/* Emits the `vslei.w vd, vj, sk5` instruction. */ 3061static void __attribute__((unused)) 3062tcg_out_opc_vslei_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3063{ 3064 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLEI_W, vd, vj, sk5)); 3065} 3066 3067/* Emits the `vslei.d vd, vj, sk5` instruction. */ 3068static void __attribute__((unused)) 3069tcg_out_opc_vslei_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3070{ 3071 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLEI_D, vd, vj, sk5)); 3072} 3073 3074/* Emits the `vslei.bu vd, vj, uk5` instruction. */ 3075static void __attribute__((unused)) 3076tcg_out_opc_vslei_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3077{ 3078 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLEI_BU, vd, vj, uk5)); 3079} 3080 3081/* Emits the `vslei.hu vd, vj, uk5` instruction. */ 3082static void __attribute__((unused)) 3083tcg_out_opc_vslei_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3084{ 3085 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLEI_HU, vd, vj, uk5)); 3086} 3087 3088/* Emits the `vslei.wu vd, vj, uk5` instruction. */ 3089static void __attribute__((unused)) 3090tcg_out_opc_vslei_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3091{ 3092 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLEI_WU, vd, vj, uk5)); 3093} 3094 3095/* Emits the `vslei.du vd, vj, uk5` instruction. */ 3096static void __attribute__((unused)) 3097tcg_out_opc_vslei_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3098{ 3099 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLEI_DU, vd, vj, uk5)); 3100} 3101 3102/* Emits the `vslti.b vd, vj, sk5` instruction. */ 3103static void __attribute__((unused)) 3104tcg_out_opc_vslti_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3105{ 3106 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLTI_B, vd, vj, sk5)); 3107} 3108 3109/* Emits the `vslti.h vd, vj, sk5` instruction. */ 3110static void __attribute__((unused)) 3111tcg_out_opc_vslti_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3112{ 3113 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLTI_H, vd, vj, sk5)); 3114} 3115 3116/* Emits the `vslti.w vd, vj, sk5` instruction. */ 3117static void __attribute__((unused)) 3118tcg_out_opc_vslti_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3119{ 3120 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLTI_W, vd, vj, sk5)); 3121} 3122 3123/* Emits the `vslti.d vd, vj, sk5` instruction. */ 3124static void __attribute__((unused)) 3125tcg_out_opc_vslti_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3126{ 3127 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLTI_D, vd, vj, sk5)); 3128} 3129 3130/* Emits the `vslti.bu vd, vj, uk5` instruction. */ 3131static void __attribute__((unused)) 3132tcg_out_opc_vslti_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3133{ 3134 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLTI_BU, vd, vj, uk5)); 3135} 3136 3137/* Emits the `vslti.hu vd, vj, uk5` instruction. */ 3138static void __attribute__((unused)) 3139tcg_out_opc_vslti_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3140{ 3141 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLTI_HU, vd, vj, uk5)); 3142} 3143 3144/* Emits the `vslti.wu vd, vj, uk5` instruction. */ 3145static void __attribute__((unused)) 3146tcg_out_opc_vslti_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3147{ 3148 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLTI_WU, vd, vj, uk5)); 3149} 3150 3151/* Emits the `vslti.du vd, vj, uk5` instruction. */ 3152static void __attribute__((unused)) 3153tcg_out_opc_vslti_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3154{ 3155 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLTI_DU, vd, vj, uk5)); 3156} 3157 3158/* Emits the `vaddi.bu vd, vj, uk5` instruction. */ 3159static void __attribute__((unused)) 3160tcg_out_opc_vaddi_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3161{ 3162 tcg_out32(s, encode_vdvjuk5_insn(OPC_VADDI_BU, vd, vj, uk5)); 3163} 3164 3165/* Emits the `vaddi.hu vd, vj, uk5` instruction. */ 3166static void __attribute__((unused)) 3167tcg_out_opc_vaddi_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3168{ 3169 tcg_out32(s, encode_vdvjuk5_insn(OPC_VADDI_HU, vd, vj, uk5)); 3170} 3171 3172/* Emits the `vaddi.wu vd, vj, uk5` instruction. */ 3173static void __attribute__((unused)) 3174tcg_out_opc_vaddi_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3175{ 3176 tcg_out32(s, encode_vdvjuk5_insn(OPC_VADDI_WU, vd, vj, uk5)); 3177} 3178 3179/* Emits the `vaddi.du vd, vj, uk5` instruction. */ 3180static void __attribute__((unused)) 3181tcg_out_opc_vaddi_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3182{ 3183 tcg_out32(s, encode_vdvjuk5_insn(OPC_VADDI_DU, vd, vj, uk5)); 3184} 3185 3186/* Emits the `vsubi.bu vd, vj, uk5` instruction. */ 3187static void __attribute__((unused)) 3188tcg_out_opc_vsubi_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3189{ 3190 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSUBI_BU, vd, vj, uk5)); 3191} 3192 3193/* Emits the `vsubi.hu vd, vj, uk5` instruction. */ 3194static void __attribute__((unused)) 3195tcg_out_opc_vsubi_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3196{ 3197 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSUBI_HU, vd, vj, uk5)); 3198} 3199 3200/* Emits the `vsubi.wu vd, vj, uk5` instruction. */ 3201static void __attribute__((unused)) 3202tcg_out_opc_vsubi_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3203{ 3204 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSUBI_WU, vd, vj, uk5)); 3205} 3206 3207/* Emits the `vsubi.du vd, vj, uk5` instruction. */ 3208static void __attribute__((unused)) 3209tcg_out_opc_vsubi_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3210{ 3211 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSUBI_DU, vd, vj, uk5)); 3212} 3213 3214/* Emits the `vmaxi.b vd, vj, sk5` instruction. */ 3215static void __attribute__((unused)) 3216tcg_out_opc_vmaxi_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3217{ 3218 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMAXI_B, vd, vj, sk5)); 3219} 3220 3221/* Emits the `vmaxi.h vd, vj, sk5` instruction. */ 3222static void __attribute__((unused)) 3223tcg_out_opc_vmaxi_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3224{ 3225 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMAXI_H, vd, vj, sk5)); 3226} 3227 3228/* Emits the `vmaxi.w vd, vj, sk5` instruction. */ 3229static void __attribute__((unused)) 3230tcg_out_opc_vmaxi_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3231{ 3232 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMAXI_W, vd, vj, sk5)); 3233} 3234 3235/* Emits the `vmaxi.d vd, vj, sk5` instruction. */ 3236static void __attribute__((unused)) 3237tcg_out_opc_vmaxi_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3238{ 3239 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMAXI_D, vd, vj, sk5)); 3240} 3241 3242/* Emits the `vmini.b vd, vj, sk5` instruction. */ 3243static void __attribute__((unused)) 3244tcg_out_opc_vmini_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3245{ 3246 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMINI_B, vd, vj, sk5)); 3247} 3248 3249/* Emits the `vmini.h vd, vj, sk5` instruction. */ 3250static void __attribute__((unused)) 3251tcg_out_opc_vmini_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3252{ 3253 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMINI_H, vd, vj, sk5)); 3254} 3255 3256/* Emits the `vmini.w vd, vj, sk5` instruction. */ 3257static void __attribute__((unused)) 3258tcg_out_opc_vmini_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3259{ 3260 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMINI_W, vd, vj, sk5)); 3261} 3262 3263/* Emits the `vmini.d vd, vj, sk5` instruction. */ 3264static void __attribute__((unused)) 3265tcg_out_opc_vmini_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5) 3266{ 3267 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMINI_D, vd, vj, sk5)); 3268} 3269 3270/* Emits the `vmaxi.bu vd, vj, uk5` instruction. */ 3271static void __attribute__((unused)) 3272tcg_out_opc_vmaxi_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3273{ 3274 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMAXI_BU, vd, vj, uk5)); 3275} 3276 3277/* Emits the `vmaxi.hu vd, vj, uk5` instruction. */ 3278static void __attribute__((unused)) 3279tcg_out_opc_vmaxi_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3280{ 3281 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMAXI_HU, vd, vj, uk5)); 3282} 3283 3284/* Emits the `vmaxi.wu vd, vj, uk5` instruction. */ 3285static void __attribute__((unused)) 3286tcg_out_opc_vmaxi_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3287{ 3288 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMAXI_WU, vd, vj, uk5)); 3289} 3290 3291/* Emits the `vmaxi.du vd, vj, uk5` instruction. */ 3292static void __attribute__((unused)) 3293tcg_out_opc_vmaxi_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3294{ 3295 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMAXI_DU, vd, vj, uk5)); 3296} 3297 3298/* Emits the `vmini.bu vd, vj, uk5` instruction. */ 3299static void __attribute__((unused)) 3300tcg_out_opc_vmini_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3301{ 3302 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMINI_BU, vd, vj, uk5)); 3303} 3304 3305/* Emits the `vmini.hu vd, vj, uk5` instruction. */ 3306static void __attribute__((unused)) 3307tcg_out_opc_vmini_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3308{ 3309 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMINI_HU, vd, vj, uk5)); 3310} 3311 3312/* Emits the `vmini.wu vd, vj, uk5` instruction. */ 3313static void __attribute__((unused)) 3314tcg_out_opc_vmini_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3315{ 3316 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMINI_WU, vd, vj, uk5)); 3317} 3318 3319/* Emits the `vmini.du vd, vj, uk5` instruction. */ 3320static void __attribute__((unused)) 3321tcg_out_opc_vmini_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3322{ 3323 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMINI_DU, vd, vj, uk5)); 3324} 3325 3326/* Emits the `vneg.b vd, vj` instruction. */ 3327static void __attribute__((unused)) 3328tcg_out_opc_vneg_b(TCGContext *s, TCGReg vd, TCGReg vj) 3329{ 3330 tcg_out32(s, encode_vdvj_insn(OPC_VNEG_B, vd, vj)); 3331} 3332 3333/* Emits the `vneg.h vd, vj` instruction. */ 3334static void __attribute__((unused)) 3335tcg_out_opc_vneg_h(TCGContext *s, TCGReg vd, TCGReg vj) 3336{ 3337 tcg_out32(s, encode_vdvj_insn(OPC_VNEG_H, vd, vj)); 3338} 3339 3340/* Emits the `vneg.w vd, vj` instruction. */ 3341static void __attribute__((unused)) 3342tcg_out_opc_vneg_w(TCGContext *s, TCGReg vd, TCGReg vj) 3343{ 3344 tcg_out32(s, encode_vdvj_insn(OPC_VNEG_W, vd, vj)); 3345} 3346 3347/* Emits the `vneg.d vd, vj` instruction. */ 3348static void __attribute__((unused)) 3349tcg_out_opc_vneg_d(TCGContext *s, TCGReg vd, TCGReg vj) 3350{ 3351 tcg_out32(s, encode_vdvj_insn(OPC_VNEG_D, vd, vj)); 3352} 3353 3354/* Emits the `vreplgr2vr.b vd, j` instruction. */ 3355static void __attribute__((unused)) 3356tcg_out_opc_vreplgr2vr_b(TCGContext *s, TCGReg vd, TCGReg j) 3357{ 3358 tcg_out32(s, encode_vdj_insn(OPC_VREPLGR2VR_B, vd, j)); 3359} 3360 3361/* Emits the `vreplgr2vr.h vd, j` instruction. */ 3362static void __attribute__((unused)) 3363tcg_out_opc_vreplgr2vr_h(TCGContext *s, TCGReg vd, TCGReg j) 3364{ 3365 tcg_out32(s, encode_vdj_insn(OPC_VREPLGR2VR_H, vd, j)); 3366} 3367 3368/* Emits the `vreplgr2vr.w vd, j` instruction. */ 3369static void __attribute__((unused)) 3370tcg_out_opc_vreplgr2vr_w(TCGContext *s, TCGReg vd, TCGReg j) 3371{ 3372 tcg_out32(s, encode_vdj_insn(OPC_VREPLGR2VR_W, vd, j)); 3373} 3374 3375/* Emits the `vreplgr2vr.d vd, j` instruction. */ 3376static void __attribute__((unused)) 3377tcg_out_opc_vreplgr2vr_d(TCGContext *s, TCGReg vd, TCGReg j) 3378{ 3379 tcg_out32(s, encode_vdj_insn(OPC_VREPLGR2VR_D, vd, j)); 3380} 3381 3382/* Emits the `vrotri.b vd, vj, uk3` instruction. */ 3383static void __attribute__((unused)) 3384tcg_out_opc_vrotri_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3) 3385{ 3386 tcg_out32(s, encode_vdvjuk3_insn(OPC_VROTRI_B, vd, vj, uk3)); 3387} 3388 3389/* Emits the `vrotri.h vd, vj, uk4` instruction. */ 3390static void __attribute__((unused)) 3391tcg_out_opc_vrotri_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4) 3392{ 3393 tcg_out32(s, encode_vdvjuk4_insn(OPC_VROTRI_H, vd, vj, uk4)); 3394} 3395 3396/* Emits the `vrotri.w vd, vj, uk5` instruction. */ 3397static void __attribute__((unused)) 3398tcg_out_opc_vrotri_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3399{ 3400 tcg_out32(s, encode_vdvjuk5_insn(OPC_VROTRI_W, vd, vj, uk5)); 3401} 3402 3403/* Emits the `vrotri.d vd, vj, uk6` instruction. */ 3404static void __attribute__((unused)) 3405tcg_out_opc_vrotri_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6) 3406{ 3407 tcg_out32(s, encode_vdvjuk6_insn(OPC_VROTRI_D, vd, vj, uk6)); 3408} 3409 3410/* Emits the `vinsgr2vr.b vd, j, uk4` instruction. */ 3411static void __attribute__((unused)) 3412tcg_out_opc_vinsgr2vr_b(TCGContext *s, TCGReg vd, TCGReg j, uint32_t uk4) 3413{ 3414 tcg_out32(s, encode_vdjuk4_insn(OPC_VINSGR2VR_B, vd, j, uk4)); 3415} 3416 3417/* Emits the `vinsgr2vr.h vd, j, uk3` instruction. */ 3418static void __attribute__((unused)) 3419tcg_out_opc_vinsgr2vr_h(TCGContext *s, TCGReg vd, TCGReg j, uint32_t uk3) 3420{ 3421 tcg_out32(s, encode_vdjuk3_insn(OPC_VINSGR2VR_H, vd, j, uk3)); 3422} 3423 3424/* Emits the `vinsgr2vr.w vd, j, uk2` instruction. */ 3425static void __attribute__((unused)) 3426tcg_out_opc_vinsgr2vr_w(TCGContext *s, TCGReg vd, TCGReg j, uint32_t uk2) 3427{ 3428 tcg_out32(s, encode_vdjuk2_insn(OPC_VINSGR2VR_W, vd, j, uk2)); 3429} 3430 3431/* Emits the `vinsgr2vr.d vd, j, uk1` instruction. */ 3432static void __attribute__((unused)) 3433tcg_out_opc_vinsgr2vr_d(TCGContext *s, TCGReg vd, TCGReg j, uint32_t uk1) 3434{ 3435 tcg_out32(s, encode_vdjuk1_insn(OPC_VINSGR2VR_D, vd, j, uk1)); 3436} 3437 3438/* Emits the `vpickve2gr.b d, vj, uk4` instruction. */ 3439static void __attribute__((unused)) 3440tcg_out_opc_vpickve2gr_b(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk4) 3441{ 3442 tcg_out32(s, encode_dvjuk4_insn(OPC_VPICKVE2GR_B, d, vj, uk4)); 3443} 3444 3445/* Emits the `vpickve2gr.h d, vj, uk3` instruction. */ 3446static void __attribute__((unused)) 3447tcg_out_opc_vpickve2gr_h(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk3) 3448{ 3449 tcg_out32(s, encode_dvjuk3_insn(OPC_VPICKVE2GR_H, d, vj, uk3)); 3450} 3451 3452/* Emits the `vpickve2gr.w d, vj, uk2` instruction. */ 3453static void __attribute__((unused)) 3454tcg_out_opc_vpickve2gr_w(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk2) 3455{ 3456 tcg_out32(s, encode_dvjuk2_insn(OPC_VPICKVE2GR_W, d, vj, uk2)); 3457} 3458 3459/* Emits the `vpickve2gr.d d, vj, uk1` instruction. */ 3460static void __attribute__((unused)) 3461tcg_out_opc_vpickve2gr_d(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk1) 3462{ 3463 tcg_out32(s, encode_dvjuk1_insn(OPC_VPICKVE2GR_D, d, vj, uk1)); 3464} 3465 3466/* Emits the `vpickve2gr.bu d, vj, uk4` instruction. */ 3467static void __attribute__((unused)) 3468tcg_out_opc_vpickve2gr_bu(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk4) 3469{ 3470 tcg_out32(s, encode_dvjuk4_insn(OPC_VPICKVE2GR_BU, d, vj, uk4)); 3471} 3472 3473/* Emits the `vpickve2gr.hu d, vj, uk3` instruction. */ 3474static void __attribute__((unused)) 3475tcg_out_opc_vpickve2gr_hu(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk3) 3476{ 3477 tcg_out32(s, encode_dvjuk3_insn(OPC_VPICKVE2GR_HU, d, vj, uk3)); 3478} 3479 3480/* Emits the `vpickve2gr.wu d, vj, uk2` instruction. */ 3481static void __attribute__((unused)) 3482tcg_out_opc_vpickve2gr_wu(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk2) 3483{ 3484 tcg_out32(s, encode_dvjuk2_insn(OPC_VPICKVE2GR_WU, d, vj, uk2)); 3485} 3486 3487/* Emits the `vpickve2gr.du d, vj, uk1` instruction. */ 3488static void __attribute__((unused)) 3489tcg_out_opc_vpickve2gr_du(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk1) 3490{ 3491 tcg_out32(s, encode_dvjuk1_insn(OPC_VPICKVE2GR_DU, d, vj, uk1)); 3492} 3493 3494/* Emits the `vreplvei.b vd, vj, uk4` instruction. */ 3495static void __attribute__((unused)) 3496tcg_out_opc_vreplvei_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4) 3497{ 3498 tcg_out32(s, encode_vdvjuk4_insn(OPC_VREPLVEI_B, vd, vj, uk4)); 3499} 3500 3501/* Emits the `vreplvei.h vd, vj, uk3` instruction. */ 3502static void __attribute__((unused)) 3503tcg_out_opc_vreplvei_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3) 3504{ 3505 tcg_out32(s, encode_vdvjuk3_insn(OPC_VREPLVEI_H, vd, vj, uk3)); 3506} 3507 3508/* Emits the `vreplvei.w vd, vj, uk2` instruction. */ 3509static void __attribute__((unused)) 3510tcg_out_opc_vreplvei_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk2) 3511{ 3512 tcg_out32(s, encode_vdvjuk2_insn(OPC_VREPLVEI_W, vd, vj, uk2)); 3513} 3514 3515/* Emits the `vreplvei.d vd, vj, uk1` instruction. */ 3516static void __attribute__((unused)) 3517tcg_out_opc_vreplvei_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk1) 3518{ 3519 tcg_out32(s, encode_vdvjuk1_insn(OPC_VREPLVEI_D, vd, vj, uk1)); 3520} 3521 3522/* Emits the `vbitclri.b vd, vj, uk3` instruction. */ 3523static void __attribute__((unused)) 3524tcg_out_opc_vbitclri_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3) 3525{ 3526 tcg_out32(s, encode_vdvjuk3_insn(OPC_VBITCLRI_B, vd, vj, uk3)); 3527} 3528 3529/* Emits the `vbitclri.h vd, vj, uk4` instruction. */ 3530static void __attribute__((unused)) 3531tcg_out_opc_vbitclri_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4) 3532{ 3533 tcg_out32(s, encode_vdvjuk4_insn(OPC_VBITCLRI_H, vd, vj, uk4)); 3534} 3535 3536/* Emits the `vbitclri.w vd, vj, uk5` instruction. */ 3537static void __attribute__((unused)) 3538tcg_out_opc_vbitclri_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3539{ 3540 tcg_out32(s, encode_vdvjuk5_insn(OPC_VBITCLRI_W, vd, vj, uk5)); 3541} 3542 3543/* Emits the `vbitclri.d vd, vj, uk6` instruction. */ 3544static void __attribute__((unused)) 3545tcg_out_opc_vbitclri_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6) 3546{ 3547 tcg_out32(s, encode_vdvjuk6_insn(OPC_VBITCLRI_D, vd, vj, uk6)); 3548} 3549 3550/* Emits the `vbitseti.b vd, vj, uk3` instruction. */ 3551static void __attribute__((unused)) 3552tcg_out_opc_vbitseti_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3) 3553{ 3554 tcg_out32(s, encode_vdvjuk3_insn(OPC_VBITSETI_B, vd, vj, uk3)); 3555} 3556 3557/* Emits the `vbitseti.h vd, vj, uk4` instruction. */ 3558static void __attribute__((unused)) 3559tcg_out_opc_vbitseti_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4) 3560{ 3561 tcg_out32(s, encode_vdvjuk4_insn(OPC_VBITSETI_H, vd, vj, uk4)); 3562} 3563 3564/* Emits the `vbitseti.w vd, vj, uk5` instruction. */ 3565static void __attribute__((unused)) 3566tcg_out_opc_vbitseti_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3567{ 3568 tcg_out32(s, encode_vdvjuk5_insn(OPC_VBITSETI_W, vd, vj, uk5)); 3569} 3570 3571/* Emits the `vbitseti.d vd, vj, uk6` instruction. */ 3572static void __attribute__((unused)) 3573tcg_out_opc_vbitseti_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6) 3574{ 3575 tcg_out32(s, encode_vdvjuk6_insn(OPC_VBITSETI_D, vd, vj, uk6)); 3576} 3577 3578/* Emits the `vbitrevi.b vd, vj, uk3` instruction. */ 3579static void __attribute__((unused)) 3580tcg_out_opc_vbitrevi_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3) 3581{ 3582 tcg_out32(s, encode_vdvjuk3_insn(OPC_VBITREVI_B, vd, vj, uk3)); 3583} 3584 3585/* Emits the `vbitrevi.h vd, vj, uk4` instruction. */ 3586static void __attribute__((unused)) 3587tcg_out_opc_vbitrevi_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4) 3588{ 3589 tcg_out32(s, encode_vdvjuk4_insn(OPC_VBITREVI_H, vd, vj, uk4)); 3590} 3591 3592/* Emits the `vbitrevi.w vd, vj, uk5` instruction. */ 3593static void __attribute__((unused)) 3594tcg_out_opc_vbitrevi_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3595{ 3596 tcg_out32(s, encode_vdvjuk5_insn(OPC_VBITREVI_W, vd, vj, uk5)); 3597} 3598 3599/* Emits the `vbitrevi.d vd, vj, uk6` instruction. */ 3600static void __attribute__((unused)) 3601tcg_out_opc_vbitrevi_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6) 3602{ 3603 tcg_out32(s, encode_vdvjuk6_insn(OPC_VBITREVI_D, vd, vj, uk6)); 3604} 3605 3606/* Emits the `vslli.b vd, vj, uk3` instruction. */ 3607static void __attribute__((unused)) 3608tcg_out_opc_vslli_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3) 3609{ 3610 tcg_out32(s, encode_vdvjuk3_insn(OPC_VSLLI_B, vd, vj, uk3)); 3611} 3612 3613/* Emits the `vslli.h vd, vj, uk4` instruction. */ 3614static void __attribute__((unused)) 3615tcg_out_opc_vslli_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4) 3616{ 3617 tcg_out32(s, encode_vdvjuk4_insn(OPC_VSLLI_H, vd, vj, uk4)); 3618} 3619 3620/* Emits the `vslli.w vd, vj, uk5` instruction. */ 3621static void __attribute__((unused)) 3622tcg_out_opc_vslli_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3623{ 3624 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLLI_W, vd, vj, uk5)); 3625} 3626 3627/* Emits the `vslli.d vd, vj, uk6` instruction. */ 3628static void __attribute__((unused)) 3629tcg_out_opc_vslli_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6) 3630{ 3631 tcg_out32(s, encode_vdvjuk6_insn(OPC_VSLLI_D, vd, vj, uk6)); 3632} 3633 3634/* Emits the `vsrli.b vd, vj, uk3` instruction. */ 3635static void __attribute__((unused)) 3636tcg_out_opc_vsrli_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3) 3637{ 3638 tcg_out32(s, encode_vdvjuk3_insn(OPC_VSRLI_B, vd, vj, uk3)); 3639} 3640 3641/* Emits the `vsrli.h vd, vj, uk4` instruction. */ 3642static void __attribute__((unused)) 3643tcg_out_opc_vsrli_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4) 3644{ 3645 tcg_out32(s, encode_vdvjuk4_insn(OPC_VSRLI_H, vd, vj, uk4)); 3646} 3647 3648/* Emits the `vsrli.w vd, vj, uk5` instruction. */ 3649static void __attribute__((unused)) 3650tcg_out_opc_vsrli_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3651{ 3652 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSRLI_W, vd, vj, uk5)); 3653} 3654 3655/* Emits the `vsrli.d vd, vj, uk6` instruction. */ 3656static void __attribute__((unused)) 3657tcg_out_opc_vsrli_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6) 3658{ 3659 tcg_out32(s, encode_vdvjuk6_insn(OPC_VSRLI_D, vd, vj, uk6)); 3660} 3661 3662/* Emits the `vsrai.b vd, vj, uk3` instruction. */ 3663static void __attribute__((unused)) 3664tcg_out_opc_vsrai_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3) 3665{ 3666 tcg_out32(s, encode_vdvjuk3_insn(OPC_VSRAI_B, vd, vj, uk3)); 3667} 3668 3669/* Emits the `vsrai.h vd, vj, uk4` instruction. */ 3670static void __attribute__((unused)) 3671tcg_out_opc_vsrai_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4) 3672{ 3673 tcg_out32(s, encode_vdvjuk4_insn(OPC_VSRAI_H, vd, vj, uk4)); 3674} 3675 3676/* Emits the `vsrai.w vd, vj, uk5` instruction. */ 3677static void __attribute__((unused)) 3678tcg_out_opc_vsrai_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5) 3679{ 3680 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSRAI_W, vd, vj, uk5)); 3681} 3682 3683/* Emits the `vsrai.d vd, vj, uk6` instruction. */ 3684static void __attribute__((unused)) 3685tcg_out_opc_vsrai_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6) 3686{ 3687 tcg_out32(s, encode_vdvjuk6_insn(OPC_VSRAI_D, vd, vj, uk6)); 3688} 3689 3690/* Emits the `vbitseli.b vd, vj, uk8` instruction. */ 3691static void __attribute__((unused)) 3692tcg_out_opc_vbitseli_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8) 3693{ 3694 tcg_out32(s, encode_vdvjuk8_insn(OPC_VBITSELI_B, vd, vj, uk8)); 3695} 3696 3697/* Emits the `vandi.b vd, vj, uk8` instruction. */ 3698static void __attribute__((unused)) 3699tcg_out_opc_vandi_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8) 3700{ 3701 tcg_out32(s, encode_vdvjuk8_insn(OPC_VANDI_B, vd, vj, uk8)); 3702} 3703 3704/* Emits the `vori.b vd, vj, uk8` instruction. */ 3705static void __attribute__((unused)) 3706tcg_out_opc_vori_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8) 3707{ 3708 tcg_out32(s, encode_vdvjuk8_insn(OPC_VORI_B, vd, vj, uk8)); 3709} 3710 3711/* Emits the `vxori.b vd, vj, uk8` instruction. */ 3712static void __attribute__((unused)) 3713tcg_out_opc_vxori_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8) 3714{ 3715 tcg_out32(s, encode_vdvjuk8_insn(OPC_VXORI_B, vd, vj, uk8)); 3716} 3717 3718/* Emits the `vnori.b vd, vj, uk8` instruction. */ 3719static void __attribute__((unused)) 3720tcg_out_opc_vnori_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8) 3721{ 3722 tcg_out32(s, encode_vdvjuk8_insn(OPC_VNORI_B, vd, vj, uk8)); 3723} 3724 3725/* Emits the `vldi vd, sj13` instruction. */ 3726static void __attribute__((unused)) 3727tcg_out_opc_vldi(TCGContext *s, TCGReg vd, int32_t sj13) 3728{ 3729 tcg_out32(s, encode_vdsj13_insn(OPC_VLDI, vd, sj13)); 3730} 3731 3732/* Emits the `xvseq.b xd, xj, xk` instruction. */ 3733static void __attribute__((unused)) 3734tcg_out_opc_xvseq_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3735{ 3736 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSEQ_B, xd, xj, xk)); 3737} 3738 3739/* Emits the `xvseq.h xd, xj, xk` instruction. */ 3740static void __attribute__((unused)) 3741tcg_out_opc_xvseq_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3742{ 3743 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSEQ_H, xd, xj, xk)); 3744} 3745 3746/* Emits the `xvseq.w xd, xj, xk` instruction. */ 3747static void __attribute__((unused)) 3748tcg_out_opc_xvseq_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3749{ 3750 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSEQ_W, xd, xj, xk)); 3751} 3752 3753/* Emits the `xvseq.d xd, xj, xk` instruction. */ 3754static void __attribute__((unused)) 3755tcg_out_opc_xvseq_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3756{ 3757 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSEQ_D, xd, xj, xk)); 3758} 3759 3760/* Emits the `xvsle.b xd, xj, xk` instruction. */ 3761static void __attribute__((unused)) 3762tcg_out_opc_xvsle_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3763{ 3764 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_B, xd, xj, xk)); 3765} 3766 3767/* Emits the `xvsle.h xd, xj, xk` instruction. */ 3768static void __attribute__((unused)) 3769tcg_out_opc_xvsle_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3770{ 3771 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_H, xd, xj, xk)); 3772} 3773 3774/* Emits the `xvsle.w xd, xj, xk` instruction. */ 3775static void __attribute__((unused)) 3776tcg_out_opc_xvsle_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3777{ 3778 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_W, xd, xj, xk)); 3779} 3780 3781/* Emits the `xvsle.d xd, xj, xk` instruction. */ 3782static void __attribute__((unused)) 3783tcg_out_opc_xvsle_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3784{ 3785 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_D, xd, xj, xk)); 3786} 3787 3788/* Emits the `xvsle.bu xd, xj, xk` instruction. */ 3789static void __attribute__((unused)) 3790tcg_out_opc_xvsle_bu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3791{ 3792 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_BU, xd, xj, xk)); 3793} 3794 3795/* Emits the `xvsle.hu xd, xj, xk` instruction. */ 3796static void __attribute__((unused)) 3797tcg_out_opc_xvsle_hu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3798{ 3799 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_HU, xd, xj, xk)); 3800} 3801 3802/* Emits the `xvsle.wu xd, xj, xk` instruction. */ 3803static void __attribute__((unused)) 3804tcg_out_opc_xvsle_wu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3805{ 3806 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_WU, xd, xj, xk)); 3807} 3808 3809/* Emits the `xvsle.du xd, xj, xk` instruction. */ 3810static void __attribute__((unused)) 3811tcg_out_opc_xvsle_du(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3812{ 3813 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_DU, xd, xj, xk)); 3814} 3815 3816/* Emits the `xvslt.b xd, xj, xk` instruction. */ 3817static void __attribute__((unused)) 3818tcg_out_opc_xvslt_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3819{ 3820 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_B, xd, xj, xk)); 3821} 3822 3823/* Emits the `xvslt.h xd, xj, xk` instruction. */ 3824static void __attribute__((unused)) 3825tcg_out_opc_xvslt_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3826{ 3827 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_H, xd, xj, xk)); 3828} 3829 3830/* Emits the `xvslt.w xd, xj, xk` instruction. */ 3831static void __attribute__((unused)) 3832tcg_out_opc_xvslt_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3833{ 3834 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_W, xd, xj, xk)); 3835} 3836 3837/* Emits the `xvslt.d xd, xj, xk` instruction. */ 3838static void __attribute__((unused)) 3839tcg_out_opc_xvslt_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3840{ 3841 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_D, xd, xj, xk)); 3842} 3843 3844/* Emits the `xvslt.bu xd, xj, xk` instruction. */ 3845static void __attribute__((unused)) 3846tcg_out_opc_xvslt_bu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3847{ 3848 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_BU, xd, xj, xk)); 3849} 3850 3851/* Emits the `xvslt.hu xd, xj, xk` instruction. */ 3852static void __attribute__((unused)) 3853tcg_out_opc_xvslt_hu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3854{ 3855 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_HU, xd, xj, xk)); 3856} 3857 3858/* Emits the `xvslt.wu xd, xj, xk` instruction. */ 3859static void __attribute__((unused)) 3860tcg_out_opc_xvslt_wu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3861{ 3862 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_WU, xd, xj, xk)); 3863} 3864 3865/* Emits the `xvslt.du xd, xj, xk` instruction. */ 3866static void __attribute__((unused)) 3867tcg_out_opc_xvslt_du(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3868{ 3869 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_DU, xd, xj, xk)); 3870} 3871 3872/* Emits the `xvadd.b xd, xj, xk` instruction. */ 3873static void __attribute__((unused)) 3874tcg_out_opc_xvadd_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3875{ 3876 tcg_out32(s, encode_xdxjxk_insn(OPC_XVADD_B, xd, xj, xk)); 3877} 3878 3879/* Emits the `xvadd.h xd, xj, xk` instruction. */ 3880static void __attribute__((unused)) 3881tcg_out_opc_xvadd_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3882{ 3883 tcg_out32(s, encode_xdxjxk_insn(OPC_XVADD_H, xd, xj, xk)); 3884} 3885 3886/* Emits the `xvadd.w xd, xj, xk` instruction. */ 3887static void __attribute__((unused)) 3888tcg_out_opc_xvadd_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3889{ 3890 tcg_out32(s, encode_xdxjxk_insn(OPC_XVADD_W, xd, xj, xk)); 3891} 3892 3893/* Emits the `xvadd.d xd, xj, xk` instruction. */ 3894static void __attribute__((unused)) 3895tcg_out_opc_xvadd_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3896{ 3897 tcg_out32(s, encode_xdxjxk_insn(OPC_XVADD_D, xd, xj, xk)); 3898} 3899 3900/* Emits the `xvsub.b xd, xj, xk` instruction. */ 3901static void __attribute__((unused)) 3902tcg_out_opc_xvsub_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3903{ 3904 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSUB_B, xd, xj, xk)); 3905} 3906 3907/* Emits the `xvsub.h xd, xj, xk` instruction. */ 3908static void __attribute__((unused)) 3909tcg_out_opc_xvsub_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3910{ 3911 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSUB_H, xd, xj, xk)); 3912} 3913 3914/* Emits the `xvsub.w xd, xj, xk` instruction. */ 3915static void __attribute__((unused)) 3916tcg_out_opc_xvsub_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3917{ 3918 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSUB_W, xd, xj, xk)); 3919} 3920 3921/* Emits the `xvsub.d xd, xj, xk` instruction. */ 3922static void __attribute__((unused)) 3923tcg_out_opc_xvsub_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3924{ 3925 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSUB_D, xd, xj, xk)); 3926} 3927 3928/* Emits the `xvsadd.b xd, xj, xk` instruction. */ 3929static void __attribute__((unused)) 3930tcg_out_opc_xvsadd_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3931{ 3932 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_B, xd, xj, xk)); 3933} 3934 3935/* Emits the `xvsadd.h xd, xj, xk` instruction. */ 3936static void __attribute__((unused)) 3937tcg_out_opc_xvsadd_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3938{ 3939 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_H, xd, xj, xk)); 3940} 3941 3942/* Emits the `xvsadd.w xd, xj, xk` instruction. */ 3943static void __attribute__((unused)) 3944tcg_out_opc_xvsadd_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3945{ 3946 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_W, xd, xj, xk)); 3947} 3948 3949/* Emits the `xvsadd.d xd, xj, xk` instruction. */ 3950static void __attribute__((unused)) 3951tcg_out_opc_xvsadd_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3952{ 3953 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_D, xd, xj, xk)); 3954} 3955 3956/* Emits the `xvssub.b xd, xj, xk` instruction. */ 3957static void __attribute__((unused)) 3958tcg_out_opc_xvssub_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3959{ 3960 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_B, xd, xj, xk)); 3961} 3962 3963/* Emits the `xvssub.h xd, xj, xk` instruction. */ 3964static void __attribute__((unused)) 3965tcg_out_opc_xvssub_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3966{ 3967 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_H, xd, xj, xk)); 3968} 3969 3970/* Emits the `xvssub.w xd, xj, xk` instruction. */ 3971static void __attribute__((unused)) 3972tcg_out_opc_xvssub_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3973{ 3974 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_W, xd, xj, xk)); 3975} 3976 3977/* Emits the `xvssub.d xd, xj, xk` instruction. */ 3978static void __attribute__((unused)) 3979tcg_out_opc_xvssub_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3980{ 3981 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_D, xd, xj, xk)); 3982} 3983 3984/* Emits the `xvsadd.bu xd, xj, xk` instruction. */ 3985static void __attribute__((unused)) 3986tcg_out_opc_xvsadd_bu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3987{ 3988 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_BU, xd, xj, xk)); 3989} 3990 3991/* Emits the `xvsadd.hu xd, xj, xk` instruction. */ 3992static void __attribute__((unused)) 3993tcg_out_opc_xvsadd_hu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 3994{ 3995 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_HU, xd, xj, xk)); 3996} 3997 3998/* Emits the `xvsadd.wu xd, xj, xk` instruction. */ 3999static void __attribute__((unused)) 4000tcg_out_opc_xvsadd_wu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4001{ 4002 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_WU, xd, xj, xk)); 4003} 4004 4005/* Emits the `xvsadd.du xd, xj, xk` instruction. */ 4006static void __attribute__((unused)) 4007tcg_out_opc_xvsadd_du(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4008{ 4009 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_DU, xd, xj, xk)); 4010} 4011 4012/* Emits the `xvssub.bu xd, xj, xk` instruction. */ 4013static void __attribute__((unused)) 4014tcg_out_opc_xvssub_bu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4015{ 4016 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_BU, xd, xj, xk)); 4017} 4018 4019/* Emits the `xvssub.hu xd, xj, xk` instruction. */ 4020static void __attribute__((unused)) 4021tcg_out_opc_xvssub_hu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4022{ 4023 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_HU, xd, xj, xk)); 4024} 4025 4026/* Emits the `xvssub.wu xd, xj, xk` instruction. */ 4027static void __attribute__((unused)) 4028tcg_out_opc_xvssub_wu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4029{ 4030 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_WU, xd, xj, xk)); 4031} 4032 4033/* Emits the `xvssub.du xd, xj, xk` instruction. */ 4034static void __attribute__((unused)) 4035tcg_out_opc_xvssub_du(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4036{ 4037 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_DU, xd, xj, xk)); 4038} 4039 4040/* Emits the `xvmax.b xd, xj, xk` instruction. */ 4041static void __attribute__((unused)) 4042tcg_out_opc_xvmax_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4043{ 4044 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_B, xd, xj, xk)); 4045} 4046 4047/* Emits the `xvmax.h xd, xj, xk` instruction. */ 4048static void __attribute__((unused)) 4049tcg_out_opc_xvmax_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4050{ 4051 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_H, xd, xj, xk)); 4052} 4053 4054/* Emits the `xvmax.w xd, xj, xk` instruction. */ 4055static void __attribute__((unused)) 4056tcg_out_opc_xvmax_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4057{ 4058 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_W, xd, xj, xk)); 4059} 4060 4061/* Emits the `xvmax.d xd, xj, xk` instruction. */ 4062static void __attribute__((unused)) 4063tcg_out_opc_xvmax_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4064{ 4065 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_D, xd, xj, xk)); 4066} 4067 4068/* Emits the `xvmin.b xd, xj, xk` instruction. */ 4069static void __attribute__((unused)) 4070tcg_out_opc_xvmin_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4071{ 4072 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_B, xd, xj, xk)); 4073} 4074 4075/* Emits the `xvmin.h xd, xj, xk` instruction. */ 4076static void __attribute__((unused)) 4077tcg_out_opc_xvmin_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4078{ 4079 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_H, xd, xj, xk)); 4080} 4081 4082/* Emits the `xvmin.w xd, xj, xk` instruction. */ 4083static void __attribute__((unused)) 4084tcg_out_opc_xvmin_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4085{ 4086 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_W, xd, xj, xk)); 4087} 4088 4089/* Emits the `xvmin.d xd, xj, xk` instruction. */ 4090static void __attribute__((unused)) 4091tcg_out_opc_xvmin_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4092{ 4093 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_D, xd, xj, xk)); 4094} 4095 4096/* Emits the `xvmax.bu xd, xj, xk` instruction. */ 4097static void __attribute__((unused)) 4098tcg_out_opc_xvmax_bu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4099{ 4100 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_BU, xd, xj, xk)); 4101} 4102 4103/* Emits the `xvmax.hu xd, xj, xk` instruction. */ 4104static void __attribute__((unused)) 4105tcg_out_opc_xvmax_hu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4106{ 4107 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_HU, xd, xj, xk)); 4108} 4109 4110/* Emits the `xvmax.wu xd, xj, xk` instruction. */ 4111static void __attribute__((unused)) 4112tcg_out_opc_xvmax_wu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4113{ 4114 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_WU, xd, xj, xk)); 4115} 4116 4117/* Emits the `xvmax.du xd, xj, xk` instruction. */ 4118static void __attribute__((unused)) 4119tcg_out_opc_xvmax_du(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4120{ 4121 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_DU, xd, xj, xk)); 4122} 4123 4124/* Emits the `xvmin.bu xd, xj, xk` instruction. */ 4125static void __attribute__((unused)) 4126tcg_out_opc_xvmin_bu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4127{ 4128 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_BU, xd, xj, xk)); 4129} 4130 4131/* Emits the `xvmin.hu xd, xj, xk` instruction. */ 4132static void __attribute__((unused)) 4133tcg_out_opc_xvmin_hu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4134{ 4135 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_HU, xd, xj, xk)); 4136} 4137 4138/* Emits the `xvmin.wu xd, xj, xk` instruction. */ 4139static void __attribute__((unused)) 4140tcg_out_opc_xvmin_wu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4141{ 4142 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_WU, xd, xj, xk)); 4143} 4144 4145/* Emits the `xvmin.du xd, xj, xk` instruction. */ 4146static void __attribute__((unused)) 4147tcg_out_opc_xvmin_du(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4148{ 4149 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_DU, xd, xj, xk)); 4150} 4151 4152/* Emits the `xvmul.b xd, xj, xk` instruction. */ 4153static void __attribute__((unused)) 4154tcg_out_opc_xvmul_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4155{ 4156 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMUL_B, xd, xj, xk)); 4157} 4158 4159/* Emits the `xvmul.h xd, xj, xk` instruction. */ 4160static void __attribute__((unused)) 4161tcg_out_opc_xvmul_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4162{ 4163 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMUL_H, xd, xj, xk)); 4164} 4165 4166/* Emits the `xvmul.w xd, xj, xk` instruction. */ 4167static void __attribute__((unused)) 4168tcg_out_opc_xvmul_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4169{ 4170 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMUL_W, xd, xj, xk)); 4171} 4172 4173/* Emits the `xvmul.d xd, xj, xk` instruction. */ 4174static void __attribute__((unused)) 4175tcg_out_opc_xvmul_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4176{ 4177 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMUL_D, xd, xj, xk)); 4178} 4179 4180/* Emits the `xvsll.b xd, xj, xk` instruction. */ 4181static void __attribute__((unused)) 4182tcg_out_opc_xvsll_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4183{ 4184 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLL_B, xd, xj, xk)); 4185} 4186 4187/* Emits the `xvsll.h xd, xj, xk` instruction. */ 4188static void __attribute__((unused)) 4189tcg_out_opc_xvsll_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4190{ 4191 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLL_H, xd, xj, xk)); 4192} 4193 4194/* Emits the `xvsll.w xd, xj, xk` instruction. */ 4195static void __attribute__((unused)) 4196tcg_out_opc_xvsll_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4197{ 4198 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLL_W, xd, xj, xk)); 4199} 4200 4201/* Emits the `xvsll.d xd, xj, xk` instruction. */ 4202static void __attribute__((unused)) 4203tcg_out_opc_xvsll_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4204{ 4205 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLL_D, xd, xj, xk)); 4206} 4207 4208/* Emits the `xvsrl.b xd, xj, xk` instruction. */ 4209static void __attribute__((unused)) 4210tcg_out_opc_xvsrl_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4211{ 4212 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRL_B, xd, xj, xk)); 4213} 4214 4215/* Emits the `xvsrl.h xd, xj, xk` instruction. */ 4216static void __attribute__((unused)) 4217tcg_out_opc_xvsrl_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4218{ 4219 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRL_H, xd, xj, xk)); 4220} 4221 4222/* Emits the `xvsrl.w xd, xj, xk` instruction. */ 4223static void __attribute__((unused)) 4224tcg_out_opc_xvsrl_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4225{ 4226 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRL_W, xd, xj, xk)); 4227} 4228 4229/* Emits the `xvsrl.d xd, xj, xk` instruction. */ 4230static void __attribute__((unused)) 4231tcg_out_opc_xvsrl_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4232{ 4233 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRL_D, xd, xj, xk)); 4234} 4235 4236/* Emits the `xvsra.b xd, xj, xk` instruction. */ 4237static void __attribute__((unused)) 4238tcg_out_opc_xvsra_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4239{ 4240 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRA_B, xd, xj, xk)); 4241} 4242 4243/* Emits the `xvsra.h xd, xj, xk` instruction. */ 4244static void __attribute__((unused)) 4245tcg_out_opc_xvsra_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4246{ 4247 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRA_H, xd, xj, xk)); 4248} 4249 4250/* Emits the `xvsra.w xd, xj, xk` instruction. */ 4251static void __attribute__((unused)) 4252tcg_out_opc_xvsra_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4253{ 4254 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRA_W, xd, xj, xk)); 4255} 4256 4257/* Emits the `xvsra.d xd, xj, xk` instruction. */ 4258static void __attribute__((unused)) 4259tcg_out_opc_xvsra_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4260{ 4261 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRA_D, xd, xj, xk)); 4262} 4263 4264/* Emits the `xvrotr.b xd, xj, xk` instruction. */ 4265static void __attribute__((unused)) 4266tcg_out_opc_xvrotr_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4267{ 4268 tcg_out32(s, encode_xdxjxk_insn(OPC_XVROTR_B, xd, xj, xk)); 4269} 4270 4271/* Emits the `xvrotr.h xd, xj, xk` instruction. */ 4272static void __attribute__((unused)) 4273tcg_out_opc_xvrotr_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4274{ 4275 tcg_out32(s, encode_xdxjxk_insn(OPC_XVROTR_H, xd, xj, xk)); 4276} 4277 4278/* Emits the `xvrotr.w xd, xj, xk` instruction. */ 4279static void __attribute__((unused)) 4280tcg_out_opc_xvrotr_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4281{ 4282 tcg_out32(s, encode_xdxjxk_insn(OPC_XVROTR_W, xd, xj, xk)); 4283} 4284 4285/* Emits the `xvrotr.d xd, xj, xk` instruction. */ 4286static void __attribute__((unused)) 4287tcg_out_opc_xvrotr_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4288{ 4289 tcg_out32(s, encode_xdxjxk_insn(OPC_XVROTR_D, xd, xj, xk)); 4290} 4291 4292/* Emits the `xvreplve.b xd, xj, k` instruction. */ 4293static void __attribute__((unused)) 4294tcg_out_opc_xvreplve_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg k) 4295{ 4296 tcg_out32(s, encode_xdxjk_insn(OPC_XVREPLVE_B, xd, xj, k)); 4297} 4298 4299/* Emits the `xvreplve.h xd, xj, k` instruction. */ 4300static void __attribute__((unused)) 4301tcg_out_opc_xvreplve_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg k) 4302{ 4303 tcg_out32(s, encode_xdxjk_insn(OPC_XVREPLVE_H, xd, xj, k)); 4304} 4305 4306/* Emits the `xvreplve.w xd, xj, k` instruction. */ 4307static void __attribute__((unused)) 4308tcg_out_opc_xvreplve_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg k) 4309{ 4310 tcg_out32(s, encode_xdxjk_insn(OPC_XVREPLVE_W, xd, xj, k)); 4311} 4312 4313/* Emits the `xvreplve.d xd, xj, k` instruction. */ 4314static void __attribute__((unused)) 4315tcg_out_opc_xvreplve_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg k) 4316{ 4317 tcg_out32(s, encode_xdxjk_insn(OPC_XVREPLVE_D, xd, xj, k)); 4318} 4319 4320/* Emits the `xvand.v xd, xj, xk` instruction. */ 4321static void __attribute__((unused)) 4322tcg_out_opc_xvand_v(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4323{ 4324 tcg_out32(s, encode_xdxjxk_insn(OPC_XVAND_V, xd, xj, xk)); 4325} 4326 4327/* Emits the `xvor.v xd, xj, xk` instruction. */ 4328static void __attribute__((unused)) 4329tcg_out_opc_xvor_v(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4330{ 4331 tcg_out32(s, encode_xdxjxk_insn(OPC_XVOR_V, xd, xj, xk)); 4332} 4333 4334/* Emits the `xvxor.v xd, xj, xk` instruction. */ 4335static void __attribute__((unused)) 4336tcg_out_opc_xvxor_v(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4337{ 4338 tcg_out32(s, encode_xdxjxk_insn(OPC_XVXOR_V, xd, xj, xk)); 4339} 4340 4341/* Emits the `xvnor.v xd, xj, xk` instruction. */ 4342static void __attribute__((unused)) 4343tcg_out_opc_xvnor_v(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4344{ 4345 tcg_out32(s, encode_xdxjxk_insn(OPC_XVNOR_V, xd, xj, xk)); 4346} 4347 4348/* Emits the `xvandn.v xd, xj, xk` instruction. */ 4349static void __attribute__((unused)) 4350tcg_out_opc_xvandn_v(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4351{ 4352 tcg_out32(s, encode_xdxjxk_insn(OPC_XVANDN_V, xd, xj, xk)); 4353} 4354 4355/* Emits the `xvorn.v xd, xj, xk` instruction. */ 4356static void __attribute__((unused)) 4357tcg_out_opc_xvorn_v(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk) 4358{ 4359 tcg_out32(s, encode_xdxjxk_insn(OPC_XVORN_V, xd, xj, xk)); 4360} 4361 4362/* Emits the `xvseqi.b xd, xj, sk5` instruction. */ 4363static void __attribute__((unused)) 4364tcg_out_opc_xvseqi_b(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4365{ 4366 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSEQI_B, xd, xj, sk5)); 4367} 4368 4369/* Emits the `xvseqi.h xd, xj, sk5` instruction. */ 4370static void __attribute__((unused)) 4371tcg_out_opc_xvseqi_h(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4372{ 4373 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSEQI_H, xd, xj, sk5)); 4374} 4375 4376/* Emits the `xvseqi.w xd, xj, sk5` instruction. */ 4377static void __attribute__((unused)) 4378tcg_out_opc_xvseqi_w(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4379{ 4380 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSEQI_W, xd, xj, sk5)); 4381} 4382 4383/* Emits the `xvseqi.d xd, xj, sk5` instruction. */ 4384static void __attribute__((unused)) 4385tcg_out_opc_xvseqi_d(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4386{ 4387 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSEQI_D, xd, xj, sk5)); 4388} 4389 4390/* Emits the `xvslei.b xd, xj, sk5` instruction. */ 4391static void __attribute__((unused)) 4392tcg_out_opc_xvslei_b(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4393{ 4394 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLEI_B, xd, xj, sk5)); 4395} 4396 4397/* Emits the `xvslei.h xd, xj, sk5` instruction. */ 4398static void __attribute__((unused)) 4399tcg_out_opc_xvslei_h(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4400{ 4401 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLEI_H, xd, xj, sk5)); 4402} 4403 4404/* Emits the `xvslei.w xd, xj, sk5` instruction. */ 4405static void __attribute__((unused)) 4406tcg_out_opc_xvslei_w(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4407{ 4408 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLEI_W, xd, xj, sk5)); 4409} 4410 4411/* Emits the `xvslei.d xd, xj, sk5` instruction. */ 4412static void __attribute__((unused)) 4413tcg_out_opc_xvslei_d(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4414{ 4415 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLEI_D, xd, xj, sk5)); 4416} 4417 4418/* Emits the `xvslei.bu xd, xj, uk5` instruction. */ 4419static void __attribute__((unused)) 4420tcg_out_opc_xvslei_bu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4421{ 4422 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLEI_BU, xd, xj, uk5)); 4423} 4424 4425/* Emits the `xvslei.hu xd, xj, uk5` instruction. */ 4426static void __attribute__((unused)) 4427tcg_out_opc_xvslei_hu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4428{ 4429 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLEI_HU, xd, xj, uk5)); 4430} 4431 4432/* Emits the `xvslei.wu xd, xj, uk5` instruction. */ 4433static void __attribute__((unused)) 4434tcg_out_opc_xvslei_wu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4435{ 4436 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLEI_WU, xd, xj, uk5)); 4437} 4438 4439/* Emits the `xvslei.du xd, xj, uk5` instruction. */ 4440static void __attribute__((unused)) 4441tcg_out_opc_xvslei_du(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4442{ 4443 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLEI_DU, xd, xj, uk5)); 4444} 4445 4446/* Emits the `xvslti.b xd, xj, sk5` instruction. */ 4447static void __attribute__((unused)) 4448tcg_out_opc_xvslti_b(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4449{ 4450 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLTI_B, xd, xj, sk5)); 4451} 4452 4453/* Emits the `xvslti.h xd, xj, sk5` instruction. */ 4454static void __attribute__((unused)) 4455tcg_out_opc_xvslti_h(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4456{ 4457 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLTI_H, xd, xj, sk5)); 4458} 4459 4460/* Emits the `xvslti.w xd, xj, sk5` instruction. */ 4461static void __attribute__((unused)) 4462tcg_out_opc_xvslti_w(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4463{ 4464 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLTI_W, xd, xj, sk5)); 4465} 4466 4467/* Emits the `xvslti.d xd, xj, sk5` instruction. */ 4468static void __attribute__((unused)) 4469tcg_out_opc_xvslti_d(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4470{ 4471 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLTI_D, xd, xj, sk5)); 4472} 4473 4474/* Emits the `xvslti.bu xd, xj, uk5` instruction. */ 4475static void __attribute__((unused)) 4476tcg_out_opc_xvslti_bu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4477{ 4478 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLTI_BU, xd, xj, uk5)); 4479} 4480 4481/* Emits the `xvslti.hu xd, xj, uk5` instruction. */ 4482static void __attribute__((unused)) 4483tcg_out_opc_xvslti_hu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4484{ 4485 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLTI_HU, xd, xj, uk5)); 4486} 4487 4488/* Emits the `xvslti.wu xd, xj, uk5` instruction. */ 4489static void __attribute__((unused)) 4490tcg_out_opc_xvslti_wu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4491{ 4492 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLTI_WU, xd, xj, uk5)); 4493} 4494 4495/* Emits the `xvslti.du xd, xj, uk5` instruction. */ 4496static void __attribute__((unused)) 4497tcg_out_opc_xvslti_du(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4498{ 4499 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLTI_DU, xd, xj, uk5)); 4500} 4501 4502/* Emits the `xvaddi.bu xd, xj, uk5` instruction. */ 4503static void __attribute__((unused)) 4504tcg_out_opc_xvaddi_bu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4505{ 4506 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVADDI_BU, xd, xj, uk5)); 4507} 4508 4509/* Emits the `xvaddi.hu xd, xj, uk5` instruction. */ 4510static void __attribute__((unused)) 4511tcg_out_opc_xvaddi_hu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4512{ 4513 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVADDI_HU, xd, xj, uk5)); 4514} 4515 4516/* Emits the `xvaddi.wu xd, xj, uk5` instruction. */ 4517static void __attribute__((unused)) 4518tcg_out_opc_xvaddi_wu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4519{ 4520 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVADDI_WU, xd, xj, uk5)); 4521} 4522 4523/* Emits the `xvaddi.du xd, xj, uk5` instruction. */ 4524static void __attribute__((unused)) 4525tcg_out_opc_xvaddi_du(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4526{ 4527 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVADDI_DU, xd, xj, uk5)); 4528} 4529 4530/* Emits the `xvsubi.bu xd, xj, uk5` instruction. */ 4531static void __attribute__((unused)) 4532tcg_out_opc_xvsubi_bu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4533{ 4534 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSUBI_BU, xd, xj, uk5)); 4535} 4536 4537/* Emits the `xvsubi.hu xd, xj, uk5` instruction. */ 4538static void __attribute__((unused)) 4539tcg_out_opc_xvsubi_hu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4540{ 4541 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSUBI_HU, xd, xj, uk5)); 4542} 4543 4544/* Emits the `xvsubi.wu xd, xj, uk5` instruction. */ 4545static void __attribute__((unused)) 4546tcg_out_opc_xvsubi_wu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4547{ 4548 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSUBI_WU, xd, xj, uk5)); 4549} 4550 4551/* Emits the `xvsubi.du xd, xj, uk5` instruction. */ 4552static void __attribute__((unused)) 4553tcg_out_opc_xvsubi_du(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4554{ 4555 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSUBI_DU, xd, xj, uk5)); 4556} 4557 4558/* Emits the `xvmaxi.b xd, xj, sk5` instruction. */ 4559static void __attribute__((unused)) 4560tcg_out_opc_xvmaxi_b(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4561{ 4562 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMAXI_B, xd, xj, sk5)); 4563} 4564 4565/* Emits the `xvmaxi.h xd, xj, sk5` instruction. */ 4566static void __attribute__((unused)) 4567tcg_out_opc_xvmaxi_h(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4568{ 4569 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMAXI_H, xd, xj, sk5)); 4570} 4571 4572/* Emits the `xvmaxi.w xd, xj, sk5` instruction. */ 4573static void __attribute__((unused)) 4574tcg_out_opc_xvmaxi_w(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4575{ 4576 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMAXI_W, xd, xj, sk5)); 4577} 4578 4579/* Emits the `xvmaxi.d xd, xj, sk5` instruction. */ 4580static void __attribute__((unused)) 4581tcg_out_opc_xvmaxi_d(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4582{ 4583 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMAXI_D, xd, xj, sk5)); 4584} 4585 4586/* Emits the `xvmini.b xd, xj, sk5` instruction. */ 4587static void __attribute__((unused)) 4588tcg_out_opc_xvmini_b(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4589{ 4590 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMINI_B, xd, xj, sk5)); 4591} 4592 4593/* Emits the `xvmini.h xd, xj, sk5` instruction. */ 4594static void __attribute__((unused)) 4595tcg_out_opc_xvmini_h(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4596{ 4597 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMINI_H, xd, xj, sk5)); 4598} 4599 4600/* Emits the `xvmini.w xd, xj, sk5` instruction. */ 4601static void __attribute__((unused)) 4602tcg_out_opc_xvmini_w(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4603{ 4604 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMINI_W, xd, xj, sk5)); 4605} 4606 4607/* Emits the `xvmini.d xd, xj, sk5` instruction. */ 4608static void __attribute__((unused)) 4609tcg_out_opc_xvmini_d(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5) 4610{ 4611 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMINI_D, xd, xj, sk5)); 4612} 4613 4614/* Emits the `xvmaxi.bu xd, xj, uk5` instruction. */ 4615static void __attribute__((unused)) 4616tcg_out_opc_xvmaxi_bu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4617{ 4618 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMAXI_BU, xd, xj, uk5)); 4619} 4620 4621/* Emits the `xvmaxi.hu xd, xj, uk5` instruction. */ 4622static void __attribute__((unused)) 4623tcg_out_opc_xvmaxi_hu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4624{ 4625 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMAXI_HU, xd, xj, uk5)); 4626} 4627 4628/* Emits the `xvmaxi.wu xd, xj, uk5` instruction. */ 4629static void __attribute__((unused)) 4630tcg_out_opc_xvmaxi_wu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4631{ 4632 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMAXI_WU, xd, xj, uk5)); 4633} 4634 4635/* Emits the `xvmaxi.du xd, xj, uk5` instruction. */ 4636static void __attribute__((unused)) 4637tcg_out_opc_xvmaxi_du(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4638{ 4639 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMAXI_DU, xd, xj, uk5)); 4640} 4641 4642/* Emits the `xvmini.bu xd, xj, uk5` instruction. */ 4643static void __attribute__((unused)) 4644tcg_out_opc_xvmini_bu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4645{ 4646 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMINI_BU, xd, xj, uk5)); 4647} 4648 4649/* Emits the `xvmini.hu xd, xj, uk5` instruction. */ 4650static void __attribute__((unused)) 4651tcg_out_opc_xvmini_hu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4652{ 4653 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMINI_HU, xd, xj, uk5)); 4654} 4655 4656/* Emits the `xvmini.wu xd, xj, uk5` instruction. */ 4657static void __attribute__((unused)) 4658tcg_out_opc_xvmini_wu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4659{ 4660 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMINI_WU, xd, xj, uk5)); 4661} 4662 4663/* Emits the `xvmini.du xd, xj, uk5` instruction. */ 4664static void __attribute__((unused)) 4665tcg_out_opc_xvmini_du(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4666{ 4667 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMINI_DU, xd, xj, uk5)); 4668} 4669 4670/* Emits the `xvneg.b xd, xj` instruction. */ 4671static void __attribute__((unused)) 4672tcg_out_opc_xvneg_b(TCGContext *s, TCGReg xd, TCGReg xj) 4673{ 4674 tcg_out32(s, encode_xdxj_insn(OPC_XVNEG_B, xd, xj)); 4675} 4676 4677/* Emits the `xvneg.h xd, xj` instruction. */ 4678static void __attribute__((unused)) 4679tcg_out_opc_xvneg_h(TCGContext *s, TCGReg xd, TCGReg xj) 4680{ 4681 tcg_out32(s, encode_xdxj_insn(OPC_XVNEG_H, xd, xj)); 4682} 4683 4684/* Emits the `xvneg.w xd, xj` instruction. */ 4685static void __attribute__((unused)) 4686tcg_out_opc_xvneg_w(TCGContext *s, TCGReg xd, TCGReg xj) 4687{ 4688 tcg_out32(s, encode_xdxj_insn(OPC_XVNEG_W, xd, xj)); 4689} 4690 4691/* Emits the `xvneg.d xd, xj` instruction. */ 4692static void __attribute__((unused)) 4693tcg_out_opc_xvneg_d(TCGContext *s, TCGReg xd, TCGReg xj) 4694{ 4695 tcg_out32(s, encode_xdxj_insn(OPC_XVNEG_D, xd, xj)); 4696} 4697 4698/* Emits the `xvreplgr2vr.b xd, j` instruction. */ 4699static void __attribute__((unused)) 4700tcg_out_opc_xvreplgr2vr_b(TCGContext *s, TCGReg xd, TCGReg j) 4701{ 4702 tcg_out32(s, encode_xdj_insn(OPC_XVREPLGR2VR_B, xd, j)); 4703} 4704 4705/* Emits the `xvreplgr2vr.h xd, j` instruction. */ 4706static void __attribute__((unused)) 4707tcg_out_opc_xvreplgr2vr_h(TCGContext *s, TCGReg xd, TCGReg j) 4708{ 4709 tcg_out32(s, encode_xdj_insn(OPC_XVREPLGR2VR_H, xd, j)); 4710} 4711 4712/* Emits the `xvreplgr2vr.w xd, j` instruction. */ 4713static void __attribute__((unused)) 4714tcg_out_opc_xvreplgr2vr_w(TCGContext *s, TCGReg xd, TCGReg j) 4715{ 4716 tcg_out32(s, encode_xdj_insn(OPC_XVREPLGR2VR_W, xd, j)); 4717} 4718 4719/* Emits the `xvreplgr2vr.d xd, j` instruction. */ 4720static void __attribute__((unused)) 4721tcg_out_opc_xvreplgr2vr_d(TCGContext *s, TCGReg xd, TCGReg j) 4722{ 4723 tcg_out32(s, encode_xdj_insn(OPC_XVREPLGR2VR_D, xd, j)); 4724} 4725 4726/* Emits the `xvrotri.b xd, xj, uk3` instruction. */ 4727static void __attribute__((unused)) 4728tcg_out_opc_xvrotri_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3) 4729{ 4730 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVROTRI_B, xd, xj, uk3)); 4731} 4732 4733/* Emits the `xvrotri.h xd, xj, uk4` instruction. */ 4734static void __attribute__((unused)) 4735tcg_out_opc_xvrotri_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4) 4736{ 4737 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVROTRI_H, xd, xj, uk4)); 4738} 4739 4740/* Emits the `xvrotri.w xd, xj, uk5` instruction. */ 4741static void __attribute__((unused)) 4742tcg_out_opc_xvrotri_w(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4743{ 4744 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVROTRI_W, xd, xj, uk5)); 4745} 4746 4747/* Emits the `xvrotri.d xd, xj, uk6` instruction. */ 4748static void __attribute__((unused)) 4749tcg_out_opc_xvrotri_d(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk6) 4750{ 4751 tcg_out32(s, encode_xdxjuk6_insn(OPC_XVROTRI_D, xd, xj, uk6)); 4752} 4753 4754/* Emits the `xvinsgr2vr.w xd, j, uk3` instruction. */ 4755static void __attribute__((unused)) 4756tcg_out_opc_xvinsgr2vr_w(TCGContext *s, TCGReg xd, TCGReg j, uint32_t uk3) 4757{ 4758 tcg_out32(s, encode_xdjuk3_insn(OPC_XVINSGR2VR_W, xd, j, uk3)); 4759} 4760 4761/* Emits the `xvinsgr2vr.d xd, j, uk2` instruction. */ 4762static void __attribute__((unused)) 4763tcg_out_opc_xvinsgr2vr_d(TCGContext *s, TCGReg xd, TCGReg j, uint32_t uk2) 4764{ 4765 tcg_out32(s, encode_xdjuk2_insn(OPC_XVINSGR2VR_D, xd, j, uk2)); 4766} 4767 4768/* Emits the `xvpickve2gr.w d, xj, uk3` instruction. */ 4769static void __attribute__((unused)) 4770tcg_out_opc_xvpickve2gr_w(TCGContext *s, TCGReg d, TCGReg xj, uint32_t uk3) 4771{ 4772 tcg_out32(s, encode_dxjuk3_insn(OPC_XVPICKVE2GR_W, d, xj, uk3)); 4773} 4774 4775/* Emits the `xvpickve2gr.d d, xj, uk2` instruction. */ 4776static void __attribute__((unused)) 4777tcg_out_opc_xvpickve2gr_d(TCGContext *s, TCGReg d, TCGReg xj, uint32_t uk2) 4778{ 4779 tcg_out32(s, encode_dxjuk2_insn(OPC_XVPICKVE2GR_D, d, xj, uk2)); 4780} 4781 4782/* Emits the `xvpickve2gr.wu d, xj, uk3` instruction. */ 4783static void __attribute__((unused)) 4784tcg_out_opc_xvpickve2gr_wu(TCGContext *s, TCGReg d, TCGReg xj, uint32_t uk3) 4785{ 4786 tcg_out32(s, encode_dxjuk3_insn(OPC_XVPICKVE2GR_WU, d, xj, uk3)); 4787} 4788 4789/* Emits the `xvpickve2gr.du d, xj, uk2` instruction. */ 4790static void __attribute__((unused)) 4791tcg_out_opc_xvpickve2gr_du(TCGContext *s, TCGReg d, TCGReg xj, uint32_t uk2) 4792{ 4793 tcg_out32(s, encode_dxjuk2_insn(OPC_XVPICKVE2GR_DU, d, xj, uk2)); 4794} 4795 4796/* Emits the `xvrepl128vei.b xd, xj, uk4` instruction. */ 4797static void __attribute__((unused)) 4798tcg_out_opc_xvrepl128vei_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4) 4799{ 4800 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVREPL128VEI_B, xd, xj, uk4)); 4801} 4802 4803/* Emits the `xvrepl128vei.h xd, xj, uk3` instruction. */ 4804static void __attribute__((unused)) 4805tcg_out_opc_xvrepl128vei_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3) 4806{ 4807 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVREPL128VEI_H, xd, xj, uk3)); 4808} 4809 4810/* Emits the `xvrepl128vei.w xd, xj, uk2` instruction. */ 4811static void __attribute__((unused)) 4812tcg_out_opc_xvrepl128vei_w(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk2) 4813{ 4814 tcg_out32(s, encode_xdxjuk2_insn(OPC_XVREPL128VEI_W, xd, xj, uk2)); 4815} 4816 4817/* Emits the `xvrepl128vei.d xd, xj, uk1` instruction. */ 4818static void __attribute__((unused)) 4819tcg_out_opc_xvrepl128vei_d(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk1) 4820{ 4821 tcg_out32(s, encode_xdxjuk1_insn(OPC_XVREPL128VEI_D, xd, xj, uk1)); 4822} 4823 4824/* Emits the `xvreplve0.b xd, xj` instruction. */ 4825static void __attribute__((unused)) 4826tcg_out_opc_xvreplve0_b(TCGContext *s, TCGReg xd, TCGReg xj) 4827{ 4828 tcg_out32(s, encode_xdxj_insn(OPC_XVREPLVE0_B, xd, xj)); 4829} 4830 4831/* Emits the `xvreplve0.h xd, xj` instruction. */ 4832static void __attribute__((unused)) 4833tcg_out_opc_xvreplve0_h(TCGContext *s, TCGReg xd, TCGReg xj) 4834{ 4835 tcg_out32(s, encode_xdxj_insn(OPC_XVREPLVE0_H, xd, xj)); 4836} 4837 4838/* Emits the `xvreplve0.w xd, xj` instruction. */ 4839static void __attribute__((unused)) 4840tcg_out_opc_xvreplve0_w(TCGContext *s, TCGReg xd, TCGReg xj) 4841{ 4842 tcg_out32(s, encode_xdxj_insn(OPC_XVREPLVE0_W, xd, xj)); 4843} 4844 4845/* Emits the `xvreplve0.d xd, xj` instruction. */ 4846static void __attribute__((unused)) 4847tcg_out_opc_xvreplve0_d(TCGContext *s, TCGReg xd, TCGReg xj) 4848{ 4849 tcg_out32(s, encode_xdxj_insn(OPC_XVREPLVE0_D, xd, xj)); 4850} 4851 4852/* Emits the `xvreplve0.q xd, xj` instruction. */ 4853static void __attribute__((unused)) 4854tcg_out_opc_xvreplve0_q(TCGContext *s, TCGReg xd, TCGReg xj) 4855{ 4856 tcg_out32(s, encode_xdxj_insn(OPC_XVREPLVE0_Q, xd, xj)); 4857} 4858 4859/* Emits the `xvbitclri.b xd, xj, uk3` instruction. */ 4860static void __attribute__((unused)) 4861tcg_out_opc_xvbitclri_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3) 4862{ 4863 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVBITCLRI_B, xd, xj, uk3)); 4864} 4865 4866/* Emits the `xvbitclri.h xd, xj, uk4` instruction. */ 4867static void __attribute__((unused)) 4868tcg_out_opc_xvbitclri_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4) 4869{ 4870 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVBITCLRI_H, xd, xj, uk4)); 4871} 4872 4873/* Emits the `xvbitclri.w xd, xj, uk5` instruction. */ 4874static void __attribute__((unused)) 4875tcg_out_opc_xvbitclri_w(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4876{ 4877 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVBITCLRI_W, xd, xj, uk5)); 4878} 4879 4880/* Emits the `xvbitclri.d xd, xj, uk6` instruction. */ 4881static void __attribute__((unused)) 4882tcg_out_opc_xvbitclri_d(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk6) 4883{ 4884 tcg_out32(s, encode_xdxjuk6_insn(OPC_XVBITCLRI_D, xd, xj, uk6)); 4885} 4886 4887/* Emits the `xvbitseti.b xd, xj, uk3` instruction. */ 4888static void __attribute__((unused)) 4889tcg_out_opc_xvbitseti_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3) 4890{ 4891 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVBITSETI_B, xd, xj, uk3)); 4892} 4893 4894/* Emits the `xvbitseti.h xd, xj, uk4` instruction. */ 4895static void __attribute__((unused)) 4896tcg_out_opc_xvbitseti_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4) 4897{ 4898 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVBITSETI_H, xd, xj, uk4)); 4899} 4900 4901/* Emits the `xvbitseti.w xd, xj, uk5` instruction. */ 4902static void __attribute__((unused)) 4903tcg_out_opc_xvbitseti_w(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4904{ 4905 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVBITSETI_W, xd, xj, uk5)); 4906} 4907 4908/* Emits the `xvbitseti.d xd, xj, uk6` instruction. */ 4909static void __attribute__((unused)) 4910tcg_out_opc_xvbitseti_d(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk6) 4911{ 4912 tcg_out32(s, encode_xdxjuk6_insn(OPC_XVBITSETI_D, xd, xj, uk6)); 4913} 4914 4915/* Emits the `xvbitrevi.b xd, xj, uk3` instruction. */ 4916static void __attribute__((unused)) 4917tcg_out_opc_xvbitrevi_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3) 4918{ 4919 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVBITREVI_B, xd, xj, uk3)); 4920} 4921 4922/* Emits the `xvbitrevi.h xd, xj, uk4` instruction. */ 4923static void __attribute__((unused)) 4924tcg_out_opc_xvbitrevi_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4) 4925{ 4926 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVBITREVI_H, xd, xj, uk4)); 4927} 4928 4929/* Emits the `xvbitrevi.w xd, xj, uk5` instruction. */ 4930static void __attribute__((unused)) 4931tcg_out_opc_xvbitrevi_w(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4932{ 4933 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVBITREVI_W, xd, xj, uk5)); 4934} 4935 4936/* Emits the `xvbitrevi.d xd, xj, uk6` instruction. */ 4937static void __attribute__((unused)) 4938tcg_out_opc_xvbitrevi_d(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk6) 4939{ 4940 tcg_out32(s, encode_xdxjuk6_insn(OPC_XVBITREVI_D, xd, xj, uk6)); 4941} 4942 4943/* Emits the `xvslli.b xd, xj, uk3` instruction. */ 4944static void __attribute__((unused)) 4945tcg_out_opc_xvslli_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3) 4946{ 4947 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVSLLI_B, xd, xj, uk3)); 4948} 4949 4950/* Emits the `xvslli.h xd, xj, uk4` instruction. */ 4951static void __attribute__((unused)) 4952tcg_out_opc_xvslli_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4) 4953{ 4954 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVSLLI_H, xd, xj, uk4)); 4955} 4956 4957/* Emits the `xvslli.w xd, xj, uk5` instruction. */ 4958static void __attribute__((unused)) 4959tcg_out_opc_xvslli_w(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4960{ 4961 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLLI_W, xd, xj, uk5)); 4962} 4963 4964/* Emits the `xvslli.d xd, xj, uk6` instruction. */ 4965static void __attribute__((unused)) 4966tcg_out_opc_xvslli_d(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk6) 4967{ 4968 tcg_out32(s, encode_xdxjuk6_insn(OPC_XVSLLI_D, xd, xj, uk6)); 4969} 4970 4971/* Emits the `xvsrli.b xd, xj, uk3` instruction. */ 4972static void __attribute__((unused)) 4973tcg_out_opc_xvsrli_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3) 4974{ 4975 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVSRLI_B, xd, xj, uk3)); 4976} 4977 4978/* Emits the `xvsrli.h xd, xj, uk4` instruction. */ 4979static void __attribute__((unused)) 4980tcg_out_opc_xvsrli_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4) 4981{ 4982 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVSRLI_H, xd, xj, uk4)); 4983} 4984 4985/* Emits the `xvsrli.w xd, xj, uk5` instruction. */ 4986static void __attribute__((unused)) 4987tcg_out_opc_xvsrli_w(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 4988{ 4989 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSRLI_W, xd, xj, uk5)); 4990} 4991 4992/* Emits the `xvsrli.d xd, xj, uk6` instruction. */ 4993static void __attribute__((unused)) 4994tcg_out_opc_xvsrli_d(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk6) 4995{ 4996 tcg_out32(s, encode_xdxjuk6_insn(OPC_XVSRLI_D, xd, xj, uk6)); 4997} 4998 4999/* Emits the `xvsrai.b xd, xj, uk3` instruction. */ 5000static void __attribute__((unused)) 5001tcg_out_opc_xvsrai_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3) 5002{ 5003 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVSRAI_B, xd, xj, uk3)); 5004} 5005 5006/* Emits the `xvsrai.h xd, xj, uk4` instruction. */ 5007static void __attribute__((unused)) 5008tcg_out_opc_xvsrai_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4) 5009{ 5010 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVSRAI_H, xd, xj, uk4)); 5011} 5012 5013/* Emits the `xvsrai.w xd, xj, uk5` instruction. */ 5014static void __attribute__((unused)) 5015tcg_out_opc_xvsrai_w(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5) 5016{ 5017 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSRAI_W, xd, xj, uk5)); 5018} 5019 5020/* Emits the `xvsrai.d xd, xj, uk6` instruction. */ 5021static void __attribute__((unused)) 5022tcg_out_opc_xvsrai_d(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk6) 5023{ 5024 tcg_out32(s, encode_xdxjuk6_insn(OPC_XVSRAI_D, xd, xj, uk6)); 5025} 5026 5027/* Emits the `xvbitseli.b xd, xj, uk8` instruction. */ 5028static void __attribute__((unused)) 5029tcg_out_opc_xvbitseli_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk8) 5030{ 5031 tcg_out32(s, encode_xdxjuk8_insn(OPC_XVBITSELI_B, xd, xj, uk8)); 5032} 5033 5034/* Emits the `xvandi.b xd, xj, uk8` instruction. */ 5035static void __attribute__((unused)) 5036tcg_out_opc_xvandi_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk8) 5037{ 5038 tcg_out32(s, encode_xdxjuk8_insn(OPC_XVANDI_B, xd, xj, uk8)); 5039} 5040 5041/* Emits the `xvori.b xd, xj, uk8` instruction. */ 5042static void __attribute__((unused)) 5043tcg_out_opc_xvori_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk8) 5044{ 5045 tcg_out32(s, encode_xdxjuk8_insn(OPC_XVORI_B, xd, xj, uk8)); 5046} 5047 5048/* Emits the `xvxori.b xd, xj, uk8` instruction. */ 5049static void __attribute__((unused)) 5050tcg_out_opc_xvxori_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk8) 5051{ 5052 tcg_out32(s, encode_xdxjuk8_insn(OPC_XVXORI_B, xd, xj, uk8)); 5053} 5054 5055/* Emits the `xvnori.b xd, xj, uk8` instruction. */ 5056static void __attribute__((unused)) 5057tcg_out_opc_xvnori_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk8) 5058{ 5059 tcg_out32(s, encode_xdxjuk8_insn(OPC_XVNORI_B, xd, xj, uk8)); 5060} 5061 5062/* Emits the `xvldi xd, sj13` instruction. */ 5063static void __attribute__((unused)) 5064tcg_out_opc_xvldi(TCGContext *s, TCGReg xd, int32_t sj13) 5065{ 5066 tcg_out32(s, encode_xdsj13_insn(OPC_XVLDI, xd, sj13)); 5067} 5068 5069/* End of generated code. */ 5070