xref: /openbmc/qemu/tcg/i386/tcg-target-con-set.h (revision d6fd5d83)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Define i386 target-specific constraint sets.
4  * Copyright (c) 2021 Linaro
5  */
6 
7 /*
8  * C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
9  * Each operand should be a sequence of constraint letters as defined by
10  * tcg-target-con-str.h; the constraint combination is inclusive or.
11  *
12  * C_N1_Im(...) defines a constraint set with 1 output and <m> inputs,
13  * except that the output must use a new register.
14  *
15  * C_Nn_Om_Ik(...) defines a constraint set with <n + m> outputs and <k>
16  * inputs, except that the first <n> outputs must use new registers.
17  */
18 C_O0_I1(r)
19 C_O0_I2(L, L)
20 C_O0_I2(qi, r)
21 C_O0_I2(re, r)
22 C_O0_I2(ri, r)
23 C_O0_I2(r, reT)
24 C_O0_I2(s, L)
25 C_O0_I2(x, r)
26 C_O0_I3(L, L, L)
27 C_O0_I3(s, L, L)
28 C_O0_I4(L, L, L, L)
29 C_O0_I4(r, r, ri, ri)
30 C_O1_I1(r, 0)
31 C_O1_I1(r, L)
32 C_O1_I1(r, q)
33 C_O1_I1(r, r)
34 C_O1_I1(x, r)
35 C_O1_I1(x, x)
36 C_O1_I2(q, 0, qi)
37 C_O1_I2(q, r, reT)
38 C_O1_I2(r, 0, ci)
39 C_O1_I2(r, 0, r)
40 C_O1_I2(r, 0, re)
41 C_O1_I2(r, 0, reZ)
42 C_O1_I2(r, 0, ri)
43 C_O1_I2(r, 0, rI)
44 C_O1_I2(r, L, L)
45 C_O1_I2(r, r, re)
46 C_O1_I2(r, r, ri)
47 C_O1_I2(r, r, rI)
48 C_O1_I2(x, x, x)
49 C_N1_I2(r, r, r)
50 C_N1_I2(r, r, rW)
51 C_O1_I3(x, 0, x, x)
52 C_O1_I3(x, x, x, x)
53 C_O1_I4(r, r, reT, r, 0)
54 C_O1_I4(r, r, r, ri, ri)
55 C_O2_I1(r, r, L)
56 C_O2_I2(a, d, a, r)
57 C_O2_I2(r, r, L, L)
58 C_O2_I3(a, d, 0, 1, r)
59 C_N1_O1_I4(r, r, 0, 1, re, re)
60