1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Define target-specific opcode support 4 * Copyright (c) 2008 Fabrice Bellard 5 * Copyright (c) 2008 Andrzej Zaborowski 6 */ 7 8 #ifndef TCG_TARGET_HAS_H 9 #define TCG_TARGET_HAS_H 10 11 extern int arm_arch; 12 13 #define use_armv7_instructions (__ARM_ARCH >= 7 || arm_arch >= 7) 14 15 #ifdef __ARM_ARCH_EXT_IDIV__ 16 #define use_idiv_instructions 1 17 #else 18 extern bool use_idiv_instructions; 19 #endif 20 #ifdef __ARM_NEON__ 21 #define use_neon_instructions 1 22 #else 23 extern bool use_neon_instructions; 24 #endif 25 26 /* optional instructions */ 27 #define TCG_TARGET_HAS_bswap16_i32 1 28 #define TCG_TARGET_HAS_bswap32_i32 1 29 #define TCG_TARGET_HAS_not_i32 1 30 #define TCG_TARGET_HAS_rot_i32 1 31 #define TCG_TARGET_HAS_andc_i32 1 32 #define TCG_TARGET_HAS_orc_i32 0 33 #define TCG_TARGET_HAS_eqv_i32 0 34 #define TCG_TARGET_HAS_nand_i32 0 35 #define TCG_TARGET_HAS_nor_i32 0 36 #define TCG_TARGET_HAS_clz_i32 1 37 #define TCG_TARGET_HAS_ctz_i32 use_armv7_instructions 38 #define TCG_TARGET_HAS_ctpop_i32 0 39 #define TCG_TARGET_HAS_extract2_i32 1 40 #define TCG_TARGET_HAS_negsetcond_i32 1 41 #define TCG_TARGET_HAS_mulu2_i32 1 42 #define TCG_TARGET_HAS_muls2_i32 1 43 #define TCG_TARGET_HAS_muluh_i32 0 44 #define TCG_TARGET_HAS_mulsh_i32 0 45 #define TCG_TARGET_HAS_div_i32 use_idiv_instructions 46 #define TCG_TARGET_HAS_rem_i32 0 47 #define TCG_TARGET_HAS_qemu_st8_i32 0 48 49 #define TCG_TARGET_HAS_qemu_ldst_i128 0 50 51 #define TCG_TARGET_HAS_tst 1 52 53 #define TCG_TARGET_HAS_v64 use_neon_instructions 54 #define TCG_TARGET_HAS_v128 use_neon_instructions 55 #define TCG_TARGET_HAS_v256 0 56 57 #define TCG_TARGET_HAS_andc_vec 1 58 #define TCG_TARGET_HAS_orc_vec 1 59 #define TCG_TARGET_HAS_nand_vec 0 60 #define TCG_TARGET_HAS_nor_vec 0 61 #define TCG_TARGET_HAS_eqv_vec 0 62 #define TCG_TARGET_HAS_not_vec 1 63 #define TCG_TARGET_HAS_neg_vec 1 64 #define TCG_TARGET_HAS_abs_vec 1 65 #define TCG_TARGET_HAS_roti_vec 0 66 #define TCG_TARGET_HAS_rots_vec 0 67 #define TCG_TARGET_HAS_rotv_vec 0 68 #define TCG_TARGET_HAS_shi_vec 1 69 #define TCG_TARGET_HAS_shs_vec 0 70 #define TCG_TARGET_HAS_shv_vec 0 71 #define TCG_TARGET_HAS_mul_vec 1 72 #define TCG_TARGET_HAS_sat_vec 1 73 #define TCG_TARGET_HAS_minmax_vec 1 74 #define TCG_TARGET_HAS_bitsel_vec 1 75 #define TCG_TARGET_HAS_cmpsel_vec 0 76 #define TCG_TARGET_HAS_tst_vec 1 77 78 static inline bool 79 tcg_target_extract_valid(TCGType type, unsigned ofs, unsigned len) 80 { 81 if (use_armv7_instructions) { 82 return true; /* SBFX or UBFX */ 83 } 84 switch (len) { 85 case 8: /* SXTB or UXTB */ 86 case 16: /* SXTH or UXTH */ 87 return (ofs % 8) == 0; 88 } 89 return false; 90 } 91 92 #define TCG_TARGET_extract_valid tcg_target_extract_valid 93 #define TCG_TARGET_sextract_valid tcg_target_extract_valid 94 #define TCG_TARGET_deposit_valid(type, ofs, len) use_armv7_instructions 95 96 #endif 97