xref: /openbmc/qemu/tcg/arm/tcg-target-con-str.h (revision b91a0fa7)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Define Arm target-specific operand constraints.
4  * Copyright (c) 2021 Linaro
5  */
6 
7 /*
8  * Define constraint letters for register sets:
9  * REGS(letter, register_mask)
10  */
11 REGS('r', ALL_GENERAL_REGS)
12 REGS('l', ALL_QLOAD_REGS)
13 REGS('s', ALL_QSTORE_REGS)
14 REGS('w', ALL_VECTOR_REGS)
15 
16 /*
17  * Define constraint letters for constants:
18  * CONST(letter, TCG_CT_CONST_* bit set)
19  */
20 CONST('I', TCG_CT_CONST_ARM)
21 CONST('K', TCG_CT_CONST_INV)
22 CONST('N', TCG_CT_CONST_NEG)
23 CONST('O', TCG_CT_CONST_ORRI)
24 CONST('V', TCG_CT_CONST_ANDI)
25 CONST('Z', TCG_CT_CONST_ZERO)
26