1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Define Arm target-specific operand constraints. 4 * Copyright (c) 2021 Linaro 5 */ 6 7 /* 8 * Define constraint letters for register sets: 9 * REGS(letter, register_mask) 10 */ 11 REGS('e', ALL_GENERAL_REGS & 0x5555) /* even regs */ 12 REGS('r', ALL_GENERAL_REGS) 13 REGS('l', ALL_QLOAD_REGS) 14 REGS('s', ALL_QSTORE_REGS) 15 REGS('S', ALL_QSTORE_REGS & 0x5555) /* even qstore */ 16 REGS('w', ALL_VECTOR_REGS) 17 18 /* 19 * Define constraint letters for constants: 20 * CONST(letter, TCG_CT_CONST_* bit set) 21 */ 22 CONST('I', TCG_CT_CONST_ARM) 23 CONST('K', TCG_CT_CONST_INV) 24 CONST('N', TCG_CT_CONST_NEG) 25 CONST('O', TCG_CT_CONST_ORRI) 26 CONST('V', TCG_CT_CONST_ANDI) 27 CONST('Z', TCG_CT_CONST_ZERO) 28