xref: /openbmc/qemu/tcg/arm/tcg-target-con-set.h (revision 30e702ab)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Define Arm target-specific constraint sets.
4  * Copyright (c) 2021 Linaro
5  */
6 
7 /*
8  * C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
9  * Each operand should be a sequence of constraint letters as defined by
10  * tcg-target-con-str.h; the constraint combination is inclusive or.
11  */
12 C_O0_I1(r)
13 C_O0_I2(r, r)
14 C_O0_I2(r, rIN)
15 C_O0_I2(s, s)
16 C_O0_I2(w, r)
17 C_O0_I3(s, s, s)
18 C_O0_I4(r, r, rI, rI)
19 C_O0_I4(s, s, s, s)
20 C_O1_I1(r, l)
21 C_O1_I1(r, r)
22 C_O1_I1(w, r)
23 C_O1_I1(w, w)
24 C_O1_I1(w, wr)
25 C_O1_I2(r, 0, rZ)
26 C_O1_I2(r, l, l)
27 C_O1_I2(r, r, r)
28 C_O1_I2(r, r, rI)
29 C_O1_I2(r, r, rIK)
30 C_O1_I2(r, r, rIN)
31 C_O1_I2(r, r, ri)
32 C_O1_I2(r, rZ, rZ)
33 C_O1_I2(w, 0, w)
34 C_O1_I2(w, w, w)
35 C_O1_I2(w, w, wO)
36 C_O1_I2(w, w, wV)
37 C_O1_I2(w, w, wZ)
38 C_O1_I3(w, w, w, w)
39 C_O1_I4(r, r, r, rI, rI)
40 C_O1_I4(r, r, rIN, rIK, 0)
41 C_O2_I1(r, r, l)
42 C_O2_I2(r, r, l, l)
43 C_O2_I2(r, r, r, r)
44 C_O2_I4(r, r, r, r, rIN, rIK)
45 C_O2_I4(r, r, rI, rI, rIN, rIK)
46