1 /* 2 * Xtensa gdb server stub 3 * 4 * Copyright (c) 2003-2005 Fabrice Bellard 5 * Copyright (c) 2013 SUSE LINUX Products GmbH 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public 9 * License as published by the Free Software Foundation; either 10 * version 2 of the License, or (at your option) any later version. 11 * 12 * This library is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * Lesser General Public License for more details. 16 * 17 * You should have received a copy of the GNU Lesser General Public 18 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 #include "qemu/osdep.h" 21 #include "qemu-common.h" 22 #include "cpu.h" 23 #include "exec/gdbstub.h" 24 #include "qemu/log.h" 25 26 int xtensa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) 27 { 28 XtensaCPU *cpu = XTENSA_CPU(cs); 29 CPUXtensaState *env = &cpu->env; 30 const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n; 31 unsigned i; 32 33 if (n < 0 || n >= env->config->gdb_regmap.num_regs) { 34 return 0; 35 } 36 37 switch (reg->type) { 38 case 9: /*pc*/ 39 return gdb_get_reg32(mem_buf, env->pc); 40 41 case 1: /*ar*/ 42 xtensa_sync_phys_from_window(env); 43 return gdb_get_reg32(mem_buf, env->phys_regs[(reg->targno & 0xff) 44 % env->config->nareg]); 45 46 case 2: /*SR*/ 47 return gdb_get_reg32(mem_buf, env->sregs[reg->targno & 0xff]); 48 49 case 3: /*UR*/ 50 return gdb_get_reg32(mem_buf, env->uregs[reg->targno & 0xff]); 51 52 case 4: /*f*/ 53 i = reg->targno & 0x0f; 54 switch (reg->size) { 55 case 4: 56 return gdb_get_reg32(mem_buf, 57 float32_val(env->fregs[i].f32[FP_F32_LOW])); 58 case 8: 59 return gdb_get_reg64(mem_buf, float64_val(env->fregs[i].f64)); 60 default: 61 qemu_log_mask(LOG_UNIMP, "%s from reg %d of unsupported size %d\n", 62 __func__, n, reg->size); 63 memset(mem_buf, 0, reg->size); 64 return reg->size; 65 } 66 67 case 8: /*a*/ 68 return gdb_get_reg32(mem_buf, env->regs[reg->targno & 0x0f]); 69 70 default: 71 qemu_log_mask(LOG_UNIMP, "%s from reg %d of unsupported type %d\n", 72 __func__, n, reg->type); 73 memset(mem_buf, 0, reg->size); 74 return reg->size; 75 } 76 } 77 78 int xtensa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) 79 { 80 XtensaCPU *cpu = XTENSA_CPU(cs); 81 CPUXtensaState *env = &cpu->env; 82 uint32_t tmp; 83 const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n; 84 85 if (n < 0 || n >= env->config->gdb_regmap.num_regs) { 86 return 0; 87 } 88 89 tmp = ldl_p(mem_buf); 90 91 switch (reg->type) { 92 case 9: /*pc*/ 93 env->pc = tmp; 94 break; 95 96 case 1: /*ar*/ 97 env->phys_regs[(reg->targno & 0xff) % env->config->nareg] = tmp; 98 xtensa_sync_window_from_phys(env); 99 break; 100 101 case 2: /*SR*/ 102 env->sregs[reg->targno & 0xff] = tmp; 103 break; 104 105 case 3: /*UR*/ 106 env->uregs[reg->targno & 0xff] = tmp; 107 break; 108 109 case 4: /*f*/ 110 switch (reg->size) { 111 case 4: 112 env->fregs[reg->targno & 0x0f].f32[FP_F32_LOW] = make_float32(tmp); 113 return 4; 114 case 8: 115 env->fregs[reg->targno & 0x0f].f64 = make_float64(tmp); 116 return 8; 117 default: 118 qemu_log_mask(LOG_UNIMP, "%s to reg %d of unsupported size %d\n", 119 __func__, n, reg->size); 120 return reg->size; 121 } 122 123 case 8: /*a*/ 124 env->regs[reg->targno & 0x0f] = tmp; 125 break; 126 127 default: 128 qemu_log_mask(LOG_UNIMP, "%s to reg %d of unsupported type %d\n", 129 __func__, n, reg->type); 130 return reg->size; 131 } 132 133 return 4; 134 } 135