1 /* 2 * Copyright (c) 2011 - 2019, Max Filippov, Open Source and Linux Lab. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * * Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * * Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * * Neither the name of the Open Source and Linux Lab nor the 13 * names of its contributors may be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include "qemu/osdep.h" 29 #include "qemu/main-loop.h" 30 #include "cpu.h" 31 #include "exec/helper-proto.h" 32 #include "qemu/host-utils.h" 33 #include "exec/exec-all.h" 34 35 void HELPER(exception)(CPUXtensaState *env, uint32_t excp) 36 { 37 CPUState *cs = CPU(xtensa_env_get_cpu(env)); 38 39 cs->exception_index = excp; 40 if (excp == EXCP_YIELD) { 41 env->yield_needed = 0; 42 } 43 if (excp == EXCP_DEBUG) { 44 env->exception_taken = 0; 45 } 46 cpu_loop_exit(cs); 47 } 48 49 void HELPER(exception_cause)(CPUXtensaState *env, uint32_t pc, uint32_t cause) 50 { 51 uint32_t vector; 52 53 env->pc = pc; 54 if (env->sregs[PS] & PS_EXCM) { 55 if (env->config->ndepc) { 56 env->sregs[DEPC] = pc; 57 } else { 58 env->sregs[EPC1] = pc; 59 } 60 vector = EXC_DOUBLE; 61 } else { 62 env->sregs[EPC1] = pc; 63 vector = (env->sregs[PS] & PS_UM) ? EXC_USER : EXC_KERNEL; 64 } 65 66 env->sregs[EXCCAUSE] = cause; 67 env->sregs[PS] |= PS_EXCM; 68 69 HELPER(exception)(env, vector); 70 } 71 72 void HELPER(exception_cause_vaddr)(CPUXtensaState *env, 73 uint32_t pc, uint32_t cause, uint32_t vaddr) 74 { 75 env->sregs[EXCVADDR] = vaddr; 76 HELPER(exception_cause)(env, pc, cause); 77 } 78 79 void debug_exception_env(CPUXtensaState *env, uint32_t cause) 80 { 81 if (xtensa_get_cintlevel(env) < env->config->debug_level) { 82 HELPER(debug_exception)(env, env->pc, cause); 83 } 84 } 85 86 void HELPER(debug_exception)(CPUXtensaState *env, uint32_t pc, uint32_t cause) 87 { 88 unsigned level = env->config->debug_level; 89 90 env->pc = pc; 91 env->sregs[DEBUGCAUSE] = cause; 92 env->sregs[EPC1 + level - 1] = pc; 93 env->sregs[EPS2 + level - 2] = env->sregs[PS]; 94 env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) | PS_EXCM | 95 (level << PS_INTLEVEL_SHIFT); 96 HELPER(exception)(env, EXC_DEBUG); 97 } 98 99 #ifndef CONFIG_USER_ONLY 100 101 void HELPER(waiti)(CPUXtensaState *env, uint32_t pc, uint32_t intlevel) 102 { 103 CPUState *cpu; 104 105 env->pc = pc; 106 env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) | 107 (intlevel << PS_INTLEVEL_SHIFT); 108 109 qemu_mutex_lock_iothread(); 110 check_interrupts(env); 111 qemu_mutex_unlock_iothread(); 112 113 if (env->pending_irq_level) { 114 cpu_loop_exit(CPU(xtensa_env_get_cpu(env))); 115 return; 116 } 117 118 cpu = CPU(xtensa_env_get_cpu(env)); 119 cpu->halted = 1; 120 HELPER(exception)(env, EXCP_HLT); 121 } 122 123 void HELPER(check_interrupts)(CPUXtensaState *env) 124 { 125 qemu_mutex_lock_iothread(); 126 check_interrupts(env); 127 qemu_mutex_unlock_iothread(); 128 } 129 130 static uint32_t relocated_vector(CPUXtensaState *env, uint32_t vector) 131 { 132 if (xtensa_option_enabled(env->config, 133 XTENSA_OPTION_RELOCATABLE_VECTOR)) { 134 return vector - env->config->vecbase + env->sregs[VECBASE]; 135 } else { 136 return vector; 137 } 138 } 139 140 /*! 141 * Handle penging IRQ. 142 * For the high priority interrupt jump to the corresponding interrupt vector. 143 * For the level-1 interrupt convert it to either user, kernel or double 144 * exception with the 'level-1 interrupt' exception cause. 145 */ 146 static void handle_interrupt(CPUXtensaState *env) 147 { 148 int level = env->pending_irq_level; 149 150 if (level > xtensa_get_cintlevel(env) && 151 level <= env->config->nlevel && 152 (env->config->level_mask[level] & 153 env->sregs[INTSET] & 154 env->sregs[INTENABLE])) { 155 CPUState *cs = CPU(xtensa_env_get_cpu(env)); 156 157 if (level > 1) { 158 env->sregs[EPC1 + level - 1] = env->pc; 159 env->sregs[EPS2 + level - 2] = env->sregs[PS]; 160 env->sregs[PS] = 161 (env->sregs[PS] & ~PS_INTLEVEL) | level | PS_EXCM; 162 env->pc = relocated_vector(env, 163 env->config->interrupt_vector[level]); 164 } else { 165 env->sregs[EXCCAUSE] = LEVEL1_INTERRUPT_CAUSE; 166 167 if (env->sregs[PS] & PS_EXCM) { 168 if (env->config->ndepc) { 169 env->sregs[DEPC] = env->pc; 170 } else { 171 env->sregs[EPC1] = env->pc; 172 } 173 cs->exception_index = EXC_DOUBLE; 174 } else { 175 env->sregs[EPC1] = env->pc; 176 cs->exception_index = 177 (env->sregs[PS] & PS_UM) ? EXC_USER : EXC_KERNEL; 178 } 179 env->sregs[PS] |= PS_EXCM; 180 } 181 env->exception_taken = 1; 182 } 183 } 184 185 /* Called from cpu_handle_interrupt with BQL held */ 186 void xtensa_cpu_do_interrupt(CPUState *cs) 187 { 188 XtensaCPU *cpu = XTENSA_CPU(cs); 189 CPUXtensaState *env = &cpu->env; 190 191 if (cs->exception_index == EXC_IRQ) { 192 qemu_log_mask(CPU_LOG_INT, 193 "%s(EXC_IRQ) level = %d, cintlevel = %d, " 194 "pc = %08x, a0 = %08x, ps = %08x, " 195 "intset = %08x, intenable = %08x, " 196 "ccount = %08x\n", 197 __func__, env->pending_irq_level, 198 xtensa_get_cintlevel(env), 199 env->pc, env->regs[0], env->sregs[PS], 200 env->sregs[INTSET], env->sregs[INTENABLE], 201 env->sregs[CCOUNT]); 202 handle_interrupt(env); 203 } 204 205 switch (cs->exception_index) { 206 case EXC_WINDOW_OVERFLOW4: 207 case EXC_WINDOW_UNDERFLOW4: 208 case EXC_WINDOW_OVERFLOW8: 209 case EXC_WINDOW_UNDERFLOW8: 210 case EXC_WINDOW_OVERFLOW12: 211 case EXC_WINDOW_UNDERFLOW12: 212 case EXC_KERNEL: 213 case EXC_USER: 214 case EXC_DOUBLE: 215 case EXC_DEBUG: 216 qemu_log_mask(CPU_LOG_INT, "%s(%d) " 217 "pc = %08x, a0 = %08x, ps = %08x, ccount = %08x\n", 218 __func__, cs->exception_index, 219 env->pc, env->regs[0], env->sregs[PS], 220 env->sregs[CCOUNT]); 221 if (env->config->exception_vector[cs->exception_index]) { 222 uint32_t vector; 223 224 vector = env->config->exception_vector[cs->exception_index]; 225 env->pc = relocated_vector(env, vector); 226 env->exception_taken = 1; 227 } else { 228 qemu_log_mask(CPU_LOG_INT, 229 "%s(pc = %08x) bad exception_index: %d\n", 230 __func__, env->pc, cs->exception_index); 231 } 232 break; 233 234 case EXC_IRQ: 235 break; 236 237 default: 238 qemu_log("%s(pc = %08x) unknown exception_index: %d\n", 239 __func__, env->pc, cs->exception_index); 240 break; 241 } 242 check_interrupts(env); 243 } 244 #else 245 void xtensa_cpu_do_interrupt(CPUState *cs) 246 { 247 } 248 #endif 249 250 bool xtensa_cpu_exec_interrupt(CPUState *cs, int interrupt_request) 251 { 252 if (interrupt_request & CPU_INTERRUPT_HARD) { 253 cs->exception_index = EXC_IRQ; 254 xtensa_cpu_do_interrupt(cs); 255 return true; 256 } 257 return false; 258 } 259