1 /* 2 * Copyright (c) 2011 - 2019, Max Filippov, Open Source and Linux Lab. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * * Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * * Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * * Neither the name of the Open Source and Linux Lab nor the 13 * names of its contributors may be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include "qemu/osdep.h" 29 #include "qemu/log.h" 30 #include "cpu.h" 31 #include "exec/helper-proto.h" 32 #include "qemu/host-utils.h" 33 #include "exec/exec-all.h" 34 #include "exec/address-spaces.h" 35 36 void HELPER(wsr_ibreakenable)(CPUXtensaState *env, uint32_t v) 37 { 38 CPUState *cs = env_cpu(env); 39 uint32_t change = v ^ env->sregs[IBREAKENABLE]; 40 unsigned i; 41 42 for (i = 0; i < env->config->nibreak; ++i) { 43 if (change & (1 << i)) { 44 if (v & (1 << i)) { 45 cpu_breakpoint_insert(cs, env->sregs[IBREAKA + i], 46 BP_CPU, &env->cpu_breakpoint[i]); 47 } else { 48 cpu_breakpoint_remove_by_ref(cs, env->cpu_breakpoint[i]); 49 env->cpu_breakpoint[i] = NULL; 50 } 51 } 52 } 53 env->sregs[IBREAKENABLE] = v & ((1 << env->config->nibreak) - 1); 54 } 55 56 void HELPER(wsr_ibreaka)(CPUXtensaState *env, uint32_t i, uint32_t v) 57 { 58 if (env->sregs[IBREAKENABLE] & (1 << i) && env->sregs[IBREAKA + i] != v) { 59 CPUState *cs = env_cpu(env); 60 61 cpu_breakpoint_remove_by_ref(cs, env->cpu_breakpoint[i]); 62 cpu_breakpoint_insert(cs, v, BP_CPU, &env->cpu_breakpoint[i]); 63 } 64 env->sregs[IBREAKA + i] = v; 65 } 66 67 bool xtensa_debug_check_breakpoint(CPUState *cs) 68 { 69 XtensaCPU *cpu = XTENSA_CPU(cs); 70 CPUXtensaState *env = &cpu->env; 71 unsigned int i; 72 73 if (xtensa_get_cintlevel(env) >= env->config->debug_level) { 74 return false; 75 } 76 for (i = 0; i < env->config->nibreak; ++i) { 77 if (env->sregs[IBREAKENABLE] & (1 << i) && 78 env->sregs[IBREAKA + i] == env->pc) { 79 return true; 80 } 81 } 82 return false; 83 } 84 85 static void set_dbreak(CPUXtensaState *env, unsigned i, uint32_t dbreaka, 86 uint32_t dbreakc) 87 { 88 CPUState *cs = env_cpu(env); 89 int flags = BP_CPU | BP_STOP_BEFORE_ACCESS; 90 uint32_t mask = dbreakc | ~DBREAKC_MASK; 91 92 if (env->cpu_watchpoint[i]) { 93 cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]); 94 } 95 if (dbreakc & DBREAKC_SB) { 96 flags |= BP_MEM_WRITE; 97 } 98 if (dbreakc & DBREAKC_LB) { 99 flags |= BP_MEM_READ; 100 } 101 /* contiguous mask after inversion is one less than some power of 2 */ 102 if ((~mask + 1) & ~mask) { 103 qemu_log_mask(LOG_GUEST_ERROR, 104 "DBREAKC mask is not contiguous: 0x%08x\n", dbreakc); 105 /* cut mask after the first zero bit */ 106 mask = 0xffffffff << (32 - clo32(mask)); 107 } 108 if (cpu_watchpoint_insert(cs, dbreaka & mask, ~mask + 1, 109 flags, &env->cpu_watchpoint[i])) { 110 env->cpu_watchpoint[i] = NULL; 111 qemu_log_mask(LOG_GUEST_ERROR, 112 "Failed to set data breakpoint at 0x%08x/%d\n", 113 dbreaka & mask, ~mask + 1); 114 } 115 } 116 117 void HELPER(wsr_dbreaka)(CPUXtensaState *env, uint32_t i, uint32_t v) 118 { 119 uint32_t dbreakc = env->sregs[DBREAKC + i]; 120 121 if ((dbreakc & DBREAKC_SB_LB) && 122 env->sregs[DBREAKA + i] != v) { 123 set_dbreak(env, i, v, dbreakc); 124 } 125 env->sregs[DBREAKA + i] = v; 126 } 127 128 void HELPER(wsr_dbreakc)(CPUXtensaState *env, uint32_t i, uint32_t v) 129 { 130 if ((env->sregs[DBREAKC + i] ^ v) & (DBREAKC_SB_LB | DBREAKC_MASK)) { 131 if (v & DBREAKC_SB_LB) { 132 set_dbreak(env, i, env->sregs[DBREAKA + i], v); 133 } else { 134 if (env->cpu_watchpoint[i]) { 135 CPUState *cs = env_cpu(env); 136 137 cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]); 138 env->cpu_watchpoint[i] = NULL; 139 } 140 } 141 } 142 env->sregs[DBREAKC + i] = v; 143 } 144