1 /* 2 * Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn 3 * 4 * This library is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU Lesser General Public 6 * License as published by the Free Software Foundation; either 7 * version 2.1 of the License, or (at your option) any later version. 8 * 9 * This library is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * Lesser General Public License for more details. 13 * 14 * You should have received a copy of the GNU Lesser General Public 15 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qemu/log.h" 20 #include "cpu.h" 21 #include "exec/exec-all.h" 22 #include "fpu/softfloat-helpers.h" 23 #include "qemu/qemu-print.h" 24 25 enum { 26 TLBRET_DIRTY = -4, 27 TLBRET_INVALID = -3, 28 TLBRET_NOMATCH = -2, 29 TLBRET_BADADDR = -1, 30 TLBRET_MATCH = 0 31 }; 32 33 #if defined(CONFIG_SOFTMMU) 34 static int get_physical_address(CPUTriCoreState *env, hwaddr *physical, 35 int *prot, target_ulong address, 36 MMUAccessType access_type, int mmu_idx) 37 { 38 int ret = TLBRET_MATCH; 39 40 *physical = address & 0xFFFFFFFF; 41 *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; 42 43 return ret; 44 } 45 46 hwaddr tricore_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) 47 { 48 TriCoreCPU *cpu = TRICORE_CPU(cs); 49 hwaddr phys_addr; 50 int prot; 51 int mmu_idx = cpu_mmu_index(&cpu->env, false); 52 53 if (get_physical_address(&cpu->env, &phys_addr, &prot, addr, 54 MMU_DATA_LOAD, mmu_idx)) { 55 return -1; 56 } 57 return phys_addr; 58 } 59 #endif 60 61 /* TODO: Add exeption support*/ 62 static void raise_mmu_exception(CPUTriCoreState *env, target_ulong address, 63 int rw, int tlb_error) 64 { 65 } 66 67 bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size, 68 MMUAccessType rw, int mmu_idx, 69 bool probe, uintptr_t retaddr) 70 { 71 TriCoreCPU *cpu = TRICORE_CPU(cs); 72 CPUTriCoreState *env = &cpu->env; 73 hwaddr physical; 74 int prot; 75 int ret = 0; 76 77 rw &= 1; 78 ret = get_physical_address(env, &physical, &prot, 79 address, rw, mmu_idx); 80 81 qemu_log_mask(CPU_LOG_MMU, "%s address=" TARGET_FMT_lx " ret %d physical " 82 HWADDR_FMT_plx " prot %d\n", 83 __func__, (target_ulong)address, ret, physical, prot); 84 85 if (ret == TLBRET_MATCH) { 86 tlb_set_page(cs, address & TARGET_PAGE_MASK, 87 physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, 88 mmu_idx, TARGET_PAGE_SIZE); 89 return true; 90 } else { 91 assert(ret < 0); 92 if (probe) { 93 return false; 94 } 95 raise_mmu_exception(env, address, rw, ret); 96 cpu_loop_exit_restore(cs, retaddr); 97 } 98 } 99 100 static void tricore_cpu_list_entry(gpointer data, gpointer user_data) 101 { 102 ObjectClass *oc = data; 103 const char *typename; 104 char *name; 105 106 typename = object_class_get_name(oc); 107 name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_TRICORE_CPU)); 108 qemu_printf(" %s\n", name); 109 g_free(name); 110 } 111 112 void tricore_cpu_list(void) 113 { 114 GSList *list; 115 116 list = object_class_get_list_sorted(TYPE_TRICORE_CPU, false); 117 qemu_printf("Available CPUs:\n"); 118 g_slist_foreach(list, tricore_cpu_list_entry, NULL); 119 g_slist_free(list); 120 } 121 122 void fpu_set_state(CPUTriCoreState *env) 123 { 124 set_float_rounding_mode(env->PSW & MASK_PSW_FPU_RM, &env->fp_status); 125 set_flush_inputs_to_zero(1, &env->fp_status); 126 set_flush_to_zero(1, &env->fp_status); 127 set_default_nan_mode(1, &env->fp_status); 128 } 129 130 uint32_t psw_read(CPUTriCoreState *env) 131 { 132 /* clear all USB bits */ 133 env->PSW &= 0x6ffffff; 134 /* now set them from the cache */ 135 env->PSW |= ((env->PSW_USB_C != 0) << 31); 136 env->PSW |= ((env->PSW_USB_V & (1 << 31)) >> 1); 137 env->PSW |= ((env->PSW_USB_SV & (1 << 31)) >> 2); 138 env->PSW |= ((env->PSW_USB_AV & (1 << 31)) >> 3); 139 env->PSW |= ((env->PSW_USB_SAV & (1 << 31)) >> 4); 140 141 return env->PSW; 142 } 143 144 void psw_write(CPUTriCoreState *env, uint32_t val) 145 { 146 env->PSW_USB_C = (val & MASK_USB_C); 147 env->PSW_USB_V = (val & MASK_USB_V) << 1; 148 env->PSW_USB_SV = (val & MASK_USB_SV) << 2; 149 env->PSW_USB_AV = (val & MASK_USB_AV) << 3; 150 env->PSW_USB_SAV = (val & MASK_USB_SAV) << 4; 151 env->PSW = val; 152 153 fpu_set_state(env); 154 } 155