1 /* 2 * Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn 3 * 4 * This library is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU Lesser General Public 6 * License as published by the Free Software Foundation; either 7 * version 2 of the License, or (at your option) any later version. 8 * 9 * This library is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * Lesser General Public License for more details. 13 * 14 * You should have received a copy of the GNU Lesser General Public 15 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "qemu/osdep.h" 19 20 #include "cpu.h" 21 #include "exec/exec-all.h" 22 23 enum { 24 TLBRET_DIRTY = -4, 25 TLBRET_INVALID = -3, 26 TLBRET_NOMATCH = -2, 27 TLBRET_BADADDR = -1, 28 TLBRET_MATCH = 0 29 }; 30 31 #if defined(CONFIG_SOFTMMU) 32 static int get_physical_address(CPUTriCoreState *env, hwaddr *physical, 33 int *prot, target_ulong address, 34 int rw, int access_type) 35 { 36 int ret = TLBRET_MATCH; 37 38 *physical = address & 0xFFFFFFFF; 39 *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; 40 41 return ret; 42 } 43 #endif 44 45 /* TODO: Add exeption support*/ 46 static void raise_mmu_exception(CPUTriCoreState *env, target_ulong address, 47 int rw, int tlb_error) 48 { 49 } 50 51 int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ulong address, 52 int rw, int mmu_idx) 53 { 54 TriCoreCPU *cpu = TRICORE_CPU(cs); 55 CPUTriCoreState *env = &cpu->env; 56 hwaddr physical; 57 int prot; 58 int access_type; 59 int ret = 0; 60 61 rw &= 1; 62 access_type = ACCESS_INT; 63 ret = get_physical_address(env, &physical, &prot, 64 address, rw, access_type); 65 qemu_log_mask(CPU_LOG_MMU, "%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_plx 66 " prot %d\n", __func__, address, ret, physical, prot); 67 68 if (ret == TLBRET_MATCH) { 69 tlb_set_page(cs, address & TARGET_PAGE_MASK, 70 physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, 71 mmu_idx, TARGET_PAGE_SIZE); 72 ret = 0; 73 } else if (ret < 0) { 74 raise_mmu_exception(env, address, rw, ret); 75 ret = 1; 76 } 77 78 return ret; 79 } 80 81 TriCoreCPU *cpu_tricore_init(const char *cpu_model) 82 { 83 return TRICORE_CPU(cpu_generic_init(TYPE_TRICORE_CPU, cpu_model)); 84 } 85 86 static void tricore_cpu_list_entry(gpointer data, gpointer user_data) 87 { 88 ObjectClass *oc = data; 89 CPUListState *s = user_data; 90 const char *typename; 91 char *name; 92 93 typename = object_class_get_name(oc); 94 name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_TRICORE_CPU)); 95 (*s->cpu_fprintf)(s->file, " %s\n", 96 name); 97 g_free(name); 98 } 99 100 void tricore_cpu_list(FILE *f, fprintf_function cpu_fprintf) 101 { 102 CPUListState s = { 103 .file = f, 104 .cpu_fprintf = cpu_fprintf, 105 }; 106 GSList *list; 107 108 list = object_class_get_list(TYPE_TRICORE_CPU, false); 109 (*cpu_fprintf)(f, "Available CPUs:\n"); 110 g_slist_foreach(list, tricore_cpu_list_entry, &s); 111 g_slist_free(list); 112 } 113 114 void fpu_set_state(CPUTriCoreState *env) 115 { 116 set_float_rounding_mode(env->PSW & MASK_PSW_FPU_RM, &env->fp_status); 117 set_flush_inputs_to_zero(1, &env->fp_status); 118 set_flush_to_zero(1, &env->fp_status); 119 set_default_nan_mode(1, &env->fp_status); 120 } 121 122 uint32_t psw_read(CPUTriCoreState *env) 123 { 124 /* clear all USB bits */ 125 env->PSW &= 0x6ffffff; 126 /* now set them from the cache */ 127 env->PSW |= ((env->PSW_USB_C != 0) << 31); 128 env->PSW |= ((env->PSW_USB_V & (1 << 31)) >> 1); 129 env->PSW |= ((env->PSW_USB_SV & (1 << 31)) >> 2); 130 env->PSW |= ((env->PSW_USB_AV & (1 << 31)) >> 3); 131 env->PSW |= ((env->PSW_USB_SAV & (1 << 31)) >> 4); 132 133 return env->PSW; 134 } 135 136 void psw_write(CPUTriCoreState *env, uint32_t val) 137 { 138 env->PSW_USB_C = (val & MASK_USB_C); 139 env->PSW_USB_V = (val & MASK_USB_V) << 1; 140 env->PSW_USB_SV = (val & MASK_USB_SV) << 2; 141 env->PSW_USB_AV = (val & MASK_USB_AV) << 3; 142 env->PSW_USB_SAV = (val & MASK_USB_SAV) << 4; 143 env->PSW = val; 144 145 fpu_set_state(env); 146 } 147