xref: /openbmc/qemu/target/tricore/cpu.c (revision 6e510855) 
1 /*
2  *  TriCore emulation for qemu: main translation routines.
3  *
4  *  Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qapi/error.h"
22 #include "cpu.h"
23 #include "exec/exec-all.h"
24 #include "qemu/error-report.h"
25 #include "tcg/debug-assert.h"
26 
27 static inline void set_feature(CPUTriCoreState *env, int feature)
28 {
29     env->features |= 1ULL << feature;
30 }
31 
32 static gchar *tricore_gdb_arch_name(CPUState *cs)
33 {
34     return g_strdup("tricore");
35 }
36 
37 static void tricore_cpu_set_pc(CPUState *cs, vaddr value)
38 {
39     TriCoreCPU *cpu = TRICORE_CPU(cs);
40     CPUTriCoreState *env = &cpu->env;
41 
42     env->PC = value & ~(target_ulong)1;
43 }
44 
45 static vaddr tricore_cpu_get_pc(CPUState *cs)
46 {
47     TriCoreCPU *cpu = TRICORE_CPU(cs);
48     CPUTriCoreState *env = &cpu->env;
49 
50     return env->PC;
51 }
52 
53 static void tricore_cpu_synchronize_from_tb(CPUState *cs,
54                                             const TranslationBlock *tb)
55 {
56     TriCoreCPU *cpu = TRICORE_CPU(cs);
57     CPUTriCoreState *env = &cpu->env;
58 
59     tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL));
60     env->PC = tb->pc;
61 }
62 
63 static void tricore_restore_state_to_opc(CPUState *cs,
64                                          const TranslationBlock *tb,
65                                          const uint64_t *data)
66 {
67     TriCoreCPU *cpu = TRICORE_CPU(cs);
68     CPUTriCoreState *env = &cpu->env;
69 
70     env->PC = data[0];
71 }
72 
73 static void tricore_cpu_reset_hold(Object *obj)
74 {
75     CPUState *s = CPU(obj);
76     TriCoreCPU *cpu = TRICORE_CPU(s);
77     TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(cpu);
78     CPUTriCoreState *env = &cpu->env;
79 
80     if (tcc->parent_phases.hold) {
81         tcc->parent_phases.hold(obj);
82     }
83 
84     cpu_state_reset(env);
85 }
86 
87 static bool tricore_cpu_has_work(CPUState *cs)
88 {
89     return true;
90 }
91 
92 static void tricore_cpu_realizefn(DeviceState *dev, Error **errp)
93 {
94     CPUState *cs = CPU(dev);
95     TriCoreCPU *cpu = TRICORE_CPU(dev);
96     TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(dev);
97     CPUTriCoreState *env = &cpu->env;
98     Error *local_err = NULL;
99 
100     cpu_exec_realizefn(cs, &local_err);
101     if (local_err != NULL) {
102         error_propagate(errp, local_err);
103         return;
104     }
105 
106     /* Some features automatically imply others */
107     if (tricore_has_feature(env, TRICORE_FEATURE_162)) {
108         set_feature(env, TRICORE_FEATURE_161);
109     }
110 
111     if (tricore_has_feature(env, TRICORE_FEATURE_161)) {
112         set_feature(env, TRICORE_FEATURE_16);
113     }
114 
115     if (tricore_has_feature(env, TRICORE_FEATURE_16)) {
116         set_feature(env, TRICORE_FEATURE_131);
117     }
118     if (tricore_has_feature(env, TRICORE_FEATURE_131)) {
119         set_feature(env, TRICORE_FEATURE_13);
120     }
121     cpu_reset(cs);
122     qemu_init_vcpu(cs);
123 
124     tcc->parent_realize(dev, errp);
125 }
126 
127 
128 static void tricore_cpu_initfn(Object *obj)
129 {
130     TriCoreCPU *cpu = TRICORE_CPU(obj);
131 
132     cpu_set_cpustate_pointers(cpu);
133 }
134 
135 static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model)
136 {
137     ObjectClass *oc;
138     char *typename;
139 
140     typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model);
141     oc = object_class_by_name(typename);
142     g_free(typename);
143     if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) ||
144         object_class_is_abstract(oc)) {
145         return NULL;
146     }
147     return oc;
148 }
149 
150 static void tc1796_initfn(Object *obj)
151 {
152     TriCoreCPU *cpu = TRICORE_CPU(obj);
153 
154     set_feature(&cpu->env, TRICORE_FEATURE_13);
155 }
156 
157 static void tc1797_initfn(Object *obj)
158 {
159     TriCoreCPU *cpu = TRICORE_CPU(obj);
160 
161     set_feature(&cpu->env, TRICORE_FEATURE_131);
162 }
163 
164 static void tc27x_initfn(Object *obj)
165 {
166     TriCoreCPU *cpu = TRICORE_CPU(obj);
167 
168     set_feature(&cpu->env, TRICORE_FEATURE_161);
169 }
170 
171 static void tc37x_initfn(Object *obj)
172 {
173     TriCoreCPU *cpu = TRICORE_CPU(obj);
174 
175     set_feature(&cpu->env, TRICORE_FEATURE_162);
176 }
177 
178 
179 #include "hw/core/sysemu-cpu-ops.h"
180 
181 static const struct SysemuCPUOps tricore_sysemu_ops = {
182     .get_phys_page_debug = tricore_cpu_get_phys_page_debug,
183 };
184 
185 #include "hw/core/tcg-cpu-ops.h"
186 
187 static const struct TCGCPUOps tricore_tcg_ops = {
188     .initialize = tricore_tcg_init,
189     .synchronize_from_tb = tricore_cpu_synchronize_from_tb,
190     .restore_state_to_opc = tricore_restore_state_to_opc,
191     .tlb_fill = tricore_cpu_tlb_fill,
192 };
193 
194 static void tricore_cpu_class_init(ObjectClass *c, void *data)
195 {
196     TriCoreCPUClass *mcc = TRICORE_CPU_CLASS(c);
197     CPUClass *cc = CPU_CLASS(c);
198     DeviceClass *dc = DEVICE_CLASS(c);
199     ResettableClass *rc = RESETTABLE_CLASS(c);
200 
201     device_class_set_parent_realize(dc, tricore_cpu_realizefn,
202                                     &mcc->parent_realize);
203 
204     resettable_class_set_parent_phases(rc, NULL, tricore_cpu_reset_hold, NULL,
205                                        &mcc->parent_phases);
206     cc->class_by_name = tricore_cpu_class_by_name;
207     cc->has_work = tricore_cpu_has_work;
208 
209     cc->gdb_read_register = tricore_cpu_gdb_read_register;
210     cc->gdb_write_register = tricore_cpu_gdb_write_register;
211     cc->gdb_num_core_regs = 44;
212     cc->gdb_arch_name = tricore_gdb_arch_name;
213 
214     cc->dump_state = tricore_cpu_dump_state;
215     cc->set_pc = tricore_cpu_set_pc;
216     cc->get_pc = tricore_cpu_get_pc;
217     cc->sysemu_ops = &tricore_sysemu_ops;
218     cc->tcg_ops = &tricore_tcg_ops;
219 }
220 
221 #define DEFINE_TRICORE_CPU_TYPE(cpu_model, initfn) \
222     {                                              \
223         .parent = TYPE_TRICORE_CPU,                \
224         .instance_init = initfn,                   \
225         .name = TRICORE_CPU_TYPE_NAME(cpu_model),  \
226     }
227 
228 static const TypeInfo tricore_cpu_type_infos[] = {
229     {
230         .name = TYPE_TRICORE_CPU,
231         .parent = TYPE_CPU,
232         .instance_size = sizeof(TriCoreCPU),
233         .instance_init = tricore_cpu_initfn,
234         .abstract = true,
235         .class_size = sizeof(TriCoreCPUClass),
236         .class_init = tricore_cpu_class_init,
237     },
238     DEFINE_TRICORE_CPU_TYPE("tc1796", tc1796_initfn),
239     DEFINE_TRICORE_CPU_TYPE("tc1797", tc1797_initfn),
240     DEFINE_TRICORE_CPU_TYPE("tc27x", tc27x_initfn),
241     DEFINE_TRICORE_CPU_TYPE("tc37x", tc37x_initfn),
242 };
243 
244 DEFINE_TYPES(tricore_cpu_type_infos)
245