xref: /openbmc/qemu/target/tricore/cpu.c (revision 174d2d68)
1 /*
2  *  TriCore emulation for qemu: main translation routines.
3  *
4  *  Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qapi/error.h"
22 #include "cpu.h"
23 #include "exec/exec-all.h"
24 #include "qemu/error-report.h"
25 
26 static hwaddr tricore_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
27                                          MemTxAttrs *attrs)
28 {
29     error_report("function cpu_get_phys_page_attrs_debug not "
30                     "implemented, aborting");
31     return -1;
32 }
33 
34 static inline void set_feature(CPUTriCoreState *env, int feature)
35 {
36     env->features |= 1ULL << feature;
37 }
38 
39 static void tricore_cpu_set_pc(CPUState *cs, vaddr value)
40 {
41     TriCoreCPU *cpu = TRICORE_CPU(cs);
42     CPUTriCoreState *env = &cpu->env;
43 
44     env->PC = value & ~(target_ulong)1;
45 }
46 
47 static void tricore_cpu_synchronize_from_tb(CPUState *cs,
48                                             TranslationBlock *tb)
49 {
50     TriCoreCPU *cpu = TRICORE_CPU(cs);
51     CPUTriCoreState *env = &cpu->env;
52 
53     env->PC = tb->pc;
54 }
55 
56 static void tricore_cpu_reset(DeviceState *dev)
57 {
58     CPUState *s = CPU(dev);
59     TriCoreCPU *cpu = TRICORE_CPU(s);
60     TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(cpu);
61     CPUTriCoreState *env = &cpu->env;
62 
63     tcc->parent_reset(dev);
64 
65     cpu_state_reset(env);
66 }
67 
68 static bool tricore_cpu_has_work(CPUState *cs)
69 {
70     return true;
71 }
72 
73 static void tricore_cpu_realizefn(DeviceState *dev, Error **errp)
74 {
75     CPUState *cs = CPU(dev);
76     TriCoreCPU *cpu = TRICORE_CPU(dev);
77     TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(dev);
78     CPUTriCoreState *env = &cpu->env;
79     Error *local_err = NULL;
80 
81     cpu_exec_realizefn(cs, &local_err);
82     if (local_err != NULL) {
83         error_propagate(errp, local_err);
84         return;
85     }
86 
87     /* Some features automatically imply others */
88     if (tricore_feature(env, TRICORE_FEATURE_161)) {
89         set_feature(env, TRICORE_FEATURE_16);
90     }
91 
92     if (tricore_feature(env, TRICORE_FEATURE_16)) {
93         set_feature(env, TRICORE_FEATURE_131);
94     }
95     if (tricore_feature(env, TRICORE_FEATURE_131)) {
96         set_feature(env, TRICORE_FEATURE_13);
97     }
98     cpu_reset(cs);
99     qemu_init_vcpu(cs);
100 
101     tcc->parent_realize(dev, errp);
102 }
103 
104 
105 static void tricore_cpu_initfn(Object *obj)
106 {
107     TriCoreCPU *cpu = TRICORE_CPU(obj);
108 
109     cpu_set_cpustate_pointers(cpu);
110 }
111 
112 static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model)
113 {
114     ObjectClass *oc;
115     char *typename;
116 
117     typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model);
118     oc = object_class_by_name(typename);
119     g_free(typename);
120     if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) ||
121         object_class_is_abstract(oc)) {
122         return NULL;
123     }
124     return oc;
125 }
126 
127 static void tc1796_initfn(Object *obj)
128 {
129     TriCoreCPU *cpu = TRICORE_CPU(obj);
130 
131     set_feature(&cpu->env, TRICORE_FEATURE_13);
132 }
133 
134 static void tc1797_initfn(Object *obj)
135 {
136     TriCoreCPU *cpu = TRICORE_CPU(obj);
137 
138     set_feature(&cpu->env, TRICORE_FEATURE_131);
139 }
140 
141 static void tc27x_initfn(Object *obj)
142 {
143     TriCoreCPU *cpu = TRICORE_CPU(obj);
144 
145     set_feature(&cpu->env, TRICORE_FEATURE_161);
146 }
147 
148 static void tricore_cpu_class_init(ObjectClass *c, void *data)
149 {
150     TriCoreCPUClass *mcc = TRICORE_CPU_CLASS(c);
151     CPUClass *cc = CPU_CLASS(c);
152     DeviceClass *dc = DEVICE_CLASS(c);
153 
154     device_class_set_parent_realize(dc, tricore_cpu_realizefn,
155                                     &mcc->parent_realize);
156 
157     device_class_set_parent_reset(dc, tricore_cpu_reset, &mcc->parent_reset);
158     cc->class_by_name = tricore_cpu_class_by_name;
159     cc->has_work = tricore_cpu_has_work;
160 
161     cc->dump_state = tricore_cpu_dump_state;
162     cc->set_pc = tricore_cpu_set_pc;
163     cc->synchronize_from_tb = tricore_cpu_synchronize_from_tb;
164     cc->get_phys_page_attrs_debug = tricore_cpu_get_phys_page_attrs_debug;
165     cc->tcg_initialize = tricore_tcg_init;
166     cc->tlb_fill = tricore_cpu_tlb_fill;
167 }
168 
169 #define DEFINE_TRICORE_CPU_TYPE(cpu_model, initfn) \
170     {                                              \
171         .parent = TYPE_TRICORE_CPU,                \
172         .instance_init = initfn,                   \
173         .name = TRICORE_CPU_TYPE_NAME(cpu_model),  \
174     }
175 
176 static const TypeInfo tricore_cpu_type_infos[] = {
177     {
178         .name = TYPE_TRICORE_CPU,
179         .parent = TYPE_CPU,
180         .instance_size = sizeof(TriCoreCPU),
181         .instance_init = tricore_cpu_initfn,
182         .abstract = true,
183         .class_size = sizeof(TriCoreCPUClass),
184         .class_init = tricore_cpu_class_init,
185     },
186     DEFINE_TRICORE_CPU_TYPE("tc1796", tc1796_initfn),
187     DEFINE_TRICORE_CPU_TYPE("tc1797", tc1797_initfn),
188     DEFINE_TRICORE_CPU_TYPE("tc27x", tc27x_initfn),
189 };
190 
191 DEFINE_TYPES(tricore_cpu_type_infos)
192