1*fcf5ef2aSThomas Huth# See docs/tracing.txt for syntax documentation. 2*fcf5ef2aSThomas Huth 3*fcf5ef2aSThomas Huth# target/sparc/mmu_helper.c 4*fcf5ef2aSThomas Huthmmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" 5*fcf5ef2aSThomas Huthmmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" 6*fcf5ef2aSThomas Huthmmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64 7*fcf5ef2aSThomas Huthmmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64 8*fcf5ef2aSThomas Huthmmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64 9*fcf5ef2aSThomas Huthmmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64 10*fcf5ef2aSThomas Huthmmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64 11*fcf5ef2aSThomas Huthmmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64 12*fcf5ef2aSThomas Huth 13*fcf5ef2aSThomas Huth# target/sparc/int64_helper.c 14*fcf5ef2aSThomas Huthint_helper_set_softint(uint32_t softint) "new %08x" 15*fcf5ef2aSThomas Huthint_helper_clear_softint(uint32_t softint) "new %08x" 16*fcf5ef2aSThomas Huthint_helper_write_softint(uint32_t softint) "new %08x" 17*fcf5ef2aSThomas Huth 18*fcf5ef2aSThomas Huth# target/sparc/int32_helper.c 19*fcf5ef2aSThomas Huthint_helper_icache_freeze(void) "Instruction cache: freeze" 20*fcf5ef2aSThomas Huthint_helper_dcache_freeze(void) "Data cache: freeze" 21*fcf5ef2aSThomas Huth 22*fcf5ef2aSThomas Huth# target/sparc/win_helper.c 23*fcf5ef2aSThomas Huthwin_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x" 24*fcf5ef2aSThomas Huthwin_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x" 25*fcf5ef2aSThomas Huthwin_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)" 26*fcf5ef2aSThomas Huthwin_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x" 27*fcf5ef2aSThomas Huthwin_helper_done(uint32_t tl) "tl=%d" 28*fcf5ef2aSThomas Huthwin_helper_retry(uint32_t tl) "tl=%d" 29