xref: /openbmc/qemu/target/sparc/trace-events (revision 87e0331c5a2ac1d8d654e565ecbe72705118606b)
1*87e0331cSPhilippe Mathieu-Daudé# See docs/devel/tracing.txt for syntax documentation.
2fcf5ef2aSThomas Huth
3fcf5ef2aSThomas Huth# target/sparc/mmu_helper.c
4fcf5ef2aSThomas Huthmmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
5fcf5ef2aSThomas Huthmmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
6fcf5ef2aSThomas Huthmmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64
7fcf5ef2aSThomas Huthmmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64
8fcf5ef2aSThomas Huthmmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64
9fcf5ef2aSThomas Huthmmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
10fcf5ef2aSThomas Huthmmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
11fcf5ef2aSThomas Huthmmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64
12fcf5ef2aSThomas Huth
13fcf5ef2aSThomas Huth# target/sparc/int64_helper.c
14fcf5ef2aSThomas Huthint_helper_set_softint(uint32_t softint) "new %08x"
15fcf5ef2aSThomas Huthint_helper_clear_softint(uint32_t softint) "new %08x"
16fcf5ef2aSThomas Huthint_helper_write_softint(uint32_t softint) "new %08x"
17fcf5ef2aSThomas Huth
18fcf5ef2aSThomas Huth# target/sparc/int32_helper.c
19fcf5ef2aSThomas Huthint_helper_icache_freeze(void) "Instruction cache: freeze"
20fcf5ef2aSThomas Huthint_helper_dcache_freeze(void) "Data cache: freeze"
21fcf5ef2aSThomas Huth
22fcf5ef2aSThomas Huth# target/sparc/win_helper.c
23fcf5ef2aSThomas Huthwin_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x"
24fcf5ef2aSThomas Huthwin_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x"
25fcf5ef2aSThomas Huthwin_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)"
26fcf5ef2aSThomas Huthwin_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x"
27fcf5ef2aSThomas Huthwin_helper_done(uint32_t tl) "tl=%d"
28fcf5ef2aSThomas Huthwin_helper_retry(uint32_t tl) "tl=%d"
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