xref: /openbmc/qemu/target/sparc/int32_helper.c (revision effd60c8)
1 /*
2  * Sparc32 interrupt helpers
3  *
4  *  Copyright (c) 2003-2005 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qemu/main-loop.h"
22 #include "cpu.h"
23 #include "trace.h"
24 #include "exec/log.h"
25 #include "sysemu/runstate.h"
26 
27 
28 static const char * const excp_names[0x80] = {
29     [TT_TFAULT] = "Instruction Access Fault",
30     [TT_ILL_INSN] = "Illegal Instruction",
31     [TT_PRIV_INSN] = "Privileged Instruction",
32     [TT_NFPU_INSN] = "FPU Disabled",
33     [TT_WIN_OVF] = "Window Overflow",
34     [TT_WIN_UNF] = "Window Underflow",
35     [TT_UNALIGNED] = "Unaligned Memory Access",
36     [TT_FP_EXCP] = "FPU Exception",
37     [TT_DFAULT] = "Data Access Fault",
38     [TT_TOVF] = "Tag Overflow",
39     [TT_EXTINT | 0x1] = "External Interrupt 1",
40     [TT_EXTINT | 0x2] = "External Interrupt 2",
41     [TT_EXTINT | 0x3] = "External Interrupt 3",
42     [TT_EXTINT | 0x4] = "External Interrupt 4",
43     [TT_EXTINT | 0x5] = "External Interrupt 5",
44     [TT_EXTINT | 0x6] = "External Interrupt 6",
45     [TT_EXTINT | 0x7] = "External Interrupt 7",
46     [TT_EXTINT | 0x8] = "External Interrupt 8",
47     [TT_EXTINT | 0x9] = "External Interrupt 9",
48     [TT_EXTINT | 0xa] = "External Interrupt 10",
49     [TT_EXTINT | 0xb] = "External Interrupt 11",
50     [TT_EXTINT | 0xc] = "External Interrupt 12",
51     [TT_EXTINT | 0xd] = "External Interrupt 13",
52     [TT_EXTINT | 0xe] = "External Interrupt 14",
53     [TT_EXTINT | 0xf] = "External Interrupt 15",
54     [TT_CODE_ACCESS] = "Instruction Access Error",
55     [TT_DATA_ACCESS] = "Data Access Error",
56     [TT_DIV_ZERO] = "Division By Zero",
57     [TT_NCP_INSN] = "Coprocessor Disabled",
58 };
59 
60 static const char *excp_name_str(int32_t exception_index)
61 {
62     if (exception_index < 0 || exception_index >= ARRAY_SIZE(excp_names)) {
63         return "Unknown";
64     }
65     return excp_names[exception_index];
66 }
67 
68 void cpu_check_irqs(CPUSPARCState *env)
69 {
70     CPUState *cs;
71 
72     /* We should be holding the BQL before we mess with IRQs */
73     g_assert(bql_locked());
74 
75     if (env->pil_in && (env->interrupt_index == 0 ||
76                         (env->interrupt_index & ~15) == TT_EXTINT)) {
77         unsigned int i;
78 
79         for (i = 15; i > 0; i--) {
80             if (env->pil_in & (1 << i)) {
81                 int old_interrupt = env->interrupt_index;
82 
83                 env->interrupt_index = TT_EXTINT | i;
84                 if (old_interrupt != env->interrupt_index) {
85                     cs = env_cpu(env);
86                     trace_sun4m_cpu_interrupt(i);
87                     cpu_interrupt(cs, CPU_INTERRUPT_HARD);
88                 }
89                 break;
90             }
91         }
92     } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) {
93         cs = env_cpu(env);
94         trace_sun4m_cpu_reset_interrupt(env->interrupt_index & 15);
95         env->interrupt_index = 0;
96         cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
97     }
98 }
99 
100 void sparc_cpu_do_interrupt(CPUState *cs)
101 {
102     SPARCCPU *cpu = SPARC_CPU(cs);
103     CPUSPARCState *env = &cpu->env;
104     int cwp, intno = cs->exception_index;
105 
106     if (qemu_loglevel_mask(CPU_LOG_INT)) {
107         static int count;
108         const char *name;
109 
110         if (intno < 0 || intno >= 0x100) {
111             name = "Unknown";
112         } else if (intno >= 0x80) {
113             name = "Trap Instruction";
114         } else {
115             name = excp_name_str(intno);
116         }
117 
118         qemu_log("%6d: %s (v=%02x)\n", count, name, intno);
119         log_cpu_state(cs, 0);
120 #if 0
121         {
122             int i;
123             uint8_t *ptr;
124 
125             qemu_log("       code=");
126             ptr = (uint8_t *)env->pc;
127             for (i = 0; i < 16; i++) {
128                 qemu_log(" %02x", ldub(ptr + i));
129             }
130             qemu_log("\n");
131         }
132 #endif
133         count++;
134     }
135 #if !defined(CONFIG_USER_ONLY)
136     if (env->psret == 0) {
137         if (cs->exception_index == 0x80 &&
138             env->def.features & CPU_FEATURE_TA0_SHUTDOWN) {
139             qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
140         } else {
141             cpu_abort(cs, "Trap 0x%02x (%s) while interrupts disabled, "
142                           "Error state",
143                       cs->exception_index, excp_name_str(cs->exception_index));
144         }
145         return;
146     }
147 #endif
148     env->psret = 0;
149     cwp = cpu_cwp_dec(env, env->cwp - 1);
150     cpu_set_cwp(env, cwp);
151     env->regwptr[9] = env->pc;
152     env->regwptr[10] = env->npc;
153     env->psrps = env->psrs;
154     env->psrs = 1;
155     env->tbr = (env->tbr & TBR_BASE_MASK) | (intno << 4);
156     env->pc = env->tbr;
157     env->npc = env->pc + 4;
158     cs->exception_index = -1;
159 
160 #if !defined(CONFIG_USER_ONLY)
161     /* IRQ acknowledgment */
162     if ((intno & ~15) == TT_EXTINT && env->qemu_irq_ack != NULL) {
163         env->qemu_irq_ack(env, intno);
164     }
165 #endif
166 }
167