xref: /openbmc/qemu/target/sparc/helper.c (revision f3141174)
1fcf5ef2aSThomas Huth /*
2fcf5ef2aSThomas Huth  *  Misc Sparc helpers
3fcf5ef2aSThomas Huth  *
4fcf5ef2aSThomas Huth  *  Copyright (c) 2003-2005 Fabrice Bellard
5fcf5ef2aSThomas Huth  *
6fcf5ef2aSThomas Huth  * This library is free software; you can redistribute it and/or
7fcf5ef2aSThomas Huth  * modify it under the terms of the GNU Lesser General Public
8fcf5ef2aSThomas Huth  * License as published by the Free Software Foundation; either
95650b549SChetan Pant  * version 2.1 of the License, or (at your option) any later version.
10fcf5ef2aSThomas Huth  *
11fcf5ef2aSThomas Huth  * This library is distributed in the hope that it will be useful,
12fcf5ef2aSThomas Huth  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13fcf5ef2aSThomas Huth  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14fcf5ef2aSThomas Huth  * Lesser General Public License for more details.
15fcf5ef2aSThomas Huth  *
16fcf5ef2aSThomas Huth  * You should have received a copy of the GNU Lesser General Public
17fcf5ef2aSThomas Huth  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18fcf5ef2aSThomas Huth  */
19fcf5ef2aSThomas Huth 
20fcf5ef2aSThomas Huth #include "qemu/osdep.h"
21fcf5ef2aSThomas Huth #include "cpu.h"
22fcf5ef2aSThomas Huth #include "exec/exec-all.h"
23b8012ecfSPhilippe Mathieu-Daudé #include "qemu/timer.h"
24fcf5ef2aSThomas Huth #include "qemu/host-utils.h"
25fcf5ef2aSThomas Huth #include "exec/helper-proto.h"
26fcf5ef2aSThomas Huth 
cpu_raise_exception_ra(CPUSPARCState * env,int tt,uintptr_t ra)27fcf5ef2aSThomas Huth void cpu_raise_exception_ra(CPUSPARCState *env, int tt, uintptr_t ra)
28fcf5ef2aSThomas Huth {
295a59fbceSRichard Henderson     CPUState *cs = env_cpu(env);
30fcf5ef2aSThomas Huth 
31fcf5ef2aSThomas Huth     cs->exception_index = tt;
32fcf5ef2aSThomas Huth     cpu_loop_exit_restore(cs, ra);
33fcf5ef2aSThomas Huth }
34fcf5ef2aSThomas Huth 
helper_raise_exception(CPUSPARCState * env,int tt)35fcf5ef2aSThomas Huth void helper_raise_exception(CPUSPARCState *env, int tt)
36fcf5ef2aSThomas Huth {
375a59fbceSRichard Henderson     CPUState *cs = env_cpu(env);
38fcf5ef2aSThomas Huth 
39fcf5ef2aSThomas Huth     cs->exception_index = tt;
40fcf5ef2aSThomas Huth     cpu_loop_exit(cs);
41fcf5ef2aSThomas Huth }
42fcf5ef2aSThomas Huth 
helper_debug(CPUSPARCState * env)43fcf5ef2aSThomas Huth void helper_debug(CPUSPARCState *env)
44fcf5ef2aSThomas Huth {
455a59fbceSRichard Henderson     CPUState *cs = env_cpu(env);
46fcf5ef2aSThomas Huth 
47fcf5ef2aSThomas Huth     cs->exception_index = EXCP_DEBUG;
48fcf5ef2aSThomas Huth     cpu_loop_exit(cs);
49fcf5ef2aSThomas Huth }
50fcf5ef2aSThomas Huth 
51fcf5ef2aSThomas Huth #ifdef TARGET_SPARC64
helper_tick_set_count(void * opaque,uint64_t count)52fcf5ef2aSThomas Huth void helper_tick_set_count(void *opaque, uint64_t count)
53fcf5ef2aSThomas Huth {
54fcf5ef2aSThomas Huth #if !defined(CONFIG_USER_ONLY)
55fcf5ef2aSThomas Huth     cpu_tick_set_count(opaque, count);
56fcf5ef2aSThomas Huth #endif
57fcf5ef2aSThomas Huth }
58fcf5ef2aSThomas Huth 
helper_tick_get_count(CPUSPARCState * env,void * opaque,int mem_idx)59fcf5ef2aSThomas Huth uint64_t helper_tick_get_count(CPUSPARCState *env, void *opaque, int mem_idx)
60fcf5ef2aSThomas Huth {
61fcf5ef2aSThomas Huth #if !defined(CONFIG_USER_ONLY)
62fcf5ef2aSThomas Huth     CPUTimer *timer = opaque;
63fcf5ef2aSThomas Huth 
64fcf5ef2aSThomas Huth     if (timer->npt && mem_idx < MMU_KERNEL_IDX) {
65fcf5ef2aSThomas Huth         cpu_raise_exception_ra(env, TT_PRIV_INSN, GETPC());
66fcf5ef2aSThomas Huth     }
67fcf5ef2aSThomas Huth 
68fcf5ef2aSThomas Huth     return cpu_tick_get_count(timer);
69fcf5ef2aSThomas Huth #else
70b8e13ba9SLaurent Vivier     /* In user-mode, QEMU_CLOCK_VIRTUAL doesn't exist.
71b8e13ba9SLaurent Vivier        Just pass through the host cpu clock ticks.  */
72b8e13ba9SLaurent Vivier     return cpu_get_host_ticks();
73fcf5ef2aSThomas Huth #endif
74fcf5ef2aSThomas Huth }
75fcf5ef2aSThomas Huth 
helper_tick_set_limit(void * opaque,uint64_t limit)76fcf5ef2aSThomas Huth void helper_tick_set_limit(void *opaque, uint64_t limit)
77fcf5ef2aSThomas Huth {
78fcf5ef2aSThomas Huth #if !defined(CONFIG_USER_ONLY)
79fcf5ef2aSThomas Huth     cpu_tick_set_limit(opaque, limit);
80fcf5ef2aSThomas Huth #endif
81fcf5ef2aSThomas Huth }
82fcf5ef2aSThomas Huth #endif
83fcf5ef2aSThomas Huth 
helper_udiv(CPUSPARCState * env,target_ulong a,target_ulong b)8413260103SRichard Henderson uint64_t helper_udiv(CPUSPARCState *env, target_ulong a, target_ulong b)
85fcf5ef2aSThomas Huth {
8613260103SRichard Henderson     uint64_t a64 = (uint32_t)a | ((uint64_t)env->y << 32);
8713260103SRichard Henderson     uint32_t b32 = b;
8813260103SRichard Henderson     uint32_t r;
89fcf5ef2aSThomas Huth 
9013260103SRichard Henderson     if (b32 == 0) {
9113260103SRichard Henderson         cpu_raise_exception_ra(env, TT_DIV_ZERO, GETPC());
92fcf5ef2aSThomas Huth     }
93fcf5ef2aSThomas Huth 
9413260103SRichard Henderson     a64 /= b32;
9513260103SRichard Henderson     r = a64;
9613260103SRichard Henderson     if (unlikely(a64 > UINT32_MAX)) {
9713260103SRichard Henderson         return -1; /* r = UINT32_MAX, v = 1 */
9813260103SRichard Henderson     }
9913260103SRichard Henderson     return r;
100fcf5ef2aSThomas Huth }
101fcf5ef2aSThomas Huth 
helper_sdiv(CPUSPARCState * env,target_ulong a,target_ulong b)10213260103SRichard Henderson uint64_t helper_sdiv(CPUSPARCState *env, target_ulong a, target_ulong b)
103fcf5ef2aSThomas Huth {
10413260103SRichard Henderson     int64_t a64 = (uint32_t)a | ((uint64_t)env->y << 32);
10513260103SRichard Henderson     int32_t b32 = b;
10613260103SRichard Henderson     int32_t r;
10713260103SRichard Henderson 
10813260103SRichard Henderson     if (b32 == 0) {
10913260103SRichard Henderson         cpu_raise_exception_ra(env, TT_DIV_ZERO, GETPC());
110fcf5ef2aSThomas Huth     }
111fcf5ef2aSThomas Huth 
11213260103SRichard Henderson     if (unlikely(a64 == INT64_MIN)) {
11313260103SRichard Henderson         /*
11413260103SRichard Henderson          * Special case INT64_MIN / -1 is required to avoid trap on x86 host.
11513260103SRichard Henderson          * However, with a dividend of INT64_MIN, there is no 32-bit divisor
11613260103SRichard Henderson          * which can yield a 32-bit result:
11713260103SRichard Henderson          *    INT64_MIN / INT32_MIN =  0x1_0000_0000
11813260103SRichard Henderson          *    INT64_MIN / INT32_MAX = -0x1_0000_0002
11913260103SRichard Henderson          * Therefore we know we must overflow and saturate.
12013260103SRichard Henderson          */
12113260103SRichard Henderson         return (uint32_t)(b32 < 0 ? INT32_MAX : INT32_MIN) | (-1ull << 32);
122fcf5ef2aSThomas Huth     }
123fcf5ef2aSThomas Huth 
12413260103SRichard Henderson     a64 /= b;
12513260103SRichard Henderson     r = a64;
12613260103SRichard Henderson     if (unlikely(r != a64)) {
12713260103SRichard Henderson         return (uint32_t)(a64 < 0 ? INT32_MIN : INT32_MAX) | (-1ull << 32);
128fcf5ef2aSThomas Huth     }
12913260103SRichard Henderson     return (uint32_t)r;
130fcf5ef2aSThomas Huth }
131fcf5ef2aSThomas Huth 
helper_taddcctv(CPUSPARCState * env,target_ulong src1,target_ulong src2)132fcf5ef2aSThomas Huth target_ulong helper_taddcctv(CPUSPARCState *env, target_ulong src1,
133fcf5ef2aSThomas Huth                              target_ulong src2)
134fcf5ef2aSThomas Huth {
135*68524e83SRichard Henderson     target_ulong dst, v;
136fcf5ef2aSThomas Huth 
137fcf5ef2aSThomas Huth     /* Tag overflow occurs if either input has bits 0 or 1 set.  */
138fcf5ef2aSThomas Huth     if ((src1 | src2) & 3) {
139fcf5ef2aSThomas Huth         goto tag_overflow;
140fcf5ef2aSThomas Huth     }
141fcf5ef2aSThomas Huth 
142fcf5ef2aSThomas Huth     dst = src1 + src2;
143fcf5ef2aSThomas Huth 
144fcf5ef2aSThomas Huth     /* Tag overflow occurs if the addition overflows.  */
145*68524e83SRichard Henderson     v = ~(src1 ^ src2) & (src1 ^ dst);
146*68524e83SRichard Henderson     if (v & (1u << 31)) {
147fcf5ef2aSThomas Huth         goto tag_overflow;
148fcf5ef2aSThomas Huth     }
149fcf5ef2aSThomas Huth 
150fcf5ef2aSThomas Huth     /* Only modify the CC after any exceptions have been generated.  */
151*68524e83SRichard Henderson     env->cc_V = v;
152*68524e83SRichard Henderson     env->cc_N = dst;
153*68524e83SRichard Henderson     env->icc_Z = dst;
154*68524e83SRichard Henderson #ifdef TARGET_SPARC64
155*68524e83SRichard Henderson     env->xcc_Z = dst;
156*68524e83SRichard Henderson     env->icc_C = dst ^ src1 ^ src2;
157*68524e83SRichard Henderson     env->xcc_C = dst < src1;
158*68524e83SRichard Henderson #else
159*68524e83SRichard Henderson     env->icc_C = dst < src1;
160*68524e83SRichard Henderson #endif
161*68524e83SRichard Henderson 
162fcf5ef2aSThomas Huth     return dst;
163fcf5ef2aSThomas Huth 
164fcf5ef2aSThomas Huth  tag_overflow:
165fcf5ef2aSThomas Huth     cpu_raise_exception_ra(env, TT_TOVF, GETPC());
166fcf5ef2aSThomas Huth }
167fcf5ef2aSThomas Huth 
helper_tsubcctv(CPUSPARCState * env,target_ulong src1,target_ulong src2)168fcf5ef2aSThomas Huth target_ulong helper_tsubcctv(CPUSPARCState *env, target_ulong src1,
169fcf5ef2aSThomas Huth                              target_ulong src2)
170fcf5ef2aSThomas Huth {
171*68524e83SRichard Henderson     target_ulong dst, v;
172fcf5ef2aSThomas Huth 
173fcf5ef2aSThomas Huth     /* Tag overflow occurs if either input has bits 0 or 1 set.  */
174fcf5ef2aSThomas Huth     if ((src1 | src2) & 3) {
175fcf5ef2aSThomas Huth         goto tag_overflow;
176fcf5ef2aSThomas Huth     }
177fcf5ef2aSThomas Huth 
178fcf5ef2aSThomas Huth     dst = src1 - src2;
179fcf5ef2aSThomas Huth 
180fcf5ef2aSThomas Huth     /* Tag overflow occurs if the subtraction overflows.  */
181*68524e83SRichard Henderson     v = (src1 ^ src2) & (src1 ^ dst);
182*68524e83SRichard Henderson     if (v & (1u << 31)) {
183fcf5ef2aSThomas Huth         goto tag_overflow;
184fcf5ef2aSThomas Huth     }
185fcf5ef2aSThomas Huth 
186fcf5ef2aSThomas Huth     /* Only modify the CC after any exceptions have been generated.  */
187*68524e83SRichard Henderson     env->cc_V = v;
188*68524e83SRichard Henderson     env->cc_N = dst;
189*68524e83SRichard Henderson     env->icc_Z = dst;
190*68524e83SRichard Henderson #ifdef TARGET_SPARC64
191*68524e83SRichard Henderson     env->xcc_Z = dst;
192*68524e83SRichard Henderson     env->icc_C = dst ^ src1 ^ src2;
193*68524e83SRichard Henderson     env->xcc_C = src1 < src2;
194*68524e83SRichard Henderson #else
195*68524e83SRichard Henderson     env->icc_C = src1 < src2;
196*68524e83SRichard Henderson #endif
197*68524e83SRichard Henderson 
198fcf5ef2aSThomas Huth     return dst;
199fcf5ef2aSThomas Huth 
200fcf5ef2aSThomas Huth  tag_overflow:
201fcf5ef2aSThomas Huth     cpu_raise_exception_ra(env, TT_TOVF, GETPC());
202fcf5ef2aSThomas Huth }
203fcf5ef2aSThomas Huth 
204fcf5ef2aSThomas Huth #ifndef TARGET_SPARC64
helper_power_down(CPUSPARCState * env)205fcf5ef2aSThomas Huth void helper_power_down(CPUSPARCState *env)
206fcf5ef2aSThomas Huth {
2075a59fbceSRichard Henderson     CPUState *cs = env_cpu(env);
208fcf5ef2aSThomas Huth 
209fcf5ef2aSThomas Huth     cs->halted = 1;
210fcf5ef2aSThomas Huth     cs->exception_index = EXCP_HLT;
211fcf5ef2aSThomas Huth     env->pc = env->npc;
212fcf5ef2aSThomas Huth     env->npc = env->pc + 4;
213fcf5ef2aSThomas Huth     cpu_loop_exit(cs);
214fcf5ef2aSThomas Huth }
215fcf5ef2aSThomas Huth #endif
216