xref: /openbmc/qemu/target/s390x/tcg/crypto_helper.c (revision 05caa062)
1 /*
2  *  s390x crypto helpers
3  *
4  *  Copyright (C) 2022 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
5  *  Copyright (c) 2017 Red Hat Inc
6  *
7  *  Authors:
8  *   David Hildenbrand <david@redhat.com>
9  *   Jason A. Donenfeld <Jason@zx2c4.com>
10  *
11  * This work is licensed under the terms of the GNU GPL, version 2 or later.
12  * See the COPYING file in the top-level directory.
13  */
14 
15 #include "qemu/osdep.h"
16 #include "qemu/guest-random.h"
17 #include "s390x-internal.h"
18 #include "tcg_s390x.h"
19 #include "exec/helper-proto.h"
20 #include "exec/exec-all.h"
21 #include "exec/cpu_ldst.h"
22 
23 static uint64_t R(uint64_t x, int c)
24 {
25     return (x >> c) | (x << (64 - c));
26 }
27 static uint64_t Ch(uint64_t x, uint64_t y, uint64_t z)
28 {
29     return (x & y) ^ (~x & z);
30 }
31 static uint64_t Maj(uint64_t x, uint64_t y, uint64_t z)
32 {
33     return (x & y) ^ (x & z) ^ (y & z);
34 }
35 static uint64_t Sigma0(uint64_t x)
36 {
37     return R(x, 28) ^ R(x, 34) ^ R(x, 39);
38 }
39 static uint64_t Sigma1(uint64_t x)
40 {
41     return R(x, 14) ^ R(x, 18) ^ R(x, 41);
42 }
43 static uint64_t sigma0(uint64_t x)
44 {
45     return R(x, 1) ^ R(x, 8) ^ (x >> 7);
46 }
47 static uint64_t sigma1(uint64_t x)
48 {
49     return R(x, 19) ^ R(x, 61) ^ (x >> 6);
50 }
51 
52 static const uint64_t K[80] = {
53     0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL,
54     0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,
55     0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL,
56     0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL,
57     0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL,
58     0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL,
59     0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL,
60     0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL,
61     0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL,
62     0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL,
63     0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL,
64     0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL,
65     0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL,
66     0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL,
67     0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL,
68     0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL,
69     0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL,
70     0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL,
71     0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL,
72     0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL,
73     0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL,
74     0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL,
75     0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL,
76     0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL,
77     0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL,
78     0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,
79     0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL
80 };
81 
82 /* a is icv/ocv, w is a single message block. w will get reused internally. */
83 static void sha512_bda(uint64_t a[8], uint64_t w[16])
84 {
85     uint64_t t, z[8], b[8];
86     int i, j;
87 
88     memcpy(z, a, sizeof(z));
89     for (i = 0; i < 80; i++) {
90         memcpy(b, a, sizeof(b));
91 
92         t = a[7] + Sigma1(a[4]) + Ch(a[4], a[5], a[6]) + K[i] + w[i % 16];
93         b[7] = t + Sigma0(a[0]) + Maj(a[0], a[1], a[2]);
94         b[3] += t;
95         for (j = 0; j < 8; ++j) {
96             a[(j + 1) % 8] = b[j];
97         }
98         if (i % 16 == 15) {
99             for (j = 0; j < 16; ++j) {
100                 w[j] += w[(j + 9) % 16] + sigma0(w[(j + 1) % 16]) +
101                         sigma1(w[(j + 14) % 16]);
102             }
103         }
104     }
105 
106     for (i = 0; i < 8; i++) {
107         a[i] += z[i];
108     }
109 }
110 
111 /* a is icv/ocv, w is a single message block that needs be64 conversion. */
112 static void sha512_bda_be64(uint64_t a[8], uint64_t w[16])
113 {
114     uint64_t t[16];
115     int i;
116 
117     for (i = 0; i < 16; i++) {
118         t[i] = be64_to_cpu(w[i]);
119     }
120     sha512_bda(a, t);
121 }
122 
123 static void sha512_read_icv(CPUS390XState *env, uint64_t addr,
124                             uint64_t a[8], uintptr_t ra)
125 {
126     int i;
127 
128     for (i = 0; i < 8; i++, addr += 8) {
129         addr = wrap_address(env, addr);
130         a[i] = cpu_ldq_be_data_ra(env, addr, ra);
131     }
132 }
133 
134 static void sha512_write_ocv(CPUS390XState *env, uint64_t addr,
135                              uint64_t a[8], uintptr_t ra)
136 {
137     int i;
138 
139     for (i = 0; i < 8; i++, addr += 8) {
140         addr = wrap_address(env, addr);
141         cpu_stq_be_data_ra(env, addr, a[i], ra);
142     }
143 }
144 
145 static void sha512_read_block(CPUS390XState *env, uint64_t addr,
146                               uint64_t a[16], uintptr_t ra)
147 {
148     int i;
149 
150     for (i = 0; i < 16; i++, addr += 8) {
151         addr = wrap_address(env, addr);
152         a[i] = cpu_ldq_be_data_ra(env, addr, ra);
153     }
154 }
155 
156 static void sha512_read_mbl_be64(CPUS390XState *env, uint64_t addr,
157                                  uint8_t a[16], uintptr_t ra)
158 {
159     int i;
160 
161     for (i = 0; i < 16; i++, addr += 1) {
162         addr = wrap_address(env, addr);
163         a[i] = cpu_ldub_data_ra(env, addr, ra);
164     }
165 }
166 
167 static int cpacf_sha512(CPUS390XState *env, uintptr_t ra, uint64_t param_addr,
168                       uint64_t *message_reg, uint64_t *len_reg, uint32_t type)
169 {
170     enum { MAX_BLOCKS_PER_RUN = 64 }; /* Arbitrary: keep interactivity. */
171     uint64_t len = *len_reg, a[8], processed = 0;
172     int i, message_reg_len = 64;
173 
174     g_assert(type == S390_FEAT_TYPE_KIMD || type == S390_FEAT_TYPE_KLMD);
175 
176     if (!(env->psw.mask & PSW_MASK_64)) {
177         len = (uint32_t)len;
178         message_reg_len = (env->psw.mask & PSW_MASK_32) ? 32 : 24;
179     }
180 
181     /* KIMD: length has to be properly aligned. */
182     if (type == S390_FEAT_TYPE_KIMD && !QEMU_IS_ALIGNED(len, 128)) {
183         tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
184     }
185 
186     sha512_read_icv(env, param_addr, a, ra);
187 
188     /* Process full blocks first. */
189     for (; len >= 128; len -= 128, processed += 128) {
190         uint64_t w[16];
191 
192         if (processed >= MAX_BLOCKS_PER_RUN * 128) {
193             break;
194         }
195 
196         sha512_read_block(env, *message_reg + processed, w, ra);
197         sha512_bda(a, w);
198     }
199 
200     /* KLMD: Process partial/empty block last. */
201     if (type == S390_FEAT_TYPE_KLMD && len < 128) {
202         uint8_t x[128];
203 
204         /* Read the remainder of the message byte-per-byte. */
205         for (i = 0; i < len; i++) {
206             uint64_t addr = wrap_address(env, *message_reg + processed + i);
207 
208             x[i] = cpu_ldub_data_ra(env, addr, ra);
209         }
210         /* Pad the remainder with zero and set the top bit. */
211         memset(x + len, 0, 128 - len);
212         x[len] = 128;
213 
214         /*
215          * Place the MBL either into this block (if there is space left),
216          * or use an additional one.
217          */
218         if (len < 112) {
219             sha512_read_mbl_be64(env, param_addr + 64, x + 112, ra);
220         }
221         sha512_bda_be64(a, (uint64_t *)x);
222 
223         if (len >= 112) {
224             memset(x, 0, 112);
225             sha512_read_mbl_be64(env, param_addr + 64, x + 112, ra);
226             sha512_bda_be64(a, (uint64_t *)x);
227         }
228 
229         processed += len;
230         len = 0;
231     }
232 
233     /*
234      * Modify memory after we read all inputs and modify registers only after
235      * writing memory succeeded.
236      *
237      * TODO: if writing fails halfway through (e.g., when crossing page
238      * boundaries), we're in trouble. We'd need something like access_prepare().
239      */
240     sha512_write_ocv(env, param_addr, a, ra);
241     *message_reg = deposit64(*message_reg, 0, message_reg_len,
242                              *message_reg + processed);
243     *len_reg -= processed;
244     return !len ? 0 : 3;
245 }
246 
247 static void fill_buf_random(CPUS390XState *env, uintptr_t ra,
248                             uint64_t *buf_reg, uint64_t *len_reg)
249 {
250     uint8_t tmp[256];
251     uint64_t len = *len_reg;
252     int buf_reg_len = 64;
253 
254     if (!(env->psw.mask & PSW_MASK_64)) {
255         len = (uint32_t)len;
256         buf_reg_len = (env->psw.mask & PSW_MASK_32) ? 32 : 24;
257     }
258 
259     while (len) {
260         size_t block = MIN(len, sizeof(tmp));
261 
262         qemu_guest_getrandom_nofail(tmp, block);
263         for (size_t i = 0; i < block; ++i) {
264             cpu_stb_data_ra(env, wrap_address(env, *buf_reg), tmp[i], ra);
265             *buf_reg = deposit64(*buf_reg, 0, buf_reg_len, *buf_reg + 1);
266             --*len_reg;
267         }
268         len -= block;
269     }
270 }
271 
272 uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
273                      uint32_t type)
274 {
275     const uintptr_t ra = GETPC();
276     const uint8_t mod = env->regs[0] & 0x80ULL;
277     const uint8_t fc = env->regs[0] & 0x7fULL;
278     uint8_t subfunc[16] = { 0 };
279     uint64_t param_addr;
280     int i;
281 
282     switch (type) {
283     case S390_FEAT_TYPE_KMAC:
284     case S390_FEAT_TYPE_KIMD:
285     case S390_FEAT_TYPE_KLMD:
286     case S390_FEAT_TYPE_PCKMO:
287     case S390_FEAT_TYPE_PCC:
288         if (mod) {
289             tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
290         }
291         break;
292     }
293 
294     s390_get_feat_block(type, subfunc);
295     if (!test_be_bit(fc, subfunc)) {
296         tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
297     }
298 
299     switch (fc) {
300     case 0: /* query subfunction */
301         for (i = 0; i < 16; i++) {
302             param_addr = wrap_address(env, env->regs[1] + i);
303             cpu_stb_data_ra(env, param_addr, subfunc[i], ra);
304         }
305         break;
306     case 3: /* CPACF_*_SHA_512 */
307         return cpacf_sha512(env, ra, env->regs[1], &env->regs[r2],
308                             &env->regs[r2 + 1], type);
309     case 114: /* CPACF_PRNO_TRNG */
310         fill_buf_random(env, ra, &env->regs[r1], &env->regs[r1 + 1]);
311         fill_buf_random(env, ra, &env->regs[r2], &env->regs[r2 + 1]);
312         break;
313     default:
314         /* we don't implement any other subfunction yet */
315         g_assert_not_reached();
316     }
317 
318     return 0;
319 }
320