1 /* 2 * S/390 helpers 3 * 4 * Copyright (c) 2009 Ulrich Hecht 5 * Copyright (c) 2011 Alexander Graf 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public 9 * License as published by the Free Software Foundation; either 10 * version 2 of the License, or (at your option) any later version. 11 * 12 * This library is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * Lesser General Public License for more details. 16 * 17 * You should have received a copy of the GNU Lesser General Public 18 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include "qemu/osdep.h" 22 #include "qapi/error.h" 23 #include "cpu.h" 24 #include "internal.h" 25 #include "exec/gdbstub.h" 26 #include "qemu/timer.h" 27 #include "exec/exec-all.h" 28 #include "hw/s390x/ioinst.h" 29 #ifndef CONFIG_USER_ONLY 30 #include "sysemu/sysemu.h" 31 #endif 32 33 //#define DEBUG_S390 34 //#define DEBUG_S390_STDOUT 35 36 #ifdef DEBUG_S390 37 #ifdef DEBUG_S390_STDOUT 38 #define DPRINTF(fmt, ...) \ 39 do { fprintf(stderr, fmt, ## __VA_ARGS__); \ 40 if (qemu_log_separate()) qemu_log(fmt, ##__VA_ARGS__); } while (0) 41 #else 42 #define DPRINTF(fmt, ...) \ 43 do { qemu_log(fmt, ## __VA_ARGS__); } while (0) 44 #endif 45 #else 46 #define DPRINTF(fmt, ...) \ 47 do { } while (0) 48 #endif 49 50 51 #ifndef CONFIG_USER_ONLY 52 void s390x_tod_timer(void *opaque) 53 { 54 S390CPU *cpu = opaque; 55 CPUS390XState *env = &cpu->env; 56 57 env->pending_int |= INTERRUPT_TOD; 58 cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD); 59 } 60 61 void s390x_cpu_timer(void *opaque) 62 { 63 S390CPU *cpu = opaque; 64 CPUS390XState *env = &cpu->env; 65 66 env->pending_int |= INTERRUPT_CPUTIMER; 67 cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD); 68 } 69 #endif 70 71 S390CPU *cpu_s390x_create(const char *cpu_model, Error **errp) 72 { 73 static bool features_parsed; 74 char *name, *features; 75 const char *typename; 76 ObjectClass *oc; 77 CPUClass *cc; 78 79 name = g_strdup(cpu_model); 80 features = strchr(name, ','); 81 if (features) { 82 features[0] = 0; 83 features++; 84 } 85 86 oc = cpu_class_by_name(TYPE_S390_CPU, name); 87 if (!oc) { 88 error_setg(errp, "Unknown CPU definition \'%s\'", name); 89 g_free(name); 90 return NULL; 91 } 92 typename = object_class_get_name(oc); 93 94 if (!features_parsed) { 95 features_parsed = true; 96 cc = CPU_CLASS(oc); 97 cc->parse_features(typename, features, errp); 98 } 99 g_free(name); 100 101 if (*errp) { 102 return NULL; 103 } 104 return S390_CPU(CPU(object_new(typename))); 105 } 106 107 S390CPU *s390x_new_cpu(const char *cpu_model, int64_t id, Error **errp) 108 { 109 S390CPU *cpu; 110 Error *err = NULL; 111 112 cpu = cpu_s390x_create(cpu_model, &err); 113 if (err != NULL) { 114 goto out; 115 } 116 117 object_property_set_int(OBJECT(cpu), id, "id", &err); 118 if (err != NULL) { 119 goto out; 120 } 121 object_property_set_bool(OBJECT(cpu), true, "realized", &err); 122 123 out: 124 if (err) { 125 error_propagate(errp, err); 126 object_unref(OBJECT(cpu)); 127 cpu = NULL; 128 } 129 return cpu; 130 } 131 132 #ifndef CONFIG_USER_ONLY 133 134 hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr) 135 { 136 S390CPU *cpu = S390_CPU(cs); 137 CPUS390XState *env = &cpu->env; 138 target_ulong raddr; 139 int prot; 140 uint64_t asc = env->psw.mask & PSW_MASK_ASC; 141 142 /* 31-Bit mode */ 143 if (!(env->psw.mask & PSW_MASK_64)) { 144 vaddr &= 0x7fffffff; 145 } 146 147 if (mmu_translate(env, vaddr, MMU_INST_FETCH, asc, &raddr, &prot, false)) { 148 return -1; 149 } 150 return raddr; 151 } 152 153 hwaddr s390_cpu_get_phys_addr_debug(CPUState *cs, vaddr vaddr) 154 { 155 hwaddr phys_addr; 156 target_ulong page; 157 158 page = vaddr & TARGET_PAGE_MASK; 159 phys_addr = cpu_get_phys_page_debug(cs, page); 160 phys_addr += (vaddr & ~TARGET_PAGE_MASK); 161 162 return phys_addr; 163 } 164 165 void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr) 166 { 167 uint64_t old_mask = env->psw.mask; 168 169 env->psw.addr = addr; 170 env->psw.mask = mask; 171 if (tcg_enabled()) { 172 env->cc_op = (mask >> 44) & 3; 173 } 174 175 if ((old_mask ^ mask) & PSW_MASK_PER) { 176 s390_cpu_recompute_watchpoints(CPU(s390_env_get_cpu(env))); 177 } 178 179 if (mask & PSW_MASK_WAIT) { 180 S390CPU *cpu = s390_env_get_cpu(env); 181 if (s390_cpu_halt(cpu) == 0) { 182 #ifndef CONFIG_USER_ONLY 183 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 184 #endif 185 } 186 } 187 } 188 189 uint64_t get_psw_mask(CPUS390XState *env) 190 { 191 uint64_t r = env->psw.mask; 192 193 if (tcg_enabled()) { 194 env->cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst, 195 env->cc_vr); 196 197 r &= ~PSW_MASK_CC; 198 assert(!(env->cc_op & ~3)); 199 r |= (uint64_t)env->cc_op << 44; 200 } 201 202 return r; 203 } 204 205 LowCore *cpu_map_lowcore(CPUS390XState *env) 206 { 207 S390CPU *cpu = s390_env_get_cpu(env); 208 LowCore *lowcore; 209 hwaddr len = sizeof(LowCore); 210 211 lowcore = cpu_physical_memory_map(env->psa, &len, 1); 212 213 if (len < sizeof(LowCore)) { 214 cpu_abort(CPU(cpu), "Could not map lowcore\n"); 215 } 216 217 return lowcore; 218 } 219 220 void cpu_unmap_lowcore(LowCore *lowcore) 221 { 222 cpu_physical_memory_unmap(lowcore, sizeof(LowCore), 1, sizeof(LowCore)); 223 } 224 225 void do_restart_interrupt(CPUS390XState *env) 226 { 227 uint64_t mask, addr; 228 LowCore *lowcore; 229 230 lowcore = cpu_map_lowcore(env); 231 232 lowcore->restart_old_psw.mask = cpu_to_be64(get_psw_mask(env)); 233 lowcore->restart_old_psw.addr = cpu_to_be64(env->psw.addr); 234 mask = be64_to_cpu(lowcore->restart_new_psw.mask); 235 addr = be64_to_cpu(lowcore->restart_new_psw.addr); 236 237 cpu_unmap_lowcore(lowcore); 238 239 load_psw(env, mask, addr); 240 } 241 242 void s390_cpu_recompute_watchpoints(CPUState *cs) 243 { 244 const int wp_flags = BP_CPU | BP_MEM_WRITE | BP_STOP_BEFORE_ACCESS; 245 S390CPU *cpu = S390_CPU(cs); 246 CPUS390XState *env = &cpu->env; 247 248 /* We are called when the watchpoints have changed. First 249 remove them all. */ 250 cpu_watchpoint_remove_all(cs, BP_CPU); 251 252 /* Return if PER is not enabled */ 253 if (!(env->psw.mask & PSW_MASK_PER)) { 254 return; 255 } 256 257 /* Return if storage-alteration event is not enabled. */ 258 if (!(env->cregs[9] & PER_CR9_EVENT_STORE)) { 259 return; 260 } 261 262 if (env->cregs[10] == 0 && env->cregs[11] == -1LL) { 263 /* We can't create a watchoint spanning the whole memory range, so 264 split it in two parts. */ 265 cpu_watchpoint_insert(cs, 0, 1ULL << 63, wp_flags, NULL); 266 cpu_watchpoint_insert(cs, 1ULL << 63, 1ULL << 63, wp_flags, NULL); 267 } else if (env->cregs[10] > env->cregs[11]) { 268 /* The address range loops, create two watchpoints. */ 269 cpu_watchpoint_insert(cs, env->cregs[10], -env->cregs[10], 270 wp_flags, NULL); 271 cpu_watchpoint_insert(cs, 0, env->cregs[11] + 1, wp_flags, NULL); 272 273 } else { 274 /* Default case, create a single watchpoint. */ 275 cpu_watchpoint_insert(cs, env->cregs[10], 276 env->cregs[11] - env->cregs[10] + 1, 277 wp_flags, NULL); 278 } 279 } 280 281 #endif /* CONFIG_USER_ONLY */ 282 283 void s390_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, 284 int flags) 285 { 286 S390CPU *cpu = S390_CPU(cs); 287 CPUS390XState *env = &cpu->env; 288 int i; 289 290 if (env->cc_op > 3) { 291 cpu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64 " cc %15s\n", 292 env->psw.mask, env->psw.addr, cc_name(env->cc_op)); 293 } else { 294 cpu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64 " cc %02x\n", 295 env->psw.mask, env->psw.addr, env->cc_op); 296 } 297 298 for (i = 0; i < 16; i++) { 299 cpu_fprintf(f, "R%02d=%016" PRIx64, i, env->regs[i]); 300 if ((i % 4) == 3) { 301 cpu_fprintf(f, "\n"); 302 } else { 303 cpu_fprintf(f, " "); 304 } 305 } 306 307 for (i = 0; i < 16; i++) { 308 cpu_fprintf(f, "F%02d=%016" PRIx64, i, get_freg(env, i)->ll); 309 if ((i % 4) == 3) { 310 cpu_fprintf(f, "\n"); 311 } else { 312 cpu_fprintf(f, " "); 313 } 314 } 315 316 for (i = 0; i < 32; i++) { 317 cpu_fprintf(f, "V%02d=%016" PRIx64 "%016" PRIx64, i, 318 env->vregs[i][0].ll, env->vregs[i][1].ll); 319 cpu_fprintf(f, (i % 2) ? "\n" : " "); 320 } 321 322 #ifndef CONFIG_USER_ONLY 323 for (i = 0; i < 16; i++) { 324 cpu_fprintf(f, "C%02d=%016" PRIx64, i, env->cregs[i]); 325 if ((i % 4) == 3) { 326 cpu_fprintf(f, "\n"); 327 } else { 328 cpu_fprintf(f, " "); 329 } 330 } 331 #endif 332 333 #ifdef DEBUG_INLINE_BRANCHES 334 for (i = 0; i < CC_OP_MAX; i++) { 335 cpu_fprintf(f, " %15s = %10ld\t%10ld\n", cc_name(i), 336 inline_branch_miss[i], inline_branch_hit[i]); 337 } 338 #endif 339 340 cpu_fprintf(f, "\n"); 341 } 342 343 const char *cc_name(enum cc_op cc_op) 344 { 345 static const char * const cc_names[] = { 346 [CC_OP_CONST0] = "CC_OP_CONST0", 347 [CC_OP_CONST1] = "CC_OP_CONST1", 348 [CC_OP_CONST2] = "CC_OP_CONST2", 349 [CC_OP_CONST3] = "CC_OP_CONST3", 350 [CC_OP_DYNAMIC] = "CC_OP_DYNAMIC", 351 [CC_OP_STATIC] = "CC_OP_STATIC", 352 [CC_OP_NZ] = "CC_OP_NZ", 353 [CC_OP_LTGT_32] = "CC_OP_LTGT_32", 354 [CC_OP_LTGT_64] = "CC_OP_LTGT_64", 355 [CC_OP_LTUGTU_32] = "CC_OP_LTUGTU_32", 356 [CC_OP_LTUGTU_64] = "CC_OP_LTUGTU_64", 357 [CC_OP_LTGT0_32] = "CC_OP_LTGT0_32", 358 [CC_OP_LTGT0_64] = "CC_OP_LTGT0_64", 359 [CC_OP_ADD_64] = "CC_OP_ADD_64", 360 [CC_OP_ADDU_64] = "CC_OP_ADDU_64", 361 [CC_OP_ADDC_64] = "CC_OP_ADDC_64", 362 [CC_OP_SUB_64] = "CC_OP_SUB_64", 363 [CC_OP_SUBU_64] = "CC_OP_SUBU_64", 364 [CC_OP_SUBB_64] = "CC_OP_SUBB_64", 365 [CC_OP_ABS_64] = "CC_OP_ABS_64", 366 [CC_OP_NABS_64] = "CC_OP_NABS_64", 367 [CC_OP_ADD_32] = "CC_OP_ADD_32", 368 [CC_OP_ADDU_32] = "CC_OP_ADDU_32", 369 [CC_OP_ADDC_32] = "CC_OP_ADDC_32", 370 [CC_OP_SUB_32] = "CC_OP_SUB_32", 371 [CC_OP_SUBU_32] = "CC_OP_SUBU_32", 372 [CC_OP_SUBB_32] = "CC_OP_SUBB_32", 373 [CC_OP_ABS_32] = "CC_OP_ABS_32", 374 [CC_OP_NABS_32] = "CC_OP_NABS_32", 375 [CC_OP_COMP_32] = "CC_OP_COMP_32", 376 [CC_OP_COMP_64] = "CC_OP_COMP_64", 377 [CC_OP_TM_32] = "CC_OP_TM_32", 378 [CC_OP_TM_64] = "CC_OP_TM_64", 379 [CC_OP_NZ_F32] = "CC_OP_NZ_F32", 380 [CC_OP_NZ_F64] = "CC_OP_NZ_F64", 381 [CC_OP_NZ_F128] = "CC_OP_NZ_F128", 382 [CC_OP_ICM] = "CC_OP_ICM", 383 [CC_OP_SLA_32] = "CC_OP_SLA_32", 384 [CC_OP_SLA_64] = "CC_OP_SLA_64", 385 [CC_OP_FLOGR] = "CC_OP_FLOGR", 386 }; 387 388 return cc_names[cc_op]; 389 } 390