1 /* 2 * S390x DIAG instruction helper functions 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #include "qemu/osdep.h" 16 #include "cpu.h" 17 #include "internal.h" 18 #include "exec/address-spaces.h" 19 #include "exec/exec-all.h" 20 #include "hw/watchdog/wdt_diag288.h" 21 #include "sysemu/cpus.h" 22 #include "hw/s390x/ipl.h" 23 24 static int modified_clear_reset(S390CPU *cpu) 25 { 26 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); 27 CPUState *t; 28 29 pause_all_vcpus(); 30 cpu_synchronize_all_states(); 31 CPU_FOREACH(t) { 32 run_on_cpu(t, s390_do_cpu_full_reset, RUN_ON_CPU_NULL); 33 } 34 s390_cmma_reset(); 35 subsystem_reset(); 36 s390_crypto_reset(); 37 scc->load_normal(CPU(cpu)); 38 cpu_synchronize_all_post_reset(); 39 resume_all_vcpus(); 40 return 0; 41 } 42 43 static inline void s390_do_cpu_reset(CPUState *cs, run_on_cpu_data arg) 44 { 45 S390CPUClass *scc = S390_CPU_GET_CLASS(cs); 46 47 scc->cpu_reset(cs); 48 } 49 50 static int load_normal_reset(S390CPU *cpu) 51 { 52 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); 53 CPUState *t; 54 55 pause_all_vcpus(); 56 cpu_synchronize_all_states(); 57 CPU_FOREACH(t) { 58 run_on_cpu(t, s390_do_cpu_reset, RUN_ON_CPU_NULL); 59 } 60 s390_cmma_reset(); 61 subsystem_reset(); 62 scc->initial_cpu_reset(CPU(cpu)); 63 scc->load_normal(CPU(cpu)); 64 cpu_synchronize_all_post_reset(); 65 resume_all_vcpus(); 66 return 0; 67 } 68 69 int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3) 70 { 71 uint64_t func = env->regs[r1]; 72 uint64_t timeout = env->regs[r1 + 1]; 73 uint64_t action = env->regs[r3]; 74 Object *obj; 75 DIAG288State *diag288; 76 DIAG288Class *diag288_class; 77 78 if (r1 % 2 || action != 0) { 79 return -1; 80 } 81 82 /* Timeout must be more than 15 seconds except for timer deletion */ 83 if (func != WDT_DIAG288_CANCEL && timeout < 15) { 84 return -1; 85 } 86 87 obj = object_resolve_path_type("", TYPE_WDT_DIAG288, NULL); 88 if (!obj) { 89 return -1; 90 } 91 92 diag288 = DIAG288(obj); 93 diag288_class = DIAG288_GET_CLASS(diag288); 94 return diag288_class->handle_timer(diag288, func, timeout); 95 } 96 97 #define DIAG_308_RC_OK 0x0001 98 #define DIAG_308_RC_NO_CONF 0x0102 99 #define DIAG_308_RC_INVALID 0x0402 100 101 void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3) 102 { 103 uint64_t addr = env->regs[r1]; 104 uint64_t subcode = env->regs[r3]; 105 IplParameterBlock *iplb; 106 107 if (env->psw.mask & PSW_MASK_PSTATE) { 108 program_interrupt(env, PGM_PRIVILEGED, ILEN_AUTO); 109 return; 110 } 111 112 if ((subcode & ~0x0ffffULL) || (subcode > 6)) { 113 program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO); 114 return; 115 } 116 117 switch (subcode) { 118 case 0: 119 modified_clear_reset(s390_env_get_cpu(env)); 120 if (tcg_enabled()) { 121 cpu_loop_exit(CPU(s390_env_get_cpu(env))); 122 } 123 break; 124 case 1: 125 load_normal_reset(s390_env_get_cpu(env)); 126 if (tcg_enabled()) { 127 cpu_loop_exit(CPU(s390_env_get_cpu(env))); 128 } 129 break; 130 case 3: 131 s390_reipl_request(); 132 if (tcg_enabled()) { 133 cpu_loop_exit(CPU(s390_env_get_cpu(env))); 134 } 135 break; 136 case 5: 137 if ((r1 & 1) || (addr & 0x0fffULL)) { 138 program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO); 139 return; 140 } 141 if (!address_space_access_valid(&address_space_memory, addr, 142 sizeof(IplParameterBlock), false)) { 143 program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO); 144 return; 145 } 146 iplb = g_malloc0(sizeof(IplParameterBlock)); 147 cpu_physical_memory_read(addr, iplb, sizeof(iplb->len)); 148 if (!iplb_valid_len(iplb)) { 149 env->regs[r1 + 1] = DIAG_308_RC_INVALID; 150 goto out; 151 } 152 153 cpu_physical_memory_read(addr, iplb, be32_to_cpu(iplb->len)); 154 155 if (!iplb_valid_ccw(iplb) && !iplb_valid_fcp(iplb)) { 156 env->regs[r1 + 1] = DIAG_308_RC_INVALID; 157 goto out; 158 } 159 160 s390_ipl_update_diag308(iplb); 161 env->regs[r1 + 1] = DIAG_308_RC_OK; 162 out: 163 g_free(iplb); 164 return; 165 case 6: 166 if ((r1 & 1) || (addr & 0x0fffULL)) { 167 program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO); 168 return; 169 } 170 if (!address_space_access_valid(&address_space_memory, addr, 171 sizeof(IplParameterBlock), true)) { 172 program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO); 173 return; 174 } 175 iplb = s390_ipl_get_iplb(); 176 if (iplb) { 177 cpu_physical_memory_write(addr, iplb, be32_to_cpu(iplb->len)); 178 env->regs[r1 + 1] = DIAG_308_RC_OK; 179 } else { 180 env->regs[r1 + 1] = DIAG_308_RC_NO_CONF; 181 } 182 return; 183 default: 184 hw_error("Unhandled diag308 subcode %" PRIx64, subcode); 185 break; 186 } 187 } 188