1 /* 2 * QEMU S/390 CPU 3 * 4 * Copyright (c) 2009 Ulrich Hecht 5 * Copyright (c) 2011 Alexander Graf 6 * Copyright (c) 2012 SUSE LINUX Products GmbH 7 * Copyright (c) 2012 IBM Corp. 8 * 9 * This library is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU Lesser General Public 11 * License as published by the Free Software Foundation; either 12 * version 2.1 of the License, or (at your option) any later version. 13 * 14 * This library is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * Lesser General Public License for more details. 18 * 19 * You should have received a copy of the GNU Lesser General Public 20 * License along with this library; if not, see 21 * <http://www.gnu.org/licenses/lgpl-2.1.html> 22 * Contributions after 2012-12-11 are licensed under the terms of the 23 * GNU GPL, version 2 or (at your option) any later version. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "qapi/error.h" 28 #include "cpu.h" 29 #include "internal.h" 30 #include "kvm_s390x.h" 31 #include "sysemu/kvm.h" 32 #include "qemu-common.h" 33 #include "qemu/cutils.h" 34 #include "qemu/timer.h" 35 #include "qemu/error-report.h" 36 #include "trace.h" 37 #include "qapi/visitor.h" 38 #include "exec/exec-all.h" 39 #ifndef CONFIG_USER_ONLY 40 #include "hw/hw.h" 41 #include "sysemu/arch_init.h" 42 #include "sysemu/sysemu.h" 43 #include "hw/s390x/sclp.h" 44 #endif 45 46 #define CR0_RESET 0xE0UL 47 #define CR14_RESET 0xC2000000UL; 48 49 static void s390_cpu_set_pc(CPUState *cs, vaddr value) 50 { 51 S390CPU *cpu = S390_CPU(cs); 52 53 cpu->env.psw.addr = value; 54 } 55 56 static bool s390_cpu_has_work(CPUState *cs) 57 { 58 S390CPU *cpu = S390_CPU(cs); 59 CPUS390XState *env = &cpu->env; 60 61 return (cs->interrupt_request & CPU_INTERRUPT_HARD) && 62 (env->psw.mask & PSW_MASK_EXT); 63 } 64 65 #if !defined(CONFIG_USER_ONLY) 66 /* S390CPUClass::load_normal() */ 67 static void s390_cpu_load_normal(CPUState *s) 68 { 69 S390CPU *cpu = S390_CPU(s); 70 cpu->env.psw.addr = ldl_phys(s->as, 4) & PSW_MASK_ESA_ADDR; 71 cpu->env.psw.mask = PSW_MASK_32 | PSW_MASK_64; 72 s390_cpu_set_state(CPU_STATE_OPERATING, cpu); 73 } 74 #endif 75 76 /* S390CPUClass::cpu_reset() */ 77 static void s390_cpu_reset(CPUState *s) 78 { 79 S390CPU *cpu = S390_CPU(s); 80 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); 81 CPUS390XState *env = &cpu->env; 82 83 env->pfault_token = -1UL; 84 scc->parent_reset(s); 85 cpu->env.sigp_order = 0; 86 s390_cpu_set_state(CPU_STATE_STOPPED, cpu); 87 } 88 89 /* S390CPUClass::initial_reset() */ 90 static void s390_cpu_initial_reset(CPUState *s) 91 { 92 S390CPU *cpu = S390_CPU(s); 93 CPUS390XState *env = &cpu->env; 94 int i; 95 96 s390_cpu_reset(s); 97 /* initial reset does not clear everything! */ 98 memset(&env->start_initial_reset_fields, 0, 99 offsetof(CPUS390XState, end_reset_fields) - 100 offsetof(CPUS390XState, start_initial_reset_fields)); 101 102 /* architectured initial values for CR 0 and 14 */ 103 env->cregs[0] = CR0_RESET; 104 env->cregs[14] = CR14_RESET; 105 106 /* architectured initial value for Breaking-Event-Address register */ 107 env->gbea = 1; 108 109 env->pfault_token = -1UL; 110 env->ext_index = -1; 111 for (i = 0; i < ARRAY_SIZE(env->io_index); i++) { 112 env->io_index[i] = -1; 113 } 114 115 /* tininess for underflow is detected before rounding */ 116 set_float_detect_tininess(float_tininess_before_rounding, 117 &env->fpu_status); 118 119 /* Reset state inside the kernel that we cannot access yet from QEMU. */ 120 if (kvm_enabled()) { 121 kvm_s390_reset_vcpu(cpu); 122 } 123 } 124 125 /* CPUClass:reset() */ 126 static void s390_cpu_full_reset(CPUState *s) 127 { 128 S390CPU *cpu = S390_CPU(s); 129 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); 130 CPUS390XState *env = &cpu->env; 131 int i; 132 133 scc->parent_reset(s); 134 cpu->env.sigp_order = 0; 135 s390_cpu_set_state(CPU_STATE_STOPPED, cpu); 136 137 memset(env, 0, offsetof(CPUS390XState, end_reset_fields)); 138 139 /* architectured initial values for CR 0 and 14 */ 140 env->cregs[0] = CR0_RESET; 141 env->cregs[14] = CR14_RESET; 142 143 /* architectured initial value for Breaking-Event-Address register */ 144 env->gbea = 1; 145 146 env->pfault_token = -1UL; 147 env->ext_index = -1; 148 for (i = 0; i < ARRAY_SIZE(env->io_index); i++) { 149 env->io_index[i] = -1; 150 } 151 152 /* tininess for underflow is detected before rounding */ 153 set_float_detect_tininess(float_tininess_before_rounding, 154 &env->fpu_status); 155 156 /* Reset state inside the kernel that we cannot access yet from QEMU. */ 157 if (kvm_enabled()) { 158 kvm_s390_reset_vcpu(cpu); 159 } 160 } 161 162 #if !defined(CONFIG_USER_ONLY) 163 static void s390_cpu_machine_reset_cb(void *opaque) 164 { 165 S390CPU *cpu = opaque; 166 167 run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, RUN_ON_CPU_NULL); 168 } 169 #endif 170 171 static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) 172 { 173 info->mach = bfd_mach_s390_64; 174 info->print_insn = print_insn_s390; 175 } 176 177 static void s390_cpu_realizefn(DeviceState *dev, Error **errp) 178 { 179 CPUState *cs = CPU(dev); 180 S390CPUClass *scc = S390_CPU_GET_CLASS(dev); 181 S390CPU *cpu = S390_CPU(dev); 182 CPUS390XState *env = &cpu->env; 183 Error *err = NULL; 184 185 /* the model has to be realized before qemu_init_vcpu() due to kvm */ 186 s390_realize_cpu_model(cs, &err); 187 if (err) { 188 goto out; 189 } 190 191 #if !defined(CONFIG_USER_ONLY) 192 if (cpu->id >= max_cpus) { 193 error_setg(&err, "Unable to add CPU: %" PRIi64 194 ", max allowed: %d", cpu->id, max_cpus - 1); 195 goto out; 196 } 197 #endif 198 if (cpu_exists(cpu->id)) { 199 error_setg(&err, "Unable to add CPU: %" PRIi64 200 ", it already exists", cpu->id); 201 goto out; 202 } 203 if (cpu->id != scc->next_cpu_id) { 204 error_setg(&err, "Unable to add CPU: %" PRIi64 205 ", The next available id is %" PRIi64, cpu->id, 206 scc->next_cpu_id); 207 goto out; 208 } 209 210 cpu_exec_realizefn(cs, &err); 211 if (err != NULL) { 212 goto out; 213 } 214 scc->next_cpu_id++; 215 216 #if !defined(CONFIG_USER_ONLY) 217 qemu_register_reset(s390_cpu_machine_reset_cb, cpu); 218 #endif 219 env->cpu_num = cpu->id; 220 s390_cpu_gdb_init(cs); 221 qemu_init_vcpu(cs); 222 #if !defined(CONFIG_USER_ONLY) 223 run_on_cpu(cs, s390_do_cpu_full_reset, RUN_ON_CPU_NULL); 224 #else 225 cpu_reset(cs); 226 #endif 227 228 scc->parent_realize(dev, &err); 229 230 #if !defined(CONFIG_USER_ONLY) 231 if (dev->hotplugged) { 232 raise_irq_cpu_hotplug(); 233 } 234 #endif 235 236 out: 237 error_propagate(errp, err); 238 } 239 240 static void s390x_cpu_get_id(Object *obj, Visitor *v, const char *name, 241 void *opaque, Error **errp) 242 { 243 S390CPU *cpu = S390_CPU(obj); 244 int64_t value = cpu->id; 245 246 visit_type_int(v, name, &value, errp); 247 } 248 249 static void s390x_cpu_set_id(Object *obj, Visitor *v, const char *name, 250 void *opaque, Error **errp) 251 { 252 S390CPU *cpu = S390_CPU(obj); 253 DeviceState *dev = DEVICE(obj); 254 const int64_t min = 0; 255 const int64_t max = UINT32_MAX; 256 Error *err = NULL; 257 int64_t value; 258 259 if (dev->realized) { 260 error_setg(errp, "Attempt to set property '%s' on '%s' after " 261 "it was realized", name, object_get_typename(obj)); 262 return; 263 } 264 265 visit_type_int(v, name, &value, &err); 266 if (err) { 267 error_propagate(errp, err); 268 return; 269 } 270 if (value < min || value > max) { 271 error_setg(errp, "Property %s.%s doesn't take value %" PRId64 272 " (minimum: %" PRId64 ", maximum: %" PRId64 ")" , 273 object_get_typename(obj), name, value, min, max); 274 return; 275 } 276 cpu->id = value; 277 } 278 279 static void s390_cpu_initfn(Object *obj) 280 { 281 CPUState *cs = CPU(obj); 282 S390CPU *cpu = S390_CPU(obj); 283 CPUS390XState *env = &cpu->env; 284 static bool inited; 285 #if !defined(CONFIG_USER_ONLY) 286 struct tm tm; 287 #endif 288 289 cs->env_ptr = env; 290 cs->halted = 1; 291 cs->exception_index = EXCP_HLT; 292 object_property_add(OBJECT(cpu), "id", "int64_t", s390x_cpu_get_id, 293 s390x_cpu_set_id, NULL, NULL, NULL); 294 s390_cpu_model_register_props(obj); 295 #if !defined(CONFIG_USER_ONLY) 296 qemu_get_timedate(&tm, 0); 297 env->tod_offset = TOD_UNIX_EPOCH + 298 (time2tod(mktimegm(&tm)) * 1000000000ULL); 299 env->tod_basetime = 0; 300 env->tod_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu); 301 env->cpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu); 302 s390_cpu_set_state(CPU_STATE_STOPPED, cpu); 303 #endif 304 305 if (tcg_enabled() && !inited) { 306 inited = true; 307 s390x_translate_init(); 308 } 309 310 #if defined(CONFIG_USER_ONLY) 311 { 312 S390CPUClass *scc = S390_CPU_GET_CLASS(obj); 313 cpu->id = scc->next_cpu_id; 314 } 315 #endif 316 } 317 318 static void s390_cpu_finalize(Object *obj) 319 { 320 #if !defined(CONFIG_USER_ONLY) 321 S390CPU *cpu = S390_CPU(obj); 322 323 qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu); 324 g_free(cpu->irqstate); 325 #endif 326 } 327 328 #if !defined(CONFIG_USER_ONLY) 329 static bool disabled_wait(CPUState *cpu) 330 { 331 return cpu->halted && !(S390_CPU(cpu)->env.psw.mask & 332 (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK)); 333 } 334 335 static unsigned s390_count_running_cpus(void) 336 { 337 CPUState *cpu; 338 int nr_running = 0; 339 340 CPU_FOREACH(cpu) { 341 uint8_t state = S390_CPU(cpu)->env.cpu_state; 342 if (state == CPU_STATE_OPERATING || 343 state == CPU_STATE_LOAD) { 344 if (!disabled_wait(cpu)) { 345 nr_running++; 346 } 347 } 348 } 349 350 return nr_running; 351 } 352 353 unsigned int s390_cpu_halt(S390CPU *cpu) 354 { 355 CPUState *cs = CPU(cpu); 356 trace_cpu_halt(cs->cpu_index); 357 358 if (!cs->halted) { 359 cs->halted = 1; 360 cs->exception_index = EXCP_HLT; 361 } 362 363 return s390_count_running_cpus(); 364 } 365 366 void s390_cpu_unhalt(S390CPU *cpu) 367 { 368 CPUState *cs = CPU(cpu); 369 trace_cpu_unhalt(cs->cpu_index); 370 371 if (cs->halted) { 372 cs->halted = 0; 373 cs->exception_index = -1; 374 } 375 } 376 377 unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu) 378 { 379 trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state); 380 381 switch (cpu_state) { 382 case CPU_STATE_STOPPED: 383 case CPU_STATE_CHECK_STOP: 384 /* halt the cpu for common infrastructure */ 385 s390_cpu_halt(cpu); 386 break; 387 case CPU_STATE_OPERATING: 388 case CPU_STATE_LOAD: 389 /* unhalt the cpu for common infrastructure */ 390 s390_cpu_unhalt(cpu); 391 break; 392 default: 393 error_report("Requested CPU state is not a valid S390 CPU state: %u", 394 cpu_state); 395 exit(1); 396 } 397 if (kvm_enabled() && cpu->env.cpu_state != cpu_state) { 398 kvm_s390_set_cpu_state(cpu, cpu_state); 399 } 400 cpu->env.cpu_state = cpu_state; 401 402 return s390_count_running_cpus(); 403 } 404 405 int s390_get_clock(uint8_t *tod_high, uint64_t *tod_low) 406 { 407 if (kvm_enabled()) { 408 return kvm_s390_get_clock(tod_high, tod_low); 409 } 410 /* Fixme TCG */ 411 *tod_high = 0; 412 *tod_low = 0; 413 return 0; 414 } 415 416 int s390_set_clock(uint8_t *tod_high, uint64_t *tod_low) 417 { 418 if (kvm_enabled()) { 419 return kvm_s390_set_clock(tod_high, tod_low); 420 } 421 /* Fixme TCG */ 422 return 0; 423 } 424 425 int s390_set_memory_limit(uint64_t new_limit, uint64_t *hw_limit) 426 { 427 if (kvm_enabled()) { 428 return kvm_s390_set_mem_limit(new_limit, hw_limit); 429 } 430 return 0; 431 } 432 433 void s390_cmma_reset(void) 434 { 435 if (kvm_enabled()) { 436 kvm_s390_cmma_reset(); 437 } 438 } 439 440 int s390_cpu_restart(S390CPU *cpu) 441 { 442 if (kvm_enabled()) { 443 return kvm_s390_cpu_restart(cpu); 444 } 445 return -ENOSYS; 446 } 447 448 int s390_get_memslot_count(void) 449 { 450 if (kvm_enabled()) { 451 return kvm_s390_get_memslot_count(); 452 } else { 453 return MAX_AVAIL_SLOTS; 454 } 455 } 456 457 int s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch_id, 458 int vq, bool assign) 459 { 460 if (kvm_enabled()) { 461 return kvm_s390_assign_subch_ioeventfd(notifier, sch_id, vq, assign); 462 } else { 463 return 0; 464 } 465 } 466 467 void s390_crypto_reset(void) 468 { 469 if (kvm_enabled()) { 470 kvm_s390_crypto_reset(); 471 } 472 } 473 474 bool s390_get_squash_mcss(void) 475 { 476 if (object_property_get_bool(OBJECT(qdev_get_machine()), "s390-squash-mcss", 477 NULL)) { 478 return true; 479 } 480 481 return false; 482 } 483 484 void s390_enable_css_support(S390CPU *cpu) 485 { 486 if (kvm_enabled()) { 487 kvm_s390_enable_css_support(cpu); 488 } 489 } 490 #endif 491 492 static gchar *s390_gdb_arch_name(CPUState *cs) 493 { 494 return g_strdup("s390:64-bit"); 495 } 496 497 static void s390_cpu_class_init(ObjectClass *oc, void *data) 498 { 499 S390CPUClass *scc = S390_CPU_CLASS(oc); 500 CPUClass *cc = CPU_CLASS(scc); 501 DeviceClass *dc = DEVICE_CLASS(oc); 502 503 scc->next_cpu_id = 0; 504 scc->parent_realize = dc->realize; 505 dc->realize = s390_cpu_realizefn; 506 507 scc->parent_reset = cc->reset; 508 #if !defined(CONFIG_USER_ONLY) 509 scc->load_normal = s390_cpu_load_normal; 510 #endif 511 scc->cpu_reset = s390_cpu_reset; 512 scc->initial_cpu_reset = s390_cpu_initial_reset; 513 cc->reset = s390_cpu_full_reset; 514 cc->class_by_name = s390_cpu_class_by_name, 515 cc->has_work = s390_cpu_has_work; 516 #ifdef CONFIG_TCG 517 cc->do_interrupt = s390_cpu_do_interrupt; 518 #endif 519 cc->dump_state = s390_cpu_dump_state; 520 cc->set_pc = s390_cpu_set_pc; 521 cc->gdb_read_register = s390_cpu_gdb_read_register; 522 cc->gdb_write_register = s390_cpu_gdb_write_register; 523 #ifdef CONFIG_USER_ONLY 524 cc->handle_mmu_fault = s390_cpu_handle_mmu_fault; 525 #else 526 cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; 527 cc->vmsd = &vmstate_s390_cpu; 528 cc->write_elf64_note = s390_cpu_write_elf64_note; 529 #ifdef CONFIG_TCG 530 cc->cpu_exec_interrupt = s390_cpu_exec_interrupt; 531 cc->debug_excp_handler = s390x_cpu_debug_excp_handler; 532 cc->do_unaligned_access = s390x_cpu_do_unaligned_access; 533 #endif 534 #endif 535 cc->disas_set_info = s390_cpu_disas_set_info; 536 537 cc->gdb_num_core_regs = S390_NUM_CORE_REGS; 538 cc->gdb_core_xml_file = "s390x-core64.xml"; 539 cc->gdb_arch_name = s390_gdb_arch_name; 540 541 s390_cpu_model_class_register_props(oc); 542 } 543 544 static const TypeInfo s390_cpu_type_info = { 545 .name = TYPE_S390_CPU, 546 .parent = TYPE_CPU, 547 .instance_size = sizeof(S390CPU), 548 .instance_init = s390_cpu_initfn, 549 .instance_finalize = s390_cpu_finalize, 550 .abstract = true, 551 .class_size = sizeof(S390CPUClass), 552 .class_init = s390_cpu_class_init, 553 }; 554 555 static void s390_cpu_register_types(void) 556 { 557 type_register_static(&s390_cpu_type_info); 558 } 559 560 type_init(s390_cpu_register_types) 561