1 /* 2 * QEMU S/390 CPU 3 * 4 * Copyright (c) 2009 Ulrich Hecht 5 * Copyright (c) 2011 Alexander Graf 6 * Copyright (c) 2012 SUSE LINUX Products GmbH 7 * Copyright (c) 2012 IBM Corp. 8 * 9 * This library is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU Lesser General Public 11 * License as published by the Free Software Foundation; either 12 * version 2.1 of the License, or (at your option) any later version. 13 * 14 * This library is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * Lesser General Public License for more details. 18 * 19 * You should have received a copy of the GNU Lesser General Public 20 * License along with this library; if not, see 21 * <http://www.gnu.org/licenses/lgpl-2.1.html> 22 * Contributions after 2012-12-11 are licensed under the terms of the 23 * GNU GPL, version 2 or (at your option) any later version. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "qapi/error.h" 28 #include "cpu.h" 29 #include "internal.h" 30 #include "kvm_s390x.h" 31 #include "sysemu/kvm.h" 32 #include "qemu-common.h" 33 #include "qemu/cutils.h" 34 #include "qemu/timer.h" 35 #include "qemu/error-report.h" 36 #include "trace.h" 37 #include "qapi/visitor.h" 38 #include "exec/exec-all.h" 39 #include "hw/qdev-properties.h" 40 #ifndef CONFIG_USER_ONLY 41 #include "hw/hw.h" 42 #include "sysemu/arch_init.h" 43 #include "sysemu/sysemu.h" 44 #endif 45 46 #define CR0_RESET 0xE0UL 47 #define CR14_RESET 0xC2000000UL; 48 49 static void s390_cpu_set_pc(CPUState *cs, vaddr value) 50 { 51 S390CPU *cpu = S390_CPU(cs); 52 53 cpu->env.psw.addr = value; 54 } 55 56 static bool s390_cpu_has_work(CPUState *cs) 57 { 58 S390CPU *cpu = S390_CPU(cs); 59 60 /* STOPPED cpus can never wake up */ 61 if (s390_cpu_get_state(cpu) != CPU_STATE_LOAD && 62 s390_cpu_get_state(cpu) != CPU_STATE_OPERATING) { 63 return false; 64 } 65 66 if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { 67 return false; 68 } 69 70 return s390_cpu_has_int(cpu); 71 } 72 73 #if !defined(CONFIG_USER_ONLY) 74 /* S390CPUClass::load_normal() */ 75 static void s390_cpu_load_normal(CPUState *s) 76 { 77 S390CPU *cpu = S390_CPU(s); 78 cpu->env.psw.addr = ldl_phys(s->as, 4) & PSW_MASK_ESA_ADDR; 79 cpu->env.psw.mask = PSW_MASK_32 | PSW_MASK_64; 80 s390_cpu_set_state(CPU_STATE_OPERATING, cpu); 81 } 82 #endif 83 84 /* S390CPUClass::cpu_reset() */ 85 static void s390_cpu_reset(CPUState *s) 86 { 87 S390CPU *cpu = S390_CPU(s); 88 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); 89 CPUS390XState *env = &cpu->env; 90 91 env->pfault_token = -1UL; 92 env->bpbc = false; 93 scc->parent_reset(s); 94 cpu->env.sigp_order = 0; 95 s390_cpu_set_state(CPU_STATE_STOPPED, cpu); 96 } 97 98 /* S390CPUClass::initial_reset() */ 99 static void s390_cpu_initial_reset(CPUState *s) 100 { 101 S390CPU *cpu = S390_CPU(s); 102 CPUS390XState *env = &cpu->env; 103 104 s390_cpu_reset(s); 105 /* initial reset does not clear everything! */ 106 memset(&env->start_initial_reset_fields, 0, 107 offsetof(CPUS390XState, end_reset_fields) - 108 offsetof(CPUS390XState, start_initial_reset_fields)); 109 110 /* architectured initial values for CR 0 and 14 */ 111 env->cregs[0] = CR0_RESET; 112 env->cregs[14] = CR14_RESET; 113 114 /* architectured initial value for Breaking-Event-Address register */ 115 env->gbea = 1; 116 117 env->pfault_token = -1UL; 118 119 /* tininess for underflow is detected before rounding */ 120 set_float_detect_tininess(float_tininess_before_rounding, 121 &env->fpu_status); 122 123 /* Reset state inside the kernel that we cannot access yet from QEMU. */ 124 if (kvm_enabled()) { 125 kvm_s390_reset_vcpu(cpu); 126 } 127 } 128 129 /* CPUClass:reset() */ 130 static void s390_cpu_full_reset(CPUState *s) 131 { 132 S390CPU *cpu = S390_CPU(s); 133 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); 134 CPUS390XState *env = &cpu->env; 135 136 scc->parent_reset(s); 137 cpu->env.sigp_order = 0; 138 s390_cpu_set_state(CPU_STATE_STOPPED, cpu); 139 140 memset(env, 0, offsetof(CPUS390XState, end_reset_fields)); 141 142 /* architectured initial values for CR 0 and 14 */ 143 env->cregs[0] = CR0_RESET; 144 env->cregs[14] = CR14_RESET; 145 146 /* architectured initial value for Breaking-Event-Address register */ 147 env->gbea = 1; 148 149 env->pfault_token = -1UL; 150 151 /* tininess for underflow is detected before rounding */ 152 set_float_detect_tininess(float_tininess_before_rounding, 153 &env->fpu_status); 154 155 /* Reset state inside the kernel that we cannot access yet from QEMU. */ 156 if (kvm_enabled()) { 157 kvm_s390_reset_vcpu(cpu); 158 } 159 } 160 161 #if !defined(CONFIG_USER_ONLY) 162 static void s390_cpu_machine_reset_cb(void *opaque) 163 { 164 S390CPU *cpu = opaque; 165 166 run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, RUN_ON_CPU_NULL); 167 } 168 #endif 169 170 static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) 171 { 172 info->mach = bfd_mach_s390_64; 173 info->print_insn = print_insn_s390; 174 } 175 176 static void s390_cpu_realizefn(DeviceState *dev, Error **errp) 177 { 178 CPUState *cs = CPU(dev); 179 S390CPUClass *scc = S390_CPU_GET_CLASS(dev); 180 #if !defined(CONFIG_USER_ONLY) 181 S390CPU *cpu = S390_CPU(dev); 182 #endif 183 Error *err = NULL; 184 185 /* the model has to be realized before qemu_init_vcpu() due to kvm */ 186 s390_realize_cpu_model(cs, &err); 187 if (err) { 188 goto out; 189 } 190 191 #if !defined(CONFIG_USER_ONLY) 192 if (cpu->env.core_id >= max_cpus) { 193 error_setg(&err, "Unable to add CPU with core-id: %" PRIu32 194 ", maximum core-id: %d", cpu->env.core_id, 195 max_cpus - 1); 196 goto out; 197 } 198 199 if (cpu_exists(cpu->env.core_id)) { 200 error_setg(&err, "Unable to add CPU with core-id: %" PRIu32 201 ", it already exists", cpu->env.core_id); 202 goto out; 203 } 204 205 /* sync cs->cpu_index and env->core_id. The latter is needed for TCG. */ 206 cs->cpu_index = cpu->env.core_id; 207 #endif 208 209 cpu_exec_realizefn(cs, &err); 210 if (err != NULL) { 211 goto out; 212 } 213 214 #if !defined(CONFIG_USER_ONLY) 215 qemu_register_reset(s390_cpu_machine_reset_cb, cpu); 216 #endif 217 s390_cpu_gdb_init(cs); 218 qemu_init_vcpu(cs); 219 #if !defined(CONFIG_USER_ONLY) 220 run_on_cpu(cs, s390_do_cpu_full_reset, RUN_ON_CPU_NULL); 221 #else 222 cpu_reset(cs); 223 #endif 224 225 scc->parent_realize(dev, &err); 226 out: 227 error_propagate(errp, err); 228 } 229 230 static void s390_cpu_initfn(Object *obj) 231 { 232 CPUState *cs = CPU(obj); 233 S390CPU *cpu = S390_CPU(obj); 234 CPUS390XState *env = &cpu->env; 235 #if !defined(CONFIG_USER_ONLY) 236 struct tm tm; 237 #endif 238 239 cs->env_ptr = env; 240 cs->halted = 1; 241 cs->exception_index = EXCP_HLT; 242 s390_cpu_model_register_props(obj); 243 #if !defined(CONFIG_USER_ONLY) 244 qemu_get_timedate(&tm, 0); 245 env->tod_offset = TOD_UNIX_EPOCH + 246 (time2tod(mktimegm(&tm)) * 1000000000ULL); 247 env->tod_basetime = 0; 248 env->tod_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu); 249 env->cpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu); 250 s390_cpu_set_state(CPU_STATE_STOPPED, cpu); 251 #endif 252 } 253 254 static void s390_cpu_finalize(Object *obj) 255 { 256 #if !defined(CONFIG_USER_ONLY) 257 S390CPU *cpu = S390_CPU(obj); 258 259 qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu); 260 g_free(cpu->irqstate); 261 #endif 262 } 263 264 #if !defined(CONFIG_USER_ONLY) 265 static bool disabled_wait(CPUState *cpu) 266 { 267 return cpu->halted && !(S390_CPU(cpu)->env.psw.mask & 268 (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK)); 269 } 270 271 static unsigned s390_count_running_cpus(void) 272 { 273 CPUState *cpu; 274 int nr_running = 0; 275 276 CPU_FOREACH(cpu) { 277 uint8_t state = S390_CPU(cpu)->env.cpu_state; 278 if (state == CPU_STATE_OPERATING || 279 state == CPU_STATE_LOAD) { 280 if (!disabled_wait(cpu)) { 281 nr_running++; 282 } 283 } 284 } 285 286 return nr_running; 287 } 288 289 unsigned int s390_cpu_halt(S390CPU *cpu) 290 { 291 CPUState *cs = CPU(cpu); 292 trace_cpu_halt(cs->cpu_index); 293 294 if (!cs->halted) { 295 cs->halted = 1; 296 cs->exception_index = EXCP_HLT; 297 } 298 299 return s390_count_running_cpus(); 300 } 301 302 void s390_cpu_unhalt(S390CPU *cpu) 303 { 304 CPUState *cs = CPU(cpu); 305 trace_cpu_unhalt(cs->cpu_index); 306 307 if (cs->halted) { 308 cs->halted = 0; 309 cs->exception_index = -1; 310 } 311 } 312 313 unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu) 314 { 315 trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state); 316 317 switch (cpu_state) { 318 case CPU_STATE_STOPPED: 319 case CPU_STATE_CHECK_STOP: 320 /* halt the cpu for common infrastructure */ 321 s390_cpu_halt(cpu); 322 break; 323 case CPU_STATE_OPERATING: 324 case CPU_STATE_LOAD: 325 /* 326 * Starting a CPU with a PSW WAIT bit set: 327 * KVM: handles this internally and triggers another WAIT exit. 328 * TCG: will actually try to continue to run. Don't unhalt, will 329 * be done when the CPU actually has work (an interrupt). 330 */ 331 if (!tcg_enabled() || !(cpu->env.psw.mask & PSW_MASK_WAIT)) { 332 s390_cpu_unhalt(cpu); 333 } 334 break; 335 default: 336 error_report("Requested CPU state is not a valid S390 CPU state: %u", 337 cpu_state); 338 exit(1); 339 } 340 if (kvm_enabled() && cpu->env.cpu_state != cpu_state) { 341 kvm_s390_set_cpu_state(cpu, cpu_state); 342 } 343 cpu->env.cpu_state = cpu_state; 344 345 return s390_count_running_cpus(); 346 } 347 348 int s390_get_clock(uint8_t *tod_high, uint64_t *tod_low) 349 { 350 int r = 0; 351 352 if (kvm_enabled()) { 353 r = kvm_s390_get_clock_ext(tod_high, tod_low); 354 if (r == -ENXIO) { 355 return kvm_s390_get_clock(tod_high, tod_low); 356 } 357 } else { 358 /* Fixme TCG */ 359 *tod_high = 0; 360 *tod_low = 0; 361 } 362 363 return r; 364 } 365 366 int s390_set_clock(uint8_t *tod_high, uint64_t *tod_low) 367 { 368 int r = 0; 369 370 if (kvm_enabled()) { 371 r = kvm_s390_set_clock_ext(tod_high, tod_low); 372 if (r == -ENXIO) { 373 return kvm_s390_set_clock(tod_high, tod_low); 374 } 375 } 376 /* Fixme TCG */ 377 return r; 378 } 379 380 int s390_set_memory_limit(uint64_t new_limit, uint64_t *hw_limit) 381 { 382 if (kvm_enabled()) { 383 return kvm_s390_set_mem_limit(new_limit, hw_limit); 384 } 385 return 0; 386 } 387 388 void s390_cmma_reset(void) 389 { 390 if (kvm_enabled()) { 391 kvm_s390_cmma_reset(); 392 } 393 } 394 395 int s390_get_memslot_count(void) 396 { 397 if (kvm_enabled()) { 398 return kvm_s390_get_memslot_count(); 399 } else { 400 return MAX_AVAIL_SLOTS; 401 } 402 } 403 404 int s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch_id, 405 int vq, bool assign) 406 { 407 if (kvm_enabled()) { 408 return kvm_s390_assign_subch_ioeventfd(notifier, sch_id, vq, assign); 409 } else { 410 return 0; 411 } 412 } 413 414 void s390_crypto_reset(void) 415 { 416 if (kvm_enabled()) { 417 kvm_s390_crypto_reset(); 418 } 419 } 420 421 bool s390_get_squash_mcss(void) 422 { 423 if (object_property_get_bool(OBJECT(qdev_get_machine()), "s390-squash-mcss", 424 NULL)) { 425 return true; 426 } 427 428 return false; 429 } 430 431 void s390_enable_css_support(S390CPU *cpu) 432 { 433 if (kvm_enabled()) { 434 kvm_s390_enable_css_support(cpu); 435 } 436 } 437 #endif 438 439 static gchar *s390_gdb_arch_name(CPUState *cs) 440 { 441 return g_strdup("s390:64-bit"); 442 } 443 444 static Property s390x_cpu_properties[] = { 445 #if !defined(CONFIG_USER_ONLY) 446 DEFINE_PROP_UINT32("core-id", S390CPU, env.core_id, 0), 447 #endif 448 DEFINE_PROP_END_OF_LIST() 449 }; 450 451 static void s390_cpu_class_init(ObjectClass *oc, void *data) 452 { 453 S390CPUClass *scc = S390_CPU_CLASS(oc); 454 CPUClass *cc = CPU_CLASS(scc); 455 DeviceClass *dc = DEVICE_CLASS(oc); 456 457 device_class_set_parent_realize(dc, s390_cpu_realizefn, 458 &scc->parent_realize); 459 dc->props = s390x_cpu_properties; 460 dc->user_creatable = true; 461 462 scc->parent_reset = cc->reset; 463 #if !defined(CONFIG_USER_ONLY) 464 scc->load_normal = s390_cpu_load_normal; 465 #endif 466 scc->cpu_reset = s390_cpu_reset; 467 scc->initial_cpu_reset = s390_cpu_initial_reset; 468 cc->reset = s390_cpu_full_reset; 469 cc->class_by_name = s390_cpu_class_by_name, 470 cc->has_work = s390_cpu_has_work; 471 #ifdef CONFIG_TCG 472 cc->do_interrupt = s390_cpu_do_interrupt; 473 #endif 474 cc->dump_state = s390_cpu_dump_state; 475 cc->set_pc = s390_cpu_set_pc; 476 cc->gdb_read_register = s390_cpu_gdb_read_register; 477 cc->gdb_write_register = s390_cpu_gdb_write_register; 478 #ifdef CONFIG_USER_ONLY 479 cc->handle_mmu_fault = s390_cpu_handle_mmu_fault; 480 #else 481 cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; 482 cc->vmsd = &vmstate_s390_cpu; 483 cc->write_elf64_note = s390_cpu_write_elf64_note; 484 #ifdef CONFIG_TCG 485 cc->cpu_exec_interrupt = s390_cpu_exec_interrupt; 486 cc->debug_excp_handler = s390x_cpu_debug_excp_handler; 487 cc->do_unaligned_access = s390x_cpu_do_unaligned_access; 488 #endif 489 #endif 490 cc->disas_set_info = s390_cpu_disas_set_info; 491 #ifdef CONFIG_TCG 492 cc->tcg_initialize = s390x_translate_init; 493 #endif 494 495 cc->gdb_num_core_regs = S390_NUM_CORE_REGS; 496 cc->gdb_core_xml_file = "s390x-core64.xml"; 497 cc->gdb_arch_name = s390_gdb_arch_name; 498 499 s390_cpu_model_class_register_props(oc); 500 } 501 502 static const TypeInfo s390_cpu_type_info = { 503 .name = TYPE_S390_CPU, 504 .parent = TYPE_CPU, 505 .instance_size = sizeof(S390CPU), 506 .instance_init = s390_cpu_initfn, 507 .instance_finalize = s390_cpu_finalize, 508 .abstract = true, 509 .class_size = sizeof(S390CPUClass), 510 .class_init = s390_cpu_class_init, 511 }; 512 513 static void s390_cpu_register_types(void) 514 { 515 type_register_static(&s390_cpu_type_info); 516 } 517 518 type_init(s390_cpu_register_types) 519