xref: /openbmc/qemu/target/riscv/vector_helper.c (revision 2b7168fc)
1 /*
2  * RISC-V Vector Extension Helpers for QEMU.
3  *
4  * Copyright (c) 2020 T-Head Semiconductor Co., Ltd. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2 or later, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along with
16  * this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18 
19 #include "qemu/osdep.h"
20 #include "cpu.h"
21 #include "exec/exec-all.h"
22 #include "exec/helper-proto.h"
23 #include <math.h>
24 
25 target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1,
26                             target_ulong s2)
27 {
28     int vlmax, vl;
29     RISCVCPU *cpu = env_archcpu(env);
30     uint16_t sew = 8 << FIELD_EX64(s2, VTYPE, VSEW);
31     uint8_t ediv = FIELD_EX64(s2, VTYPE, VEDIV);
32     bool vill = FIELD_EX64(s2, VTYPE, VILL);
33     target_ulong reserved = FIELD_EX64(s2, VTYPE, RESERVED);
34 
35     if ((sew > cpu->cfg.elen) || vill || (ediv != 0) || (reserved != 0)) {
36         /* only set vill bit. */
37         env->vtype = FIELD_DP64(0, VTYPE, VILL, 1);
38         env->vl = 0;
39         env->vstart = 0;
40         return 0;
41     }
42 
43     vlmax = vext_get_vlmax(cpu, s2);
44     if (s1 <= vlmax) {
45         vl = s1;
46     } else {
47         vl = vlmax;
48     }
49     env->vl = vl;
50     env->vtype = s2;
51     env->vstart = 0;
52     return vl;
53 }
54