1/*
2 * RISC-V translation routines for the RV64Zfh Standard Extension.
3 *
4 * Copyright (c) 2020 Chih-Min Chao, chihmin.chao@sifive.com
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or later, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program.  If not, see <http://www.gnu.org/licenses/>.
17 */
18
19#define REQUIRE_ZFH(ctx) do { \
20    if (!ctx->ext_zfh) {      \
21        return false;         \
22    }                         \
23} while (0)
24
25static bool trans_flh(DisasContext *ctx, arg_flh *a)
26{
27    TCGv_i64 dest;
28    TCGv t0;
29
30    REQUIRE_FPU;
31    REQUIRE_ZFH(ctx);
32
33    t0 = get_gpr(ctx, a->rs1, EXT_NONE);
34    if (a->imm) {
35        TCGv temp = temp_new(ctx);
36        tcg_gen_addi_tl(temp, t0, a->imm);
37        t0 = temp;
38    }
39
40    dest = cpu_fpr[a->rd];
41    tcg_gen_qemu_ld_i64(dest, t0, ctx->mem_idx, MO_TEUW);
42    gen_nanbox_h(dest, dest);
43
44    mark_fs_dirty(ctx);
45    return true;
46}
47
48static bool trans_fsh(DisasContext *ctx, arg_fsh *a)
49{
50    TCGv t0;
51
52    REQUIRE_FPU;
53    REQUIRE_ZFH(ctx);
54
55    t0 = get_gpr(ctx, a->rs1, EXT_NONE);
56    if (a->imm) {
57        TCGv temp = tcg_temp_new();
58        tcg_gen_addi_tl(temp, t0, a->imm);
59        t0 = temp;
60    }
61
62    tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], t0, ctx->mem_idx, MO_TEUW);
63
64    return true;
65}
66
67static bool trans_fmadd_h(DisasContext *ctx, arg_fmadd_h *a)
68{
69    REQUIRE_FPU;
70    REQUIRE_ZFH(ctx);
71
72    gen_set_rm(ctx, a->rm);
73    gen_helper_fmadd_h(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1],
74                       cpu_fpr[a->rs2], cpu_fpr[a->rs3]);
75    mark_fs_dirty(ctx);
76    return true;
77}
78
79static bool trans_fmsub_h(DisasContext *ctx, arg_fmsub_h *a)
80{
81    REQUIRE_FPU;
82    REQUIRE_ZFH(ctx);
83
84    gen_set_rm(ctx, a->rm);
85    gen_helper_fmsub_h(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1],
86                       cpu_fpr[a->rs2], cpu_fpr[a->rs3]);
87    mark_fs_dirty(ctx);
88    return true;
89}
90
91static bool trans_fnmsub_h(DisasContext *ctx, arg_fnmsub_h *a)
92{
93    REQUIRE_FPU;
94    REQUIRE_ZFH(ctx);
95
96    gen_set_rm(ctx, a->rm);
97    gen_helper_fnmsub_h(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1],
98                        cpu_fpr[a->rs2], cpu_fpr[a->rs3]);
99    mark_fs_dirty(ctx);
100    return true;
101}
102
103static bool trans_fnmadd_h(DisasContext *ctx, arg_fnmadd_h *a)
104{
105    REQUIRE_FPU;
106    REQUIRE_ZFH(ctx);
107
108    gen_set_rm(ctx, a->rm);
109    gen_helper_fnmadd_h(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1],
110                        cpu_fpr[a->rs2], cpu_fpr[a->rs3]);
111    mark_fs_dirty(ctx);
112    return true;
113}
114
115static bool trans_fadd_h(DisasContext *ctx, arg_fadd_h *a)
116{
117    REQUIRE_FPU;
118    REQUIRE_ZFH(ctx);
119
120    gen_set_rm(ctx, a->rm);
121    gen_helper_fadd_h(cpu_fpr[a->rd], cpu_env,
122                      cpu_fpr[a->rs1], cpu_fpr[a->rs2]);
123    mark_fs_dirty(ctx);
124    return true;
125}
126
127static bool trans_fsub_h(DisasContext *ctx, arg_fsub_h *a)
128{
129    REQUIRE_FPU;
130    REQUIRE_ZFH(ctx);
131
132    gen_set_rm(ctx, a->rm);
133    gen_helper_fsub_h(cpu_fpr[a->rd], cpu_env,
134                      cpu_fpr[a->rs1], cpu_fpr[a->rs2]);
135    mark_fs_dirty(ctx);
136    return true;
137}
138
139static bool trans_fmul_h(DisasContext *ctx, arg_fmul_h *a)
140{
141    REQUIRE_FPU;
142    REQUIRE_ZFH(ctx);
143
144    gen_set_rm(ctx, a->rm);
145    gen_helper_fmul_h(cpu_fpr[a->rd], cpu_env,
146                      cpu_fpr[a->rs1], cpu_fpr[a->rs2]);
147    mark_fs_dirty(ctx);
148    return true;
149}
150
151static bool trans_fdiv_h(DisasContext *ctx, arg_fdiv_h *a)
152{
153    REQUIRE_FPU;
154    REQUIRE_ZFH(ctx);
155
156    gen_set_rm(ctx, a->rm);
157    gen_helper_fdiv_h(cpu_fpr[a->rd], cpu_env,
158                      cpu_fpr[a->rs1], cpu_fpr[a->rs2]);
159    mark_fs_dirty(ctx);
160    return true;
161}
162
163static bool trans_fsqrt_h(DisasContext *ctx, arg_fsqrt_h *a)
164{
165    REQUIRE_FPU;
166    REQUIRE_ZFH(ctx);
167
168    gen_set_rm(ctx, a->rm);
169    gen_helper_fsqrt_h(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1]);
170    mark_fs_dirty(ctx);
171    return true;
172}
173
174static bool trans_fmin_h(DisasContext *ctx, arg_fmin_h *a)
175{
176    REQUIRE_FPU;
177    REQUIRE_ZFH(ctx);
178
179    gen_helper_fmin_h(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1],
180                      cpu_fpr[a->rs2]);
181    mark_fs_dirty(ctx);
182    return true;
183}
184
185static bool trans_fmax_h(DisasContext *ctx, arg_fmax_h *a)
186{
187    REQUIRE_FPU;
188    REQUIRE_ZFH(ctx);
189
190    gen_helper_fmax_h(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1],
191                      cpu_fpr[a->rs2]);
192    mark_fs_dirty(ctx);
193    return true;
194}
195