1/*
2 * RISC-V translation routines for the RVB Standard Extension.
3 *
4 * Copyright (c) 2020 Kito Cheng, kito.cheng@sifive.com
5 * Copyright (c) 2020 Frank Chang, frank.chang@sifive.com
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2 or later, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program.  If not, see <http://www.gnu.org/licenses/>.
18 */
19
20static bool trans_clz(DisasContext *ctx, arg_clz *a)
21{
22    REQUIRE_EXT(ctx, RVB);
23    return gen_unary(ctx, a, gen_clz);
24}
25
26static bool trans_ctz(DisasContext *ctx, arg_ctz *a)
27{
28    REQUIRE_EXT(ctx, RVB);
29    return gen_unary(ctx, a, gen_ctz);
30}
31
32static bool trans_cpop(DisasContext *ctx, arg_cpop *a)
33{
34    REQUIRE_EXT(ctx, RVB);
35    return gen_unary(ctx, a, tcg_gen_ctpop_tl);
36}
37
38static bool trans_andn(DisasContext *ctx, arg_andn *a)
39{
40    REQUIRE_EXT(ctx, RVB);
41    return gen_arith(ctx, a, tcg_gen_andc_tl);
42}
43
44static bool trans_orn(DisasContext *ctx, arg_orn *a)
45{
46    REQUIRE_EXT(ctx, RVB);
47    return gen_arith(ctx, a, tcg_gen_orc_tl);
48}
49
50static bool trans_xnor(DisasContext *ctx, arg_xnor *a)
51{
52    REQUIRE_EXT(ctx, RVB);
53    return gen_arith(ctx, a, tcg_gen_eqv_tl);
54}
55
56static bool trans_pack(DisasContext *ctx, arg_pack *a)
57{
58    REQUIRE_EXT(ctx, RVB);
59    return gen_arith(ctx, a, gen_pack);
60}
61
62static bool trans_packu(DisasContext *ctx, arg_packu *a)
63{
64    REQUIRE_EXT(ctx, RVB);
65    return gen_arith(ctx, a, gen_packu);
66}
67
68static bool trans_packh(DisasContext *ctx, arg_packh *a)
69{
70    REQUIRE_EXT(ctx, RVB);
71    return gen_arith(ctx, a, gen_packh);
72}
73
74static bool trans_min(DisasContext *ctx, arg_min *a)
75{
76    REQUIRE_EXT(ctx, RVB);
77    return gen_arith(ctx, a, tcg_gen_smin_tl);
78}
79
80static bool trans_max(DisasContext *ctx, arg_max *a)
81{
82    REQUIRE_EXT(ctx, RVB);
83    return gen_arith(ctx, a, tcg_gen_smax_tl);
84}
85
86static bool trans_minu(DisasContext *ctx, arg_minu *a)
87{
88    REQUIRE_EXT(ctx, RVB);
89    return gen_arith(ctx, a, tcg_gen_umin_tl);
90}
91
92static bool trans_maxu(DisasContext *ctx, arg_maxu *a)
93{
94    REQUIRE_EXT(ctx, RVB);
95    return gen_arith(ctx, a, tcg_gen_umax_tl);
96}
97
98static bool trans_sext_b(DisasContext *ctx, arg_sext_b *a)
99{
100    REQUIRE_EXT(ctx, RVB);
101    return gen_unary(ctx, a, tcg_gen_ext8s_tl);
102}
103
104static bool trans_sext_h(DisasContext *ctx, arg_sext_h *a)
105{
106    REQUIRE_EXT(ctx, RVB);
107    return gen_unary(ctx, a, tcg_gen_ext16s_tl);
108}
109
110static bool trans_bset(DisasContext *ctx, arg_bset *a)
111{
112    REQUIRE_EXT(ctx, RVB);
113    return gen_shift(ctx, a, gen_bset);
114}
115
116static bool trans_bseti(DisasContext *ctx, arg_bseti *a)
117{
118    REQUIRE_EXT(ctx, RVB);
119    return gen_shifti(ctx, a, gen_bset);
120}
121
122static bool trans_bclr(DisasContext *ctx, arg_bclr *a)
123{
124    REQUIRE_EXT(ctx, RVB);
125    return gen_shift(ctx, a, gen_bclr);
126}
127
128static bool trans_bclri(DisasContext *ctx, arg_bclri *a)
129{
130    REQUIRE_EXT(ctx, RVB);
131    return gen_shifti(ctx, a, gen_bclr);
132}
133
134static bool trans_binv(DisasContext *ctx, arg_binv *a)
135{
136    REQUIRE_EXT(ctx, RVB);
137    return gen_shift(ctx, a, gen_binv);
138}
139
140static bool trans_binvi(DisasContext *ctx, arg_binvi *a)
141{
142    REQUIRE_EXT(ctx, RVB);
143    return gen_shifti(ctx, a, gen_binv);
144}
145
146static bool trans_bext(DisasContext *ctx, arg_bext *a)
147{
148    REQUIRE_EXT(ctx, RVB);
149    return gen_shift(ctx, a, gen_bext);
150}
151
152static bool trans_bexti(DisasContext *ctx, arg_bexti *a)
153{
154    REQUIRE_EXT(ctx, RVB);
155    return gen_shifti(ctx, a, gen_bext);
156}
157
158static bool trans_slo(DisasContext *ctx, arg_slo *a)
159{
160    REQUIRE_EXT(ctx, RVB);
161    return gen_shift(ctx, a, gen_slo);
162}
163
164static bool trans_sloi(DisasContext *ctx, arg_sloi *a)
165{
166    REQUIRE_EXT(ctx, RVB);
167    return gen_shifti(ctx, a, gen_slo);
168}
169
170static bool trans_sro(DisasContext *ctx, arg_sro *a)
171{
172    REQUIRE_EXT(ctx, RVB);
173    return gen_shift(ctx, a, gen_sro);
174}
175
176static bool trans_sroi(DisasContext *ctx, arg_sroi *a)
177{
178    REQUIRE_EXT(ctx, RVB);
179    return gen_shifti(ctx, a, gen_sro);
180}
181
182static bool trans_ror(DisasContext *ctx, arg_ror *a)
183{
184    REQUIRE_EXT(ctx, RVB);
185    return gen_shift(ctx, a, tcg_gen_rotr_tl);
186}
187
188static bool trans_rori(DisasContext *ctx, arg_rori *a)
189{
190    REQUIRE_EXT(ctx, RVB);
191    return gen_shifti(ctx, a, tcg_gen_rotr_tl);
192}
193
194static bool trans_rol(DisasContext *ctx, arg_rol *a)
195{
196    REQUIRE_EXT(ctx, RVB);
197    return gen_shift(ctx, a, tcg_gen_rotl_tl);
198}
199
200static bool trans_grev(DisasContext *ctx, arg_grev *a)
201{
202    REQUIRE_EXT(ctx, RVB);
203    return gen_shift(ctx, a, gen_helper_grev);
204}
205
206static bool trans_grevi(DisasContext *ctx, arg_grevi *a)
207{
208    REQUIRE_EXT(ctx, RVB);
209
210    if (a->shamt >= TARGET_LONG_BITS) {
211        return false;
212    }
213
214    return gen_grevi(ctx, a);
215}
216
217static bool trans_gorc(DisasContext *ctx, arg_gorc *a)
218{
219    REQUIRE_EXT(ctx, RVB);
220    return gen_shift(ctx, a, gen_helper_gorc);
221}
222
223static bool trans_gorci(DisasContext *ctx, arg_gorci *a)
224{
225    REQUIRE_EXT(ctx, RVB);
226    return gen_shifti(ctx, a, gen_helper_gorc);
227}
228
229#define GEN_TRANS_SHADD(SHAMT)                                             \
230static bool trans_sh##SHAMT##add(DisasContext *ctx, arg_sh##SHAMT##add *a) \
231{                                                                          \
232    REQUIRE_EXT(ctx, RVB);                                                 \
233    return gen_arith(ctx, a, gen_sh##SHAMT##add);                          \
234}
235
236GEN_TRANS_SHADD(1)
237GEN_TRANS_SHADD(2)
238GEN_TRANS_SHADD(3)
239
240static bool trans_clzw(DisasContext *ctx, arg_clzw *a)
241{
242    REQUIRE_64BIT(ctx);
243    REQUIRE_EXT(ctx, RVB);
244    return gen_unary(ctx, a, gen_clzw);
245}
246
247static bool trans_ctzw(DisasContext *ctx, arg_ctzw *a)
248{
249    REQUIRE_64BIT(ctx);
250    REQUIRE_EXT(ctx, RVB);
251    return gen_unary(ctx, a, gen_ctzw);
252}
253
254static bool trans_cpopw(DisasContext *ctx, arg_cpopw *a)
255{
256    REQUIRE_64BIT(ctx);
257    REQUIRE_EXT(ctx, RVB);
258    return gen_unary(ctx, a, gen_cpopw);
259}
260
261static bool trans_packw(DisasContext *ctx, arg_packw *a)
262{
263    REQUIRE_64BIT(ctx);
264    REQUIRE_EXT(ctx, RVB);
265    return gen_arith(ctx, a, gen_packw);
266}
267
268static bool trans_packuw(DisasContext *ctx, arg_packuw *a)
269{
270    REQUIRE_64BIT(ctx);
271    REQUIRE_EXT(ctx, RVB);
272    return gen_arith(ctx, a, gen_packuw);
273}
274
275static bool trans_bsetw(DisasContext *ctx, arg_bsetw *a)
276{
277    REQUIRE_64BIT(ctx);
278    REQUIRE_EXT(ctx, RVB);
279    return gen_shiftw(ctx, a, gen_bset);
280}
281
282static bool trans_bsetiw(DisasContext *ctx, arg_bsetiw *a)
283{
284    REQUIRE_64BIT(ctx);
285    REQUIRE_EXT(ctx, RVB);
286    return gen_shiftiw(ctx, a, gen_bset);
287}
288
289static bool trans_bclrw(DisasContext *ctx, arg_bclrw *a)
290{
291    REQUIRE_64BIT(ctx);
292    REQUIRE_EXT(ctx, RVB);
293    return gen_shiftw(ctx, a, gen_bclr);
294}
295
296static bool trans_bclriw(DisasContext *ctx, arg_bclriw *a)
297{
298    REQUIRE_64BIT(ctx);
299    REQUIRE_EXT(ctx, RVB);
300    return gen_shiftiw(ctx, a, gen_bclr);
301}
302
303static bool trans_binvw(DisasContext *ctx, arg_binvw *a)
304{
305    REQUIRE_64BIT(ctx);
306    REQUIRE_EXT(ctx, RVB);
307    return gen_shiftw(ctx, a, gen_binv);
308}
309
310static bool trans_binviw(DisasContext *ctx, arg_binviw *a)
311{
312    REQUIRE_64BIT(ctx);
313    REQUIRE_EXT(ctx, RVB);
314    return gen_shiftiw(ctx, a, gen_binv);
315}
316
317static bool trans_bextw(DisasContext *ctx, arg_bextw *a)
318{
319    REQUIRE_64BIT(ctx);
320    REQUIRE_EXT(ctx, RVB);
321    return gen_shiftw(ctx, a, gen_bext);
322}
323
324static bool trans_slow(DisasContext *ctx, arg_slow *a)
325{
326    REQUIRE_64BIT(ctx);
327    REQUIRE_EXT(ctx, RVB);
328    return gen_shiftw(ctx, a, gen_slo);
329}
330
331static bool trans_sloiw(DisasContext *ctx, arg_sloiw *a)
332{
333    REQUIRE_64BIT(ctx);
334    REQUIRE_EXT(ctx, RVB);
335    return gen_shiftiw(ctx, a, gen_slo);
336}
337
338static bool trans_srow(DisasContext *ctx, arg_srow *a)
339{
340    REQUIRE_64BIT(ctx);
341    REQUIRE_EXT(ctx, RVB);
342    return gen_shiftw(ctx, a, gen_sro);
343}
344
345static bool trans_sroiw(DisasContext *ctx, arg_sroiw *a)
346{
347    REQUIRE_64BIT(ctx);
348    REQUIRE_EXT(ctx, RVB);
349    return gen_shiftiw(ctx, a, gen_sro);
350}
351
352static bool trans_rorw(DisasContext *ctx, arg_rorw *a)
353{
354    REQUIRE_64BIT(ctx);
355    REQUIRE_EXT(ctx, RVB);
356    return gen_shiftw(ctx, a, gen_rorw);
357}
358
359static bool trans_roriw(DisasContext *ctx, arg_roriw *a)
360{
361    REQUIRE_64BIT(ctx);
362    REQUIRE_EXT(ctx, RVB);
363    return gen_shiftiw(ctx, a, gen_rorw);
364}
365
366static bool trans_rolw(DisasContext *ctx, arg_rolw *a)
367{
368    REQUIRE_64BIT(ctx);
369    REQUIRE_EXT(ctx, RVB);
370    return gen_shiftw(ctx, a, gen_rolw);
371}
372
373static bool trans_grevw(DisasContext *ctx, arg_grevw *a)
374{
375    REQUIRE_64BIT(ctx);
376    REQUIRE_EXT(ctx, RVB);
377    return gen_shiftw(ctx, a, gen_grevw);
378}
379
380static bool trans_greviw(DisasContext *ctx, arg_greviw *a)
381{
382    REQUIRE_64BIT(ctx);
383    REQUIRE_EXT(ctx, RVB);
384    return gen_shiftiw(ctx, a, gen_grevw);
385}
386
387static bool trans_gorcw(DisasContext *ctx, arg_gorcw *a)
388{
389    REQUIRE_64BIT(ctx);
390    REQUIRE_EXT(ctx, RVB);
391    return gen_shiftw(ctx, a, gen_gorcw);
392}
393
394static bool trans_gorciw(DisasContext *ctx, arg_gorciw *a)
395{
396    REQUIRE_64BIT(ctx);
397    REQUIRE_EXT(ctx, RVB);
398    return gen_shiftiw(ctx, a, gen_gorcw);
399}
400
401#define GEN_TRANS_SHADD_UW(SHAMT)                             \
402static bool trans_sh##SHAMT##add_uw(DisasContext *ctx,        \
403                                    arg_sh##SHAMT##add_uw *a) \
404{                                                             \
405    REQUIRE_64BIT(ctx);                                       \
406    REQUIRE_EXT(ctx, RVB);                                    \
407    return gen_arith(ctx, a, gen_sh##SHAMT##add_uw);          \
408}
409
410GEN_TRANS_SHADD_UW(1)
411GEN_TRANS_SHADD_UW(2)
412GEN_TRANS_SHADD_UW(3)
413
414static bool trans_add_uw(DisasContext *ctx, arg_add_uw *a)
415{
416    REQUIRE_64BIT(ctx);
417    REQUIRE_EXT(ctx, RVB);
418    return gen_arith(ctx, a, gen_add_uw);
419}
420
421static bool trans_slli_uw(DisasContext *ctx, arg_slli_uw *a)
422{
423    REQUIRE_64BIT(ctx);
424    REQUIRE_EXT(ctx, RVB);
425
426    TCGv source1 = tcg_temp_new();
427    gen_get_gpr(source1, a->rs1);
428
429    if (a->shamt < 32) {
430        tcg_gen_deposit_z_tl(source1, source1, a->shamt, 32);
431    } else {
432        tcg_gen_shli_tl(source1, source1, a->shamt);
433    }
434
435    gen_set_gpr(a->rd, source1);
436    tcg_temp_free(source1);
437    return true;
438}
439