1# 2# RISC-V translation routines for the RVXI Base Integer Instruction Set. 3# 4# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de 5# Bastian Koppelmann, kbastian@mail.uni-paderborn.de 6# 7# This program is free software; you can redistribute it and/or modify it 8# under the terms and conditions of the GNU General Public License, 9# version 2 or later, as published by the Free Software Foundation. 10# 11# This program is distributed in the hope it will be useful, but WITHOUT 12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14# more details. 15# 16# You should have received a copy of the GNU General Public License along with 17# this program. If not, see <http://www.gnu.org/licenses/>. 18 19# Fields: 20%rs3 27:5 21%rs2 20:5 22%rs1 15:5 23%rd 7:5 24 25%sh10 20:10 26%csr 20:12 27%rm 12:3 28%nf 29:3 !function=ex_plus_1 29 30# immediates: 31%imm_i 20:s12 32%imm_s 25:s7 7:5 33%imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1 34%imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1 35%imm_u 12:s20 !function=ex_shift_12 36 37# Argument sets: 38&empty 39&b imm rs2 rs1 40&i imm rs1 rd 41&j imm rd 42&r rd rs1 rs2 43&s imm rs1 rs2 44&u imm rd 45&shift shamt rs1 rd 46&atomic aq rl rs2 rs1 rd 47&rmrr vm rd rs1 rs2 48&rmr vm rd rs2 49&rwdvm vm wd rd rs1 rs2 50&r2nfvm vm rd rs1 nf 51&rnfvm vm rd rs1 rs2 nf 52 53# Formats 32: 54@r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd 55@i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd 56@b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 57@s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1 58@u .................... ..... ....... &u imm=%imm_u %rd 59@j .................... ..... ....... &j imm=%imm_j %rd 60 61@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh10 %rs1 %rd 62@csr ............ ..... ... ..... ....... %csr %rs1 %rd 63 64@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd 65@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd 66 67@r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd 68@r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd 69@r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd 70@r2 ....... ..... ..... ... ..... ....... %rs1 %rd 71@r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd 72@r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd 73@r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd 74@r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd 75@r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd 76@r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd 77@r_wdvm ..... wd:1 vm:1 ..... ..... ... ..... ....... &rwdvm %rs2 %rs1 %rd 78@r2_zimm . zimm:11 ..... ... ..... ....... %rs1 %rd 79 80@hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1 81@hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1 82 83@sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1 84@sfence_vm ....... ..... ..... ... ..... ....... %rs1 85 86 87# *** Privileged Instructions *** 88ecall 000000000000 00000 000 00000 1110011 89ebreak 000000000001 00000 000 00000 1110011 90uret 0000000 00010 00000 000 00000 1110011 91sret 0001000 00010 00000 000 00000 1110011 92mret 0011000 00010 00000 000 00000 1110011 93wfi 0001000 00101 00000 000 00000 1110011 94sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma 95sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm 96 97# *** RV32I Base Instruction Set *** 98lui .................... ..... 0110111 @u 99auipc .................... ..... 0010111 @u 100jal .................... ..... 1101111 @j 101jalr ............ ..... 000 ..... 1100111 @i 102beq ....... ..... ..... 000 ..... 1100011 @b 103bne ....... ..... ..... 001 ..... 1100011 @b 104blt ....... ..... ..... 100 ..... 1100011 @b 105bge ....... ..... ..... 101 ..... 1100011 @b 106bltu ....... ..... ..... 110 ..... 1100011 @b 107bgeu ....... ..... ..... 111 ..... 1100011 @b 108lb ............ ..... 000 ..... 0000011 @i 109lh ............ ..... 001 ..... 0000011 @i 110lw ............ ..... 010 ..... 0000011 @i 111lbu ............ ..... 100 ..... 0000011 @i 112lhu ............ ..... 101 ..... 0000011 @i 113sb ....... ..... ..... 000 ..... 0100011 @s 114sh ....... ..... ..... 001 ..... 0100011 @s 115sw ....... ..... ..... 010 ..... 0100011 @s 116addi ............ ..... 000 ..... 0010011 @i 117slti ............ ..... 010 ..... 0010011 @i 118sltiu ............ ..... 011 ..... 0010011 @i 119xori ............ ..... 100 ..... 0010011 @i 120ori ............ ..... 110 ..... 0010011 @i 121andi ............ ..... 111 ..... 0010011 @i 122slli 00.... ...... ..... 001 ..... 0010011 @sh 123srli 00.... ...... ..... 101 ..... 0010011 @sh 124srai 01.... ...... ..... 101 ..... 0010011 @sh 125add 0000000 ..... ..... 000 ..... 0110011 @r 126sub 0100000 ..... ..... 000 ..... 0110011 @r 127sll 0000000 ..... ..... 001 ..... 0110011 @r 128slt 0000000 ..... ..... 010 ..... 0110011 @r 129sltu 0000000 ..... ..... 011 ..... 0110011 @r 130xor 0000000 ..... ..... 100 ..... 0110011 @r 131srl 0000000 ..... ..... 101 ..... 0110011 @r 132sra 0100000 ..... ..... 101 ..... 0110011 @r 133or 0000000 ..... ..... 110 ..... 0110011 @r 134and 0000000 ..... ..... 111 ..... 0110011 @r 135fence ---- pred:4 succ:4 ----- 000 ----- 0001111 136fence_i ---- ---- ---- ----- 001 ----- 0001111 137csrrw ............ ..... 001 ..... 1110011 @csr 138csrrs ............ ..... 010 ..... 1110011 @csr 139csrrc ............ ..... 011 ..... 1110011 @csr 140csrrwi ............ ..... 101 ..... 1110011 @csr 141csrrsi ............ ..... 110 ..... 1110011 @csr 142csrrci ............ ..... 111 ..... 1110011 @csr 143 144# *** RV32M Standard Extension *** 145mul 0000001 ..... ..... 000 ..... 0110011 @r 146mulh 0000001 ..... ..... 001 ..... 0110011 @r 147mulhsu 0000001 ..... ..... 010 ..... 0110011 @r 148mulhu 0000001 ..... ..... 011 ..... 0110011 @r 149div 0000001 ..... ..... 100 ..... 0110011 @r 150divu 0000001 ..... ..... 101 ..... 0110011 @r 151rem 0000001 ..... ..... 110 ..... 0110011 @r 152remu 0000001 ..... ..... 111 ..... 0110011 @r 153 154# *** RV32A Standard Extension *** 155lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld 156sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st 157amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st 158amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st 159amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st 160amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st 161amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st 162amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st 163amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st 164amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st 165amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st 166 167# *** RV32F Standard Extension *** 168flw ............ ..... 010 ..... 0000111 @i 169fsw ....... ..... ..... 010 ..... 0100111 @s 170fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm 171fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm 172fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm 173fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm 174fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm 175fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm 176fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm 177fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm 178fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm 179fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r 180fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r 181fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r 182fmin_s 0010100 ..... ..... 000 ..... 1010011 @r 183fmax_s 0010100 ..... ..... 001 ..... 1010011 @r 184fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm 185fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm 186fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2 187feq_s 1010000 ..... ..... 010 ..... 1010011 @r 188flt_s 1010000 ..... ..... 001 ..... 1010011 @r 189fle_s 1010000 ..... ..... 000 ..... 1010011 @r 190fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2 191fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm 192fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm 193fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2 194 195# *** RV32D Standard Extension *** 196fld ............ ..... 011 ..... 0000111 @i 197fsd ....... ..... ..... 011 ..... 0100111 @s 198fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm 199fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm 200fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm 201fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm 202fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm 203fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm 204fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm 205fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm 206fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm 207fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r 208fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r 209fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r 210fmin_d 0010101 ..... ..... 000 ..... 1010011 @r 211fmax_d 0010101 ..... ..... 001 ..... 1010011 @r 212fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm 213fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm 214feq_d 1010001 ..... ..... 010 ..... 1010011 @r 215flt_d 1010001 ..... ..... 001 ..... 1010011 @r 216fle_d 1010001 ..... ..... 000 ..... 1010011 @r 217fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2 218fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm 219fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm 220fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm 221fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm 222 223# *** RV32H Base Instruction Set *** 224hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma 225hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma 226 227# *** RV32V Extension *** 228 229# *** Vector loads and stores are encoded within LOADFP/STORE-FP *** 230vlb_v ... 100 . 00000 ..... 000 ..... 0000111 @r2_nfvm 231vlh_v ... 100 . 00000 ..... 101 ..... 0000111 @r2_nfvm 232vlw_v ... 100 . 00000 ..... 110 ..... 0000111 @r2_nfvm 233vle_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm 234vlbu_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm 235vlhu_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm 236vlwu_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm 237vlbff_v ... 100 . 10000 ..... 000 ..... 0000111 @r2_nfvm 238vlhff_v ... 100 . 10000 ..... 101 ..... 0000111 @r2_nfvm 239vlwff_v ... 100 . 10000 ..... 110 ..... 0000111 @r2_nfvm 240vleff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm 241vlbuff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm 242vlhuff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm 243vlwuff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm 244vsb_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm 245vsh_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm 246vsw_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm 247vse_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm 248 249vlsb_v ... 110 . ..... ..... 000 ..... 0000111 @r_nfvm 250vlsh_v ... 110 . ..... ..... 101 ..... 0000111 @r_nfvm 251vlsw_v ... 110 . ..... ..... 110 ..... 0000111 @r_nfvm 252vlse_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm 253vlsbu_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm 254vlshu_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm 255vlswu_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm 256vssb_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm 257vssh_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm 258vssw_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm 259vsse_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm 260 261vlxb_v ... 111 . ..... ..... 000 ..... 0000111 @r_nfvm 262vlxh_v ... 111 . ..... ..... 101 ..... 0000111 @r_nfvm 263vlxw_v ... 111 . ..... ..... 110 ..... 0000111 @r_nfvm 264vlxe_v ... 011 . ..... ..... 111 ..... 0000111 @r_nfvm 265vlxbu_v ... 011 . ..... ..... 000 ..... 0000111 @r_nfvm 266vlxhu_v ... 011 . ..... ..... 101 ..... 0000111 @r_nfvm 267vlxwu_v ... 011 . ..... ..... 110 ..... 0000111 @r_nfvm 268# Vector ordered-indexed and unordered-indexed store insns. 269vsxb_v ... -11 . ..... ..... 000 ..... 0100111 @r_nfvm 270vsxh_v ... -11 . ..... ..... 101 ..... 0100111 @r_nfvm 271vsxw_v ... -11 . ..... ..... 110 ..... 0100111 @r_nfvm 272vsxe_v ... -11 . ..... ..... 111 ..... 0100111 @r_nfvm 273 274#*** Vector AMO operations are encoded under the standard AMO major opcode *** 275vamoswapw_v 00001 . . ..... ..... 110 ..... 0101111 @r_wdvm 276vamoaddw_v 00000 . . ..... ..... 110 ..... 0101111 @r_wdvm 277vamoxorw_v 00100 . . ..... ..... 110 ..... 0101111 @r_wdvm 278vamoandw_v 01100 . . ..... ..... 110 ..... 0101111 @r_wdvm 279vamoorw_v 01000 . . ..... ..... 110 ..... 0101111 @r_wdvm 280vamominw_v 10000 . . ..... ..... 110 ..... 0101111 @r_wdvm 281vamomaxw_v 10100 . . ..... ..... 110 ..... 0101111 @r_wdvm 282vamominuw_v 11000 . . ..... ..... 110 ..... 0101111 @r_wdvm 283vamomaxuw_v 11100 . . ..... ..... 110 ..... 0101111 @r_wdvm 284 285# *** new major opcode OP-V *** 286vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm 287vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm 288vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm 289vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm 290vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm 291vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm 292vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm 293vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm 294vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm 295vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm 296vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm 297vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm 298vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm 299vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm 300vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm 301vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm 302vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm 303vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm 304vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm 305vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm 306vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm 307vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm 308vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm 309vadc_vvm 010000 1 ..... ..... 000 ..... 1010111 @r_vm_1 310vadc_vxm 010000 1 ..... ..... 100 ..... 1010111 @r_vm_1 311vadc_vim 010000 1 ..... ..... 011 ..... 1010111 @r_vm_1 312vmadc_vvm 010001 1 ..... ..... 000 ..... 1010111 @r_vm_1 313vmadc_vxm 010001 1 ..... ..... 100 ..... 1010111 @r_vm_1 314vmadc_vim 010001 1 ..... ..... 011 ..... 1010111 @r_vm_1 315vsbc_vvm 010010 1 ..... ..... 000 ..... 1010111 @r_vm_1 316vsbc_vxm 010010 1 ..... ..... 100 ..... 1010111 @r_vm_1 317vmsbc_vvm 010011 1 ..... ..... 000 ..... 1010111 @r_vm_1 318vmsbc_vxm 010011 1 ..... ..... 100 ..... 1010111 @r_vm_1 319vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm 320vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm 321vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm 322vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm 323vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm 324vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm 325vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm 326vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm 327vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm 328vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm 329vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm 330vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm 331vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm 332vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm 333vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm 334vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm 335vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm 336vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm 337vnsrl_vv 101100 . ..... ..... 000 ..... 1010111 @r_vm 338vnsrl_vx 101100 . ..... ..... 100 ..... 1010111 @r_vm 339vnsrl_vi 101100 . ..... ..... 011 ..... 1010111 @r_vm 340vnsra_vv 101101 . ..... ..... 000 ..... 1010111 @r_vm 341vnsra_vx 101101 . ..... ..... 100 ..... 1010111 @r_vm 342vnsra_vi 101101 . ..... ..... 011 ..... 1010111 @r_vm 343vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm 344vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm 345vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm 346vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm 347vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm 348vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm 349vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm 350vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm 351vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm 352vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm 353vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm 354vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm 355vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm 356vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm 357vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm 358vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm 359vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm 360vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm 361vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm 362vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm 363vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm 364vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm 365vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm 366vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm 367vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm 368vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm 369vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm 370vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm 371vmul_vv 100101 . ..... ..... 010 ..... 1010111 @r_vm 372vmul_vx 100101 . ..... ..... 110 ..... 1010111 @r_vm 373vmulh_vv 100111 . ..... ..... 010 ..... 1010111 @r_vm 374vmulh_vx 100111 . ..... ..... 110 ..... 1010111 @r_vm 375vmulhu_vv 100100 . ..... ..... 010 ..... 1010111 @r_vm 376vmulhu_vx 100100 . ..... ..... 110 ..... 1010111 @r_vm 377vmulhsu_vv 100110 . ..... ..... 010 ..... 1010111 @r_vm 378vmulhsu_vx 100110 . ..... ..... 110 ..... 1010111 @r_vm 379vdivu_vv 100000 . ..... ..... 010 ..... 1010111 @r_vm 380vdivu_vx 100000 . ..... ..... 110 ..... 1010111 @r_vm 381vdiv_vv 100001 . ..... ..... 010 ..... 1010111 @r_vm 382vdiv_vx 100001 . ..... ..... 110 ..... 1010111 @r_vm 383vremu_vv 100010 . ..... ..... 010 ..... 1010111 @r_vm 384vremu_vx 100010 . ..... ..... 110 ..... 1010111 @r_vm 385vrem_vv 100011 . ..... ..... 010 ..... 1010111 @r_vm 386vrem_vx 100011 . ..... ..... 110 ..... 1010111 @r_vm 387vwmulu_vv 111000 . ..... ..... 010 ..... 1010111 @r_vm 388vwmulu_vx 111000 . ..... ..... 110 ..... 1010111 @r_vm 389vwmulsu_vv 111010 . ..... ..... 010 ..... 1010111 @r_vm 390vwmulsu_vx 111010 . ..... ..... 110 ..... 1010111 @r_vm 391vwmul_vv 111011 . ..... ..... 010 ..... 1010111 @r_vm 392vwmul_vx 111011 . ..... ..... 110 ..... 1010111 @r_vm 393vmacc_vv 101101 . ..... ..... 010 ..... 1010111 @r_vm 394vmacc_vx 101101 . ..... ..... 110 ..... 1010111 @r_vm 395vnmsac_vv 101111 . ..... ..... 010 ..... 1010111 @r_vm 396vnmsac_vx 101111 . ..... ..... 110 ..... 1010111 @r_vm 397vmadd_vv 101001 . ..... ..... 010 ..... 1010111 @r_vm 398vmadd_vx 101001 . ..... ..... 110 ..... 1010111 @r_vm 399vnmsub_vv 101011 . ..... ..... 010 ..... 1010111 @r_vm 400vnmsub_vx 101011 . ..... ..... 110 ..... 1010111 @r_vm 401vwmaccu_vv 111100 . ..... ..... 010 ..... 1010111 @r_vm 402vwmaccu_vx 111100 . ..... ..... 110 ..... 1010111 @r_vm 403vwmacc_vv 111101 . ..... ..... 010 ..... 1010111 @r_vm 404vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm 405vwmaccsu_vv 111110 . ..... ..... 010 ..... 1010111 @r_vm 406vwmaccsu_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm 407vwmaccus_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm 408vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2 409vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2 410vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2 411vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0 412vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0 413vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0 414vsaddu_vv 100000 . ..... ..... 000 ..... 1010111 @r_vm 415vsaddu_vx 100000 . ..... ..... 100 ..... 1010111 @r_vm 416vsaddu_vi 100000 . ..... ..... 011 ..... 1010111 @r_vm 417vsadd_vv 100001 . ..... ..... 000 ..... 1010111 @r_vm 418vsadd_vx 100001 . ..... ..... 100 ..... 1010111 @r_vm 419vsadd_vi 100001 . ..... ..... 011 ..... 1010111 @r_vm 420vssubu_vv 100010 . ..... ..... 000 ..... 1010111 @r_vm 421vssubu_vx 100010 . ..... ..... 100 ..... 1010111 @r_vm 422vssub_vv 100011 . ..... ..... 000 ..... 1010111 @r_vm 423vssub_vx 100011 . ..... ..... 100 ..... 1010111 @r_vm 424vaadd_vv 100100 . ..... ..... 000 ..... 1010111 @r_vm 425vaadd_vx 100100 . ..... ..... 100 ..... 1010111 @r_vm 426vaadd_vi 100100 . ..... ..... 011 ..... 1010111 @r_vm 427vasub_vv 100110 . ..... ..... 000 ..... 1010111 @r_vm 428vasub_vx 100110 . ..... ..... 100 ..... 1010111 @r_vm 429vsmul_vv 100111 . ..... ..... 000 ..... 1010111 @r_vm 430vsmul_vx 100111 . ..... ..... 100 ..... 1010111 @r_vm 431vwsmaccu_vv 111100 . ..... ..... 000 ..... 1010111 @r_vm 432vwsmaccu_vx 111100 . ..... ..... 100 ..... 1010111 @r_vm 433vwsmacc_vv 111101 . ..... ..... 000 ..... 1010111 @r_vm 434vwsmacc_vx 111101 . ..... ..... 100 ..... 1010111 @r_vm 435vwsmaccsu_vv 111110 . ..... ..... 000 ..... 1010111 @r_vm 436vwsmaccsu_vx 111110 . ..... ..... 100 ..... 1010111 @r_vm 437vwsmaccus_vx 111111 . ..... ..... 100 ..... 1010111 @r_vm 438vssrl_vv 101010 . ..... ..... 000 ..... 1010111 @r_vm 439vssrl_vx 101010 . ..... ..... 100 ..... 1010111 @r_vm 440vssrl_vi 101010 . ..... ..... 011 ..... 1010111 @r_vm 441vssra_vv 101011 . ..... ..... 000 ..... 1010111 @r_vm 442vssra_vx 101011 . ..... ..... 100 ..... 1010111 @r_vm 443vssra_vi 101011 . ..... ..... 011 ..... 1010111 @r_vm 444vnclipu_vv 101110 . ..... ..... 000 ..... 1010111 @r_vm 445vnclipu_vx 101110 . ..... ..... 100 ..... 1010111 @r_vm 446vnclipu_vi 101110 . ..... ..... 011 ..... 1010111 @r_vm 447vnclip_vv 101111 . ..... ..... 000 ..... 1010111 @r_vm 448vnclip_vx 101111 . ..... ..... 100 ..... 1010111 @r_vm 449vnclip_vi 101111 . ..... ..... 011 ..... 1010111 @r_vm 450vfadd_vv 000000 . ..... ..... 001 ..... 1010111 @r_vm 451vfadd_vf 000000 . ..... ..... 101 ..... 1010111 @r_vm 452vfsub_vv 000010 . ..... ..... 001 ..... 1010111 @r_vm 453vfsub_vf 000010 . ..... ..... 101 ..... 1010111 @r_vm 454vfrsub_vf 100111 . ..... ..... 101 ..... 1010111 @r_vm 455vfwadd_vv 110000 . ..... ..... 001 ..... 1010111 @r_vm 456vfwadd_vf 110000 . ..... ..... 101 ..... 1010111 @r_vm 457vfwadd_wv 110100 . ..... ..... 001 ..... 1010111 @r_vm 458vfwadd_wf 110100 . ..... ..... 101 ..... 1010111 @r_vm 459vfwsub_vv 110010 . ..... ..... 001 ..... 1010111 @r_vm 460vfwsub_vf 110010 . ..... ..... 101 ..... 1010111 @r_vm 461vfwsub_wv 110110 . ..... ..... 001 ..... 1010111 @r_vm 462vfwsub_wf 110110 . ..... ..... 101 ..... 1010111 @r_vm 463vfmul_vv 100100 . ..... ..... 001 ..... 1010111 @r_vm 464vfmul_vf 100100 . ..... ..... 101 ..... 1010111 @r_vm 465vfdiv_vv 100000 . ..... ..... 001 ..... 1010111 @r_vm 466vfdiv_vf 100000 . ..... ..... 101 ..... 1010111 @r_vm 467vfrdiv_vf 100001 . ..... ..... 101 ..... 1010111 @r_vm 468vfwmul_vv 111000 . ..... ..... 001 ..... 1010111 @r_vm 469vfwmul_vf 111000 . ..... ..... 101 ..... 1010111 @r_vm 470vfmacc_vv 101100 . ..... ..... 001 ..... 1010111 @r_vm 471vfnmacc_vv 101101 . ..... ..... 001 ..... 1010111 @r_vm 472vfnmacc_vf 101101 . ..... ..... 101 ..... 1010111 @r_vm 473vfmacc_vf 101100 . ..... ..... 101 ..... 1010111 @r_vm 474vfmsac_vv 101110 . ..... ..... 001 ..... 1010111 @r_vm 475vfmsac_vf 101110 . ..... ..... 101 ..... 1010111 @r_vm 476vfnmsac_vv 101111 . ..... ..... 001 ..... 1010111 @r_vm 477vfnmsac_vf 101111 . ..... ..... 101 ..... 1010111 @r_vm 478vfmadd_vv 101000 . ..... ..... 001 ..... 1010111 @r_vm 479vfmadd_vf 101000 . ..... ..... 101 ..... 1010111 @r_vm 480vfnmadd_vv 101001 . ..... ..... 001 ..... 1010111 @r_vm 481vfnmadd_vf 101001 . ..... ..... 101 ..... 1010111 @r_vm 482vfmsub_vv 101010 . ..... ..... 001 ..... 1010111 @r_vm 483vfmsub_vf 101010 . ..... ..... 101 ..... 1010111 @r_vm 484vfnmsub_vv 101011 . ..... ..... 001 ..... 1010111 @r_vm 485vfnmsub_vf 101011 . ..... ..... 101 ..... 1010111 @r_vm 486vfwmacc_vv 111100 . ..... ..... 001 ..... 1010111 @r_vm 487vfwmacc_vf 111100 . ..... ..... 101 ..... 1010111 @r_vm 488vfwnmacc_vv 111101 . ..... ..... 001 ..... 1010111 @r_vm 489vfwnmacc_vf 111101 . ..... ..... 101 ..... 1010111 @r_vm 490vfwmsac_vv 111110 . ..... ..... 001 ..... 1010111 @r_vm 491vfwmsac_vf 111110 . ..... ..... 101 ..... 1010111 @r_vm 492vfwnmsac_vv 111111 . ..... ..... 001 ..... 1010111 @r_vm 493vfwnmsac_vf 111111 . ..... ..... 101 ..... 1010111 @r_vm 494vfsqrt_v 100011 . ..... 00000 001 ..... 1010111 @r2_vm 495vfmin_vv 000100 . ..... ..... 001 ..... 1010111 @r_vm 496vfmin_vf 000100 . ..... ..... 101 ..... 1010111 @r_vm 497vfmax_vv 000110 . ..... ..... 001 ..... 1010111 @r_vm 498vfmax_vf 000110 . ..... ..... 101 ..... 1010111 @r_vm 499vfsgnj_vv 001000 . ..... ..... 001 ..... 1010111 @r_vm 500vfsgnj_vf 001000 . ..... ..... 101 ..... 1010111 @r_vm 501vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm 502vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm 503vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm 504vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm 505vmfeq_vv 011000 . ..... ..... 001 ..... 1010111 @r_vm 506vmfeq_vf 011000 . ..... ..... 101 ..... 1010111 @r_vm 507vmfne_vv 011100 . ..... ..... 001 ..... 1010111 @r_vm 508vmfne_vf 011100 . ..... ..... 101 ..... 1010111 @r_vm 509vmflt_vv 011011 . ..... ..... 001 ..... 1010111 @r_vm 510vmflt_vf 011011 . ..... ..... 101 ..... 1010111 @r_vm 511vmfle_vv 011001 . ..... ..... 001 ..... 1010111 @r_vm 512vmfle_vf 011001 . ..... ..... 101 ..... 1010111 @r_vm 513vmfgt_vf 011101 . ..... ..... 101 ..... 1010111 @r_vm 514vmfge_vf 011111 . ..... ..... 101 ..... 1010111 @r_vm 515vmford_vv 011010 . ..... ..... 001 ..... 1010111 @r_vm 516vmford_vf 011010 . ..... ..... 101 ..... 1010111 @r_vm 517vfclass_v 100011 . ..... 10000 001 ..... 1010111 @r2_vm 518vfmerge_vfm 010111 0 ..... ..... 101 ..... 1010111 @r_vm_0 519vfmv_v_f 010111 1 00000 ..... 101 ..... 1010111 @r2 520vfcvt_xu_f_v 100010 . ..... 00000 001 ..... 1010111 @r2_vm 521vfcvt_x_f_v 100010 . ..... 00001 001 ..... 1010111 @r2_vm 522vfcvt_f_xu_v 100010 . ..... 00010 001 ..... 1010111 @r2_vm 523vfcvt_f_x_v 100010 . ..... 00011 001 ..... 1010111 @r2_vm 524vfwcvt_xu_f_v 100010 . ..... 01000 001 ..... 1010111 @r2_vm 525vfwcvt_x_f_v 100010 . ..... 01001 001 ..... 1010111 @r2_vm 526vfwcvt_f_xu_v 100010 . ..... 01010 001 ..... 1010111 @r2_vm 527vfwcvt_f_x_v 100010 . ..... 01011 001 ..... 1010111 @r2_vm 528vfwcvt_f_f_v 100010 . ..... 01100 001 ..... 1010111 @r2_vm 529vfncvt_xu_f_v 100010 . ..... 10000 001 ..... 1010111 @r2_vm 530vfncvt_x_f_v 100010 . ..... 10001 001 ..... 1010111 @r2_vm 531vfncvt_f_xu_v 100010 . ..... 10010 001 ..... 1010111 @r2_vm 532vfncvt_f_x_v 100010 . ..... 10011 001 ..... 1010111 @r2_vm 533vfncvt_f_f_v 100010 . ..... 10100 001 ..... 1010111 @r2_vm 534vredsum_vs 000000 . ..... ..... 010 ..... 1010111 @r_vm 535vredand_vs 000001 . ..... ..... 010 ..... 1010111 @r_vm 536vredor_vs 000010 . ..... ..... 010 ..... 1010111 @r_vm 537vredxor_vs 000011 . ..... ..... 010 ..... 1010111 @r_vm 538vredminu_vs 000100 . ..... ..... 010 ..... 1010111 @r_vm 539vredmin_vs 000101 . ..... ..... 010 ..... 1010111 @r_vm 540vredmaxu_vs 000110 . ..... ..... 010 ..... 1010111 @r_vm 541vredmax_vs 000111 . ..... ..... 010 ..... 1010111 @r_vm 542 543vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm 544vsetvl 1000000 ..... ..... 111 ..... 1010111 @r 545